1//===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9//===----------------------------------------------------------------------===// 10// Type profiles 11//===----------------------------------------------------------------------===// 12def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>, 13 SDTCisVT<1, i64>]>; 14def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 15 SDTCisVT<1, i64>]>; 16def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 17def SDT_ZCmp : SDTypeProfile<1, 2, 18 [SDTCisVT<0, i32>, 19 SDTCisSameAs<1, 2>]>; 20def SDT_ZICmp : SDTypeProfile<1, 3, 21 [SDTCisVT<0, i32>, 22 SDTCisSameAs<1, 2>, 23 SDTCisVT<3, i32>]>; 24def SDT_ZBRCCMask : SDTypeProfile<0, 4, 25 [SDTCisVT<0, i32>, 26 SDTCisVT<1, i32>, 27 SDTCisVT<2, OtherVT>, 28 SDTCisVT<3, i32>]>; 29def SDT_ZSelectCCMask : SDTypeProfile<1, 5, 30 [SDTCisSameAs<0, 1>, 31 SDTCisSameAs<1, 2>, 32 SDTCisVT<3, i32>, 33 SDTCisVT<4, i32>, 34 SDTCisVT<5, i32>]>; 35def SDT_ZWrapPtr : SDTypeProfile<1, 1, 36 [SDTCisSameAs<0, 1>, 37 SDTCisPtrTy<0>]>; 38def SDT_ZWrapOffset : SDTypeProfile<1, 2, 39 [SDTCisSameAs<0, 1>, 40 SDTCisSameAs<0, 2>, 41 SDTCisPtrTy<0>]>; 42def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>; 43def SDT_ZGR128Binary : SDTypeProfile<1, 2, 44 [SDTCisVT<0, untyped>, 45 SDTCisInt<1>, 46 SDTCisInt<2>]>; 47def SDT_ZBinaryWithFlags : SDTypeProfile<2, 2, 48 [SDTCisInt<0>, 49 SDTCisVT<1, i32>, 50 SDTCisSameAs<0, 2>, 51 SDTCisSameAs<0, 3>]>; 52def SDT_ZBinaryWithCarry : SDTypeProfile<2, 3, 53 [SDTCisInt<0>, 54 SDTCisVT<1, i32>, 55 SDTCisSameAs<0, 2>, 56 SDTCisSameAs<0, 3>, 57 SDTCisVT<1, i32>]>; 58def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5, 59 [SDTCisVT<0, i32>, 60 SDTCisPtrTy<1>, 61 SDTCisVT<2, i32>, 62 SDTCisVT<3, i32>, 63 SDTCisVT<4, i32>, 64 SDTCisVT<5, i32>]>; 65def SDT_ZAtomicCmpSwapW : SDTypeProfile<2, 6, 66 [SDTCisVT<0, i32>, 67 SDTCisVT<1, i32>, 68 SDTCisPtrTy<2>, 69 SDTCisVT<3, i32>, 70 SDTCisVT<4, i32>, 71 SDTCisVT<5, i32>, 72 SDTCisVT<6, i32>, 73 SDTCisVT<7, i32>]>; 74def SDT_ZAtomicCmpSwap : SDTypeProfile<2, 3, 75 [SDTCisInt<0>, 76 SDTCisVT<1, i32>, 77 SDTCisPtrTy<2>, 78 SDTCisSameAs<0, 3>, 79 SDTCisSameAs<0, 4>]>; 80def SDT_ZAtomicLoad128 : SDTypeProfile<1, 1, 81 [SDTCisVT<0, untyped>, 82 SDTCisPtrTy<1>]>; 83def SDT_ZAtomicStore128 : SDTypeProfile<0, 2, 84 [SDTCisVT<0, untyped>, 85 SDTCisPtrTy<1>]>; 86def SDT_ZAtomicCmpSwap128 : SDTypeProfile<2, 3, 87 [SDTCisVT<0, untyped>, 88 SDTCisVT<1, i32>, 89 SDTCisPtrTy<2>, 90 SDTCisVT<3, untyped>, 91 SDTCisVT<4, untyped>]>; 92def SDT_ZMemMemLength : SDTypeProfile<0, 3, 93 [SDTCisPtrTy<0>, 94 SDTCisPtrTy<1>, 95 SDTCisVT<2, i64>]>; 96def SDT_ZMemMemLengthCC : SDTypeProfile<1, 3, 97 [SDTCisVT<0, i32>, 98 SDTCisPtrTy<1>, 99 SDTCisPtrTy<2>, 100 SDTCisVT<3, i64>]>; 101def SDT_ZMemMemLoop : SDTypeProfile<0, 4, 102 [SDTCisPtrTy<0>, 103 SDTCisPtrTy<1>, 104 SDTCisVT<2, i64>, 105 SDTCisVT<3, i64>]>; 106def SDT_ZMemMemLoopCC : SDTypeProfile<1, 4, 107 [SDTCisVT<0, i32>, 108 SDTCisPtrTy<1>, 109 SDTCisPtrTy<2>, 110 SDTCisVT<3, i64>, 111 SDTCisVT<4, i64>]>; 112def SDT_ZString : SDTypeProfile<1, 3, 113 [SDTCisPtrTy<0>, 114 SDTCisPtrTy<1>, 115 SDTCisPtrTy<2>, 116 SDTCisVT<3, i32>]>; 117def SDT_ZStringCC : SDTypeProfile<2, 3, 118 [SDTCisPtrTy<0>, 119 SDTCisVT<1, i32>, 120 SDTCisPtrTy<2>, 121 SDTCisPtrTy<3>, 122 SDTCisVT<4, i32>]>; 123def SDT_ZIPM : SDTypeProfile<1, 1, 124 [SDTCisVT<0, i32>, 125 SDTCisVT<1, i32>]>; 126def SDT_ZPrefetch : SDTypeProfile<0, 2, 127 [SDTCisVT<0, i32>, 128 SDTCisPtrTy<1>]>; 129def SDT_ZTBegin : SDTypeProfile<1, 2, 130 [SDTCisVT<0, i32>, 131 SDTCisPtrTy<1>, 132 SDTCisVT<2, i32>]>; 133def SDT_ZTEnd : SDTypeProfile<1, 0, 134 [SDTCisVT<0, i32>]>; 135def SDT_ZInsertVectorElt : SDTypeProfile<1, 3, 136 [SDTCisVec<0>, 137 SDTCisSameAs<0, 1>, 138 SDTCisVT<3, i32>]>; 139def SDT_ZExtractVectorElt : SDTypeProfile<1, 2, 140 [SDTCisVec<1>, 141 SDTCisVT<2, i32>]>; 142def SDT_ZReplicate : SDTypeProfile<1, 1, 143 [SDTCisVec<0>]>; 144def SDT_ZVecUnaryConv : SDTypeProfile<1, 1, 145 [SDTCisVec<0>, 146 SDTCisVec<1>]>; 147def SDT_ZVecUnary : SDTypeProfile<1, 1, 148 [SDTCisVec<0>, 149 SDTCisSameAs<0, 1>]>; 150def SDT_ZVecUnaryCC : SDTypeProfile<2, 1, 151 [SDTCisVec<0>, 152 SDTCisVT<1, i32>, 153 SDTCisSameAs<0, 2>]>; 154def SDT_ZVecBinary : SDTypeProfile<1, 2, 155 [SDTCisVec<0>, 156 SDTCisSameAs<0, 1>, 157 SDTCisSameAs<0, 2>]>; 158def SDT_ZVecBinaryCC : SDTypeProfile<2, 2, 159 [SDTCisVec<0>, 160 SDTCisVT<1, i32>, 161 SDTCisSameAs<0, 2>, 162 SDTCisSameAs<0, 2>]>; 163def SDT_ZVecBinaryInt : SDTypeProfile<1, 2, 164 [SDTCisVec<0>, 165 SDTCisSameAs<0, 1>, 166 SDTCisVT<2, i32>]>; 167def SDT_ZVecBinaryConv : SDTypeProfile<1, 2, 168 [SDTCisVec<0>, 169 SDTCisVec<1>, 170 SDTCisSameAs<1, 2>]>; 171def SDT_ZVecBinaryConvCC : SDTypeProfile<2, 2, 172 [SDTCisVec<0>, 173 SDTCisVT<1, i32>, 174 SDTCisVec<2>, 175 SDTCisSameAs<2, 3>]>; 176def SDT_ZVecBinaryConvIntCC : SDTypeProfile<2, 2, 177 [SDTCisVec<0>, 178 SDTCisVT<1, i32>, 179 SDTCisVec<2>, 180 SDTCisVT<3, i32>]>; 181def SDT_ZRotateMask : SDTypeProfile<1, 2, 182 [SDTCisVec<0>, 183 SDTCisVT<1, i32>, 184 SDTCisVT<2, i32>]>; 185def SDT_ZJoinDwords : SDTypeProfile<1, 2, 186 [SDTCisVT<0, v2i64>, 187 SDTCisVT<1, i64>, 188 SDTCisVT<2, i64>]>; 189def SDT_ZVecTernary : SDTypeProfile<1, 3, 190 [SDTCisVec<0>, 191 SDTCisSameAs<0, 1>, 192 SDTCisSameAs<0, 2>, 193 SDTCisSameAs<0, 3>]>; 194def SDT_ZVecTernaryConvCC : SDTypeProfile<2, 3, 195 [SDTCisVec<0>, 196 SDTCisVT<1, i32>, 197 SDTCisVec<2>, 198 SDTCisSameAs<2, 3>, 199 SDTCisSameAs<0, 4>]>; 200def SDT_ZVecTernaryInt : SDTypeProfile<1, 3, 201 [SDTCisVec<0>, 202 SDTCisSameAs<0, 1>, 203 SDTCisSameAs<0, 2>, 204 SDTCisVT<3, i32>]>; 205def SDT_ZVecTernaryIntCC : SDTypeProfile<2, 3, 206 [SDTCisVec<0>, 207 SDTCisVT<1, i32>, 208 SDTCisSameAs<0, 2>, 209 SDTCisSameAs<0, 3>, 210 SDTCisVT<4, i32>]>; 211def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4, 212 [SDTCisVec<0>, 213 SDTCisSameAs<0, 1>, 214 SDTCisSameAs<0, 2>, 215 SDTCisSameAs<0, 3>, 216 SDTCisVT<4, i32>]>; 217def SDT_ZVecQuaternaryIntCC : SDTypeProfile<2, 4, 218 [SDTCisVec<0>, 219 SDTCisVT<1, i32>, 220 SDTCisSameAs<0, 2>, 221 SDTCisSameAs<0, 3>, 222 SDTCisSameAs<0, 4>, 223 SDTCisVT<5, i32>]>; 224def SDT_ZTest : SDTypeProfile<1, 2, 225 [SDTCisVT<0, i32>, 226 SDTCisVT<2, i64>]>; 227 228//===----------------------------------------------------------------------===// 229// Node definitions 230//===----------------------------------------------------------------------===// 231 232// These are target-independent nodes, but have target-specific formats. 233def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 234 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>; 235def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 236 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue, 237 SDNPOutGlue]>; 238def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>; 239 240// Nodes for SystemZISD::*. See SystemZISelLowering.h for more details. 241def z_retflag : SDNode<"SystemZISD::RET_FLAG", SDTNone, 242 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; 243def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 244 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 245 SDNPVariadic]>; 246def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 247 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 248 SDNPVariadic]>; 249def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall, 250 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 251 SDNPVariadic]>; 252def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall, 253 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 254 SDNPVariadic]>; 255def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 256def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", 257 SDT_ZWrapOffset, []>; 258def z_iabs : SDNode<"SystemZISD::IABS", SDTIntUnaryOp, []>; 259def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp>; 260def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp>; 261def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp>; 262def z_br_ccmask_1 : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask, 263 [SDNPHasChain]>; 264def z_select_ccmask_1 : SDNode<"SystemZISD::SELECT_CCMASK", 265 SDT_ZSelectCCMask>; 266def z_ipm_1 : SDNode<"SystemZISD::IPM", SDT_ZIPM>; 267def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>; 268def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>; 269def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>; 270def z_umul_lohi : SDNode<"SystemZISD::UMUL_LOHI", SDT_ZGR128Binary>; 271def z_sdivrem : SDNode<"SystemZISD::SDIVREM", SDT_ZGR128Binary>; 272def z_udivrem : SDNode<"SystemZISD::UDIVREM", SDT_ZGR128Binary>; 273def z_saddo : SDNode<"SystemZISD::SADDO", SDT_ZBinaryWithFlags>; 274def z_ssubo : SDNode<"SystemZISD::SSUBO", SDT_ZBinaryWithFlags>; 275def z_uaddo : SDNode<"SystemZISD::UADDO", SDT_ZBinaryWithFlags>; 276def z_usubo : SDNode<"SystemZISD::USUBO", SDT_ZBinaryWithFlags>; 277def z_addcarry_1 : SDNode<"SystemZISD::ADDCARRY", SDT_ZBinaryWithCarry>; 278def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>; 279 280def z_membarrier : SDNode<"SystemZISD::MEMBARRIER", SDTNone, 281 [SDNPHasChain, SDNPSideEffect]>; 282 283def z_loadbswap : SDNode<"SystemZISD::LRV", SDTLoad, 284 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 285def z_storebswap : SDNode<"SystemZISD::STRV", SDTStore, 286 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 287def z_loadeswap : SDNode<"SystemZISD::VLER", SDTLoad, 288 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 289def z_storeeswap : SDNode<"SystemZISD::VSTER", SDTStore, 290 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 291 292def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest>; 293 294// Defined because the index is an i32 rather than a pointer. 295def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", 296 SDT_ZInsertVectorElt>; 297def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT", 298 SDT_ZExtractVectorElt>; 299def z_byte_mask : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>; 300def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>; 301def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>; 302def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>; 303def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>; 304def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>; 305def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>; 306def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>; 307def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS", 308 SDT_ZVecTernaryInt>; 309def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>; 310def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>; 311def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConvCC>; 312def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConvCC>; 313def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>; 314def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>; 315def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>; 316def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>; 317def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR", 318 SDT_ZVecBinaryInt>; 319def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR", 320 SDT_ZVecBinaryInt>; 321def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR", 322 SDT_ZVecBinaryInt>; 323def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZVecBinaryConv>; 324def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>; 325def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>; 326def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>; 327def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecBinaryCC>; 328def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecBinaryCC>; 329def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecBinaryCC>; 330def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>; 331def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>; 332def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>; 333def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConvCC>; 334def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConvCC>; 335def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConvCC>; 336def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>; 337def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>; 338def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp>; 339def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryIntCC>; 340def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryIntCC>; 341def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinaryCC>; 342def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinaryCC>; 343def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinaryCC>; 344def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinaryCC>; 345def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnaryCC>; 346def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC", 347 SDT_ZVecQuaternaryIntCC>; 348def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC", 349 SDT_ZVecQuaternaryIntCC>; 350def z_vstrs_cc : SDNode<"SystemZISD::VSTRS_CC", 351 SDT_ZVecTernaryConvCC>; 352def z_vstrsz_cc : SDNode<"SystemZISD::VSTRSZ_CC", 353 SDT_ZVecTernaryConvCC>; 354def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvIntCC>; 355 356class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW> 357 : SDNode<"SystemZISD::"##name, profile, 358 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; 359 360def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">; 361def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">; 362def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">; 363def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">; 364def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">; 365def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">; 366def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">; 367def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">; 368def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">; 369def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">; 370def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">; 371 372def z_atomic_cmp_swap : SDNode<"SystemZISD::ATOMIC_CMP_SWAP", 373 SDT_ZAtomicCmpSwap, 374 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 375 SDNPMemOperand]>; 376def z_atomic_cmp_swapw : SDNode<"SystemZISD::ATOMIC_CMP_SWAPW", 377 SDT_ZAtomicCmpSwapW, 378 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 379 SDNPMemOperand]>; 380 381def z_atomic_load_128 : SDNode<"SystemZISD::ATOMIC_LOAD_128", 382 SDT_ZAtomicLoad128, 383 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 384def z_atomic_store_128 : SDNode<"SystemZISD::ATOMIC_STORE_128", 385 SDT_ZAtomicStore128, 386 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 387def z_atomic_cmp_swap_128 : SDNode<"SystemZISD::ATOMIC_CMP_SWAP_128", 388 SDT_ZAtomicCmpSwap128, 389 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 390 SDNPMemOperand]>; 391 392def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength, 393 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 394def z_mvc_loop : SDNode<"SystemZISD::MVC_LOOP", SDT_ZMemMemLoop, 395 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 396def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength, 397 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 398def z_nc_loop : SDNode<"SystemZISD::NC_LOOP", SDT_ZMemMemLoop, 399 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 400def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength, 401 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 402def z_oc_loop : SDNode<"SystemZISD::OC_LOOP", SDT_ZMemMemLoop, 403 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 404def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength, 405 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 406def z_xc_loop : SDNode<"SystemZISD::XC_LOOP", SDT_ZMemMemLoop, 407 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 408def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLengthCC, 409 [SDNPHasChain, SDNPMayLoad]>; 410def z_clc_loop : SDNode<"SystemZISD::CLC_LOOP", SDT_ZMemMemLoopCC, 411 [SDNPHasChain, SDNPMayLoad]>; 412def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZStringCC, 413 [SDNPHasChain, SDNPMayLoad]>; 414def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString, 415 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 416def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZStringCC, 417 [SDNPHasChain, SDNPMayLoad]>; 418def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch, 419 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, 420 SDNPMemOperand]>; 421 422def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin, 423 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 424def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin, 425 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 426def z_tend : SDNode<"SystemZISD::TEND", SDT_ZTEnd, 427 [SDNPHasChain, SDNPSideEffect]>; 428 429def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>; 430def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>; 431def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>; 432 433//===----------------------------------------------------------------------===// 434// Pattern fragments 435//===----------------------------------------------------------------------===// 436 437def z_loadbswap16 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 438 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 439}]>; 440def z_loadbswap32 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 441 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 442}]>; 443def z_loadbswap64 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 444 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 445}]>; 446 447def z_storebswap16 : PatFrag<(ops node:$src, node:$addr), 448 (z_storebswap node:$src, node:$addr), [{ 449 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 450}]>; 451def z_storebswap32 : PatFrag<(ops node:$src, node:$addr), 452 (z_storebswap node:$src, node:$addr), [{ 453 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 454}]>; 455def z_storebswap64 : PatFrag<(ops node:$src, node:$addr), 456 (z_storebswap node:$src, node:$addr), [{ 457 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 458}]>; 459 460// Fragments including CC as an implicit source. 461def z_br_ccmask 462 : PatFrag<(ops node:$valid, node:$mask, node:$bb), 463 (z_br_ccmask_1 node:$valid, node:$mask, node:$bb, CC)>; 464def z_select_ccmask 465 : PatFrag<(ops node:$true, node:$false, node:$valid, node:$mask), 466 (z_select_ccmask_1 node:$true, node:$false, 467 node:$valid, node:$mask, CC)>; 468def z_ipm : PatFrag<(ops), (z_ipm_1 CC)>; 469def z_addcarry : PatFrag<(ops node:$lhs, node:$rhs), 470 (z_addcarry_1 node:$lhs, node:$rhs, CC)>; 471def z_subcarry : PatFrag<(ops node:$lhs, node:$rhs), 472 (z_subcarry_1 node:$lhs, node:$rhs, CC)>; 473 474// Signed and unsigned comparisons. 475def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 476 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 477 return Type != SystemZICMP::UnsignedOnly; 478}]>; 479def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, imm), [{ 480 unsigned Type = cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(); 481 return Type != SystemZICMP::SignedOnly; 482}]>; 483 484// Register- and memory-based TEST UNDER MASK. 485def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, imm)>; 486def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>; 487 488// Register sign-extend operations. Sub-32-bit values are represented as i32s. 489def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>; 490def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>; 491def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>; 492 493// Match extensions of an i32 to an i64, followed by an in-register sign 494// extension from a sub-i32 value. 495def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>; 496def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>; 497 498// Register zero-extend operations. Sub-32-bit values are represented as i32s. 499def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>; 500def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>; 501def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>; 502 503// Extending loads in which the extension type can be signed. 504def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 505 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 506 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD; 507}]>; 508def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 509 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 510}]>; 511def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 512 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 513}]>; 514def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 515 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 516}]>; 517 518// Extending loads in which the extension type can be unsigned. 519def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 520 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 521 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD; 522}]>; 523def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 524 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 525}]>; 526def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 527 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 528}]>; 529def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 530 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 531}]>; 532 533// Extending loads in which the extension type doesn't matter. 534def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 535 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD; 536}]>; 537def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 538 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 539}]>; 540def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 541 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 542}]>; 543def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 544 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 545}]>; 546 547// Aligned loads. 548class AlignedLoad<SDPatternOperator load> 549 : PatFrag<(ops node:$addr), (load node:$addr), [{ 550 auto *Load = cast<LoadSDNode>(N); 551 return Load->getAlignment() >= Load->getMemoryVT().getStoreSize(); 552}]>; 553def aligned_load : AlignedLoad<load>; 554def aligned_asextloadi16 : AlignedLoad<asextloadi16>; 555def aligned_asextloadi32 : AlignedLoad<asextloadi32>; 556def aligned_azextloadi16 : AlignedLoad<azextloadi16>; 557def aligned_azextloadi32 : AlignedLoad<azextloadi32>; 558 559// Aligned stores. 560class AlignedStore<SDPatternOperator store> 561 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 562 auto *Store = cast<StoreSDNode>(N); 563 return Store->getAlignment() >= Store->getMemoryVT().getStoreSize(); 564}]>; 565def aligned_store : AlignedStore<store>; 566def aligned_truncstorei16 : AlignedStore<truncstorei16>; 567def aligned_truncstorei32 : AlignedStore<truncstorei32>; 568 569// Non-volatile loads. Used for instructions that might access the storage 570// location multiple times. 571class NonvolatileLoad<SDPatternOperator load> 572 : PatFrag<(ops node:$addr), (load node:$addr), [{ 573 auto *Load = cast<LoadSDNode>(N); 574 return !Load->isVolatile(); 575}]>; 576def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>; 577def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>; 578def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>; 579 580// Non-volatile stores. 581class NonvolatileStore<SDPatternOperator store> 582 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 583 auto *Store = cast<StoreSDNode>(N); 584 return !Store->isVolatile(); 585}]>; 586def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>; 587def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>; 588def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>; 589 590// A store of a load that can be implemented using MVC. 591def mvc_store : PatFrag<(ops node:$value, node:$addr), 592 (unindexedstore node:$value, node:$addr), 593 [{ return storeLoadCanUseMVC(N); }]>; 594 595// Binary read-modify-write operations on memory in which the other 596// operand is also memory and for which block operations like NC can 597// be used. There are two patterns for each operator, depending on 598// which operand contains the "other" load. 599multiclass block_op<SDPatternOperator operator> { 600 def "1" : PatFrag<(ops node:$value, node:$addr), 601 (unindexedstore (operator node:$value, 602 (unindexedload node:$addr)), 603 node:$addr), 604 [{ return storeLoadCanUseBlockBinary(N, 0); }]>; 605 def "2" : PatFrag<(ops node:$value, node:$addr), 606 (unindexedstore (operator (unindexedload node:$addr), 607 node:$value), 608 node:$addr), 609 [{ return storeLoadCanUseBlockBinary(N, 1); }]>; 610} 611defm block_and : block_op<and>; 612defm block_or : block_op<or>; 613defm block_xor : block_op<xor>; 614 615// Insertions. 616def inserti8 : PatFrag<(ops node:$src1, node:$src2), 617 (or (and node:$src1, -256), node:$src2)>; 618def insertll : PatFrag<(ops node:$src1, node:$src2), 619 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>; 620def insertlh : PatFrag<(ops node:$src1, node:$src2), 621 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>; 622def inserthl : PatFrag<(ops node:$src1, node:$src2), 623 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>; 624def inserthh : PatFrag<(ops node:$src1, node:$src2), 625 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>; 626def insertlf : PatFrag<(ops node:$src1, node:$src2), 627 (or (and node:$src1, 0xffffffff00000000), node:$src2)>; 628def inserthf : PatFrag<(ops node:$src1, node:$src2), 629 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>; 630 631// ORs that can be treated as insertions. 632def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2), 633 (or node:$src1, node:$src2), [{ 634 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 635 return CurDAG->MaskedValueIsZero(N->getOperand(0), 636 APInt::getLowBitsSet(BitWidth, 8)); 637}]>; 638 639// ORs that can be treated as reversed insertions. 640def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2), 641 (or node:$src1, node:$src2), [{ 642 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 643 return CurDAG->MaskedValueIsZero(N->getOperand(1), 644 APInt::getLowBitsSet(BitWidth, 8)); 645}]>; 646 647// Negative integer absolute. 648def z_inegabs : PatFrag<(ops node:$src), (ineg (z_iabs node:$src))>; 649 650// Integer absolute, matching the canonical form generated by DAGCombiner. 651def z_iabs32 : PatFrag<(ops node:$src), 652 (xor (add node:$src, (sra node:$src, (i32 31))), 653 (sra node:$src, (i32 31)))>; 654def z_iabs64 : PatFrag<(ops node:$src), 655 (xor (add node:$src, (sra node:$src, (i32 63))), 656 (sra node:$src, (i32 63)))>; 657def z_inegabs32 : PatFrag<(ops node:$src), (ineg (z_iabs32 node:$src))>; 658def z_inegabs64 : PatFrag<(ops node:$src), (ineg (z_iabs64 node:$src))>; 659 660// Integer multiply-and-add 661def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3), 662 (add (mul node:$src1, node:$src2), node:$src3)>; 663 664// Alternatives to match operations with or without an overflow CC result. 665def z_sadd : PatFrags<(ops node:$src1, node:$src2), 666 [(z_saddo node:$src1, node:$src2), 667 (add node:$src1, node:$src2)]>; 668def z_uadd : PatFrags<(ops node:$src1, node:$src2), 669 [(z_uaddo node:$src1, node:$src2), 670 (add node:$src1, node:$src2)]>; 671def z_ssub : PatFrags<(ops node:$src1, node:$src2), 672 [(z_ssubo node:$src1, node:$src2), 673 (sub node:$src1, node:$src2)]>; 674def z_usub : PatFrags<(ops node:$src1, node:$src2), 675 [(z_usubo node:$src1, node:$src2), 676 (sub node:$src1, node:$src2)]>; 677 678// Combined logical operations. 679def andc : PatFrag<(ops node:$src1, node:$src2), 680 (and node:$src1, (not node:$src2))>; 681def orc : PatFrag<(ops node:$src1, node:$src2), 682 (or node:$src1, (not node:$src2))>; 683def nand : PatFrag<(ops node:$src1, node:$src2), 684 (not (and node:$src1, node:$src2))>; 685def nor : PatFrag<(ops node:$src1, node:$src2), 686 (not (or node:$src1, node:$src2))>; 687def nxor : PatFrag<(ops node:$src1, node:$src2), 688 (not (xor node:$src1, node:$src2))>; 689 690// Fused multiply-subtract, using the natural operand order. 691def any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 692 (any_fma node:$src1, node:$src2, (fneg node:$src3))>; 693 694// Fused multiply-add and multiply-subtract, but with the order of the 695// operands matching SystemZ's MA and MS instructions. 696def z_any_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 697 (any_fma node:$src2, node:$src3, node:$src1)>; 698def z_any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 699 (any_fma node:$src2, node:$src3, (fneg node:$src1))>; 700 701// Negative fused multiply-add and multiply-subtract. 702def any_fnma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 703 (fneg (any_fma node:$src1, node:$src2, node:$src3))>; 704def any_fnms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 705 (fneg (any_fms node:$src1, node:$src2, node:$src3))>; 706 707// Floating-point negative absolute. 708def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>; 709 710// Create a unary operator that loads from memory and then performs 711// the given operation on it. 712class loadu<SDPatternOperator operator, SDPatternOperator load = load> 713 : PatFrag<(ops node:$addr), (operator (load node:$addr))>; 714 715// Create a store operator that performs the given unary operation 716// on the value before storing it. 717class storeu<SDPatternOperator operator, SDPatternOperator store = store> 718 : PatFrag<(ops node:$value, node:$addr), 719 (store (operator node:$value), node:$addr)>; 720 721// Create a store operator that performs the given inherent operation 722// and stores the resulting value. 723class storei<SDPatternOperator operator, SDPatternOperator store = store> 724 : PatFrag<(ops node:$addr), 725 (store (operator), node:$addr)>; 726 727// Create a shift operator that optionally ignores an AND of the 728// shift count with an immediate if the bottom 6 bits are all set. 729def imm32bottom6set : PatLeaf<(i32 imm), [{ 730 return (N->getZExtValue() & 0x3f) == 0x3f; 731}]>; 732class shiftop<SDPatternOperator operator> 733 : PatFrags<(ops node:$val, node:$count), 734 [(operator node:$val, node:$count), 735 (operator node:$val, (and node:$count, imm32bottom6set))]>; 736 737def imm32mod64 : PatLeaf<(i32 imm), [{ 738 return (N->getZExtValue() % 64 == 0); 739}]>; 740 741// Load a scalar and replicate it in all elements of a vector. 742class z_replicate_load<ValueType scalartype, SDPatternOperator load> 743 : PatFrag<(ops node:$addr), 744 (z_replicate (scalartype (load node:$addr)))>; 745def z_replicate_loadi8 : z_replicate_load<i32, anyextloadi8>; 746def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>; 747def z_replicate_loadi32 : z_replicate_load<i32, load>; 748def z_replicate_loadi64 : z_replicate_load<i64, load>; 749def z_replicate_loadf32 : z_replicate_load<f32, load>; 750def z_replicate_loadf64 : z_replicate_load<f64, load>; 751// Byte-swapped replicated vector element loads. 752def z_replicate_loadbswapi16 : z_replicate_load<i32, z_loadbswap16>; 753def z_replicate_loadbswapi32 : z_replicate_load<i32, z_loadbswap32>; 754def z_replicate_loadbswapi64 : z_replicate_load<i64, z_loadbswap64>; 755 756// Load a scalar and insert it into a single element of a vector. 757class z_vle<ValueType scalartype, SDPatternOperator load> 758 : PatFrag<(ops node:$vec, node:$addr, node:$index), 759 (z_vector_insert node:$vec, (scalartype (load node:$addr)), 760 node:$index)>; 761def z_vlei8 : z_vle<i32, anyextloadi8>; 762def z_vlei16 : z_vle<i32, anyextloadi16>; 763def z_vlei32 : z_vle<i32, load>; 764def z_vlei64 : z_vle<i64, load>; 765def z_vlef32 : z_vle<f32, load>; 766def z_vlef64 : z_vle<f64, load>; 767// Byte-swapped vector element loads. 768def z_vlebri16 : z_vle<i32, z_loadbswap16>; 769def z_vlebri32 : z_vle<i32, z_loadbswap32>; 770def z_vlebri64 : z_vle<i64, z_loadbswap64>; 771 772// Load a scalar and insert it into the low element of the high i64 of a 773// zeroed vector. 774class z_vllez<ValueType scalartype, SDPatternOperator load, int index> 775 : PatFrag<(ops node:$addr), 776 (z_vector_insert immAllZerosV, 777 (scalartype (load node:$addr)), (i32 index))>; 778def z_vllezi8 : z_vllez<i32, anyextloadi8, 7>; 779def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>; 780def z_vllezi32 : z_vllez<i32, load, 1>; 781def z_vllezi64 : PatFrags<(ops node:$addr), 782 [(z_vector_insert immAllZerosV, 783 (i64 (load node:$addr)), (i32 0)), 784 (z_join_dwords (i64 (load node:$addr)), (i64 0))]>; 785// We use high merges to form a v4f32 from four f32s. Propagating zero 786// into all elements but index 1 gives this expression. 787def z_vllezf32 : PatFrag<(ops node:$addr), 788 (z_merge_high 789 (v2i64 790 (z_unpackl_high 791 (v4i32 792 (bitconvert 793 (v4f32 (scalar_to_vector 794 (f32 (load node:$addr)))))))), 795 (v2i64 796 (bitconvert (v4f32 immAllZerosV))))>; 797def z_vllezf64 : PatFrag<(ops node:$addr), 798 (z_merge_high 799 (v2f64 (scalar_to_vector (f64 (load node:$addr)))), 800 immAllZerosV)>; 801 802// Similarly for the high element of a zeroed vector. 803def z_vllezli32 : z_vllez<i32, load, 0>; 804def z_vllezlf32 : PatFrag<(ops node:$addr), 805 (z_merge_high 806 (v2i64 807 (bitconvert 808 (z_merge_high 809 (v4f32 (scalar_to_vector 810 (f32 (load node:$addr)))), 811 (v4f32 immAllZerosV)))), 812 (v2i64 813 (bitconvert (v4f32 immAllZerosV))))>; 814 815// Byte-swapped variants. 816def z_vllebrzi16 : z_vllez<i32, z_loadbswap16, 3>; 817def z_vllebrzi32 : z_vllez<i32, z_loadbswap32, 1>; 818def z_vllebrzli32 : z_vllez<i32, z_loadbswap32, 0>; 819def z_vllebrzi64 : PatFrags<(ops node:$addr), 820 [(z_vector_insert immAllZerosV, 821 (i64 (z_loadbswap64 node:$addr)), 822 (i32 0)), 823 (z_join_dwords (i64 (z_loadbswap64 node:$addr)), 824 (i64 0))]>; 825 826 827// Store one element of a vector. 828class z_vste<ValueType scalartype, SDPatternOperator store> 829 : PatFrag<(ops node:$vec, node:$addr, node:$index), 830 (store (scalartype (z_vector_extract node:$vec, node:$index)), 831 node:$addr)>; 832def z_vstei8 : z_vste<i32, truncstorei8>; 833def z_vstei16 : z_vste<i32, truncstorei16>; 834def z_vstei32 : z_vste<i32, store>; 835def z_vstei64 : z_vste<i64, store>; 836def z_vstef32 : z_vste<f32, store>; 837def z_vstef64 : z_vste<f64, store>; 838// Byte-swapped vector element stores. 839def z_vstebri16 : z_vste<i32, z_storebswap16>; 840def z_vstebri32 : z_vste<i32, z_storebswap32>; 841def z_vstebri64 : z_vste<i64, z_storebswap64>; 842 843// Arithmetic negation on vectors. 844def z_vneg : PatFrag<(ops node:$x), (sub immAllZerosV, node:$x)>; 845 846// Bitwise negation on vectors. 847def z_vnot : PatFrag<(ops node:$x), (xor node:$x, immAllOnesV)>; 848 849// Signed "integer greater than zero" on vectors. 850def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, immAllZerosV)>; 851 852// Signed "integer less than zero" on vectors. 853def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph immAllZerosV, node:$x)>; 854 855// Integer absolute on vectors. 856class z_viabs<int shift> 857 : PatFrag<(ops node:$src), 858 (xor (add node:$src, (z_vsra_by_scalar node:$src, (i32 shift))), 859 (z_vsra_by_scalar node:$src, (i32 shift)))>; 860def z_viabs8 : z_viabs<7>; 861def z_viabs16 : z_viabs<15>; 862def z_viabs32 : z_viabs<31>; 863def z_viabs64 : z_viabs<63>; 864 865// Sign-extend the i64 elements of a vector. 866class z_vse<int shift> 867 : PatFrag<(ops node:$src), 868 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>; 869def z_vsei8 : z_vse<56>; 870def z_vsei16 : z_vse<48>; 871def z_vsei32 : z_vse<32>; 872 873// ...and again with the extensions being done on individual i64 scalars. 874class z_vse_by_parts<SDPatternOperator operator, int index1, int index2> 875 : PatFrag<(ops node:$src), 876 (z_join_dwords 877 (operator (z_vector_extract node:$src, index1)), 878 (operator (z_vector_extract node:$src, index2)))>; 879def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>; 880def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>; 881def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>; 882