1//===-- SystemZOperators.td - SystemZ-specific operators ------*- tblgen-*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9//===----------------------------------------------------------------------===// 10// Type profiles 11//===----------------------------------------------------------------------===// 12def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>, 13 SDTCisVT<1, i64>]>; 14def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>, 15 SDTCisVT<1, i64>]>; 16def SDT_ZCall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 17def SDT_ZCmp : SDTypeProfile<1, 2, 18 [SDTCisVT<0, i32>, 19 SDTCisSameAs<1, 2>]>; 20def SDT_ZICmp : SDTypeProfile<1, 3, 21 [SDTCisVT<0, i32>, 22 SDTCisSameAs<1, 2>, 23 SDTCisVT<3, i32>]>; 24def SDT_ZBRCCMask : SDTypeProfile<0, 4, 25 [SDTCisVT<0, i32>, 26 SDTCisVT<1, i32>, 27 SDTCisVT<2, OtherVT>, 28 SDTCisVT<3, i32>]>; 29def SDT_ZSelectCCMask : SDTypeProfile<1, 5, 30 [SDTCisSameAs<0, 1>, 31 SDTCisSameAs<1, 2>, 32 SDTCisVT<3, i32>, 33 SDTCisVT<4, i32>, 34 SDTCisVT<5, i32>]>; 35def SDT_ZWrapPtr : SDTypeProfile<1, 1, 36 [SDTCisSameAs<0, 1>, 37 SDTCisPtrTy<0>]>; 38def SDT_ZWrapOffset : SDTypeProfile<1, 2, 39 [SDTCisSameAs<0, 1>, 40 SDTCisSameAs<0, 2>, 41 SDTCisPtrTy<0>]>; 42def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>; 43def SDT_ZProbedAlloca : SDTypeProfile<1, 2, 44 [SDTCisSameAs<0, 1>, 45 SDTCisSameAs<0, 2>, 46 SDTCisPtrTy<0>]>; 47def SDT_ZGR128Binary : SDTypeProfile<1, 2, 48 [SDTCisVT<0, untyped>, 49 SDTCisInt<1>, 50 SDTCisInt<2>]>; 51def SDT_ZBinaryWithFlags : SDTypeProfile<2, 2, 52 [SDTCisInt<0>, 53 SDTCisVT<1, i32>, 54 SDTCisSameAs<0, 2>, 55 SDTCisSameAs<0, 3>]>; 56def SDT_ZBinaryWithCarry : SDTypeProfile<2, 3, 57 [SDTCisInt<0>, 58 SDTCisVT<1, i32>, 59 SDTCisSameAs<0, 2>, 60 SDTCisSameAs<0, 3>, 61 SDTCisVT<1, i32>]>; 62def SDT_ZBinaryConv : SDTypeProfile<1, 2, 63 [SDTCisInt<0>, 64 SDTCisInt<1>, 65 SDTCisSameAs<1, 2>]>; 66def SDT_ZTernary : SDTypeProfile<1, 3, 67 [SDTCisInt<0>, 68 SDTCisSameAs<0, 1>, 69 SDTCisSameAs<0, 2>, 70 SDTCisSameAs<0, 3>]>; 71def SDT_ZAtomicLoadBinaryW : SDTypeProfile<1, 5, 72 [SDTCisVT<0, i32>, 73 SDTCisPtrTy<1>, 74 SDTCisVT<2, i32>, 75 SDTCisVT<3, i32>, 76 SDTCisVT<4, i32>, 77 SDTCisVT<5, i32>]>; 78def SDT_ZAtomicCmpSwapW : SDTypeProfile<2, 6, 79 [SDTCisVT<0, i32>, 80 SDTCisVT<1, i32>, 81 SDTCisPtrTy<2>, 82 SDTCisVT<3, i32>, 83 SDTCisVT<4, i32>, 84 SDTCisVT<5, i32>, 85 SDTCisVT<6, i32>, 86 SDTCisVT<7, i32>]>; 87def SDT_ZAtomicCmpSwap : SDTypeProfile<2, 3, 88 [SDTCisInt<0>, 89 SDTCisVT<1, i32>, 90 SDTCisPtrTy<2>, 91 SDTCisSameAs<0, 3>, 92 SDTCisSameAs<0, 4>]>; 93def SDT_ZAtomicLoad128 : SDTypeProfile<1, 1, 94 [SDTCisVT<0, untyped>, 95 SDTCisPtrTy<1>]>; 96def SDT_ZAtomicStore128 : SDTypeProfile<0, 2, 97 [SDTCisVT<0, untyped>, 98 SDTCisPtrTy<1>]>; 99def SDT_ZAtomicCmpSwap128 : SDTypeProfile<2, 3, 100 [SDTCisVT<0, untyped>, 101 SDTCisVT<1, i32>, 102 SDTCisPtrTy<2>, 103 SDTCisVT<3, untyped>, 104 SDTCisVT<4, untyped>]>; 105def SDT_ZMemMemLength : SDTypeProfile<0, 3, 106 [SDTCisPtrTy<0>, 107 SDTCisPtrTy<1>, 108 SDTCisVT<2, i64>]>; 109def SDT_ZMemMemLengthCC : SDTypeProfile<1, 3, 110 [SDTCisVT<0, i32>, 111 SDTCisPtrTy<1>, 112 SDTCisPtrTy<2>, 113 SDTCisVT<3, i64>]>; 114def SDT_ZMemsetMVC : SDTypeProfile<0, 3, 115 [SDTCisPtrTy<0>, 116 SDTCisVT<1, i64>, 117 SDTCisVT<2, i32>]>; 118def SDT_ZString : SDTypeProfile<1, 3, 119 [SDTCisPtrTy<0>, 120 SDTCisPtrTy<1>, 121 SDTCisPtrTy<2>, 122 SDTCisVT<3, i32>]>; 123def SDT_ZStringCC : SDTypeProfile<2, 3, 124 [SDTCisPtrTy<0>, 125 SDTCisVT<1, i32>, 126 SDTCisPtrTy<2>, 127 SDTCisPtrTy<3>, 128 SDTCisVT<4, i32>]>; 129def SDT_ZIPM : SDTypeProfile<1, 1, 130 [SDTCisVT<0, i32>, 131 SDTCisVT<1, i32>]>; 132def SDT_ZPrefetch : SDTypeProfile<0, 2, 133 [SDTCisVT<0, i32>, 134 SDTCisPtrTy<1>]>; 135def SDT_ZTBegin : SDTypeProfile<1, 2, 136 [SDTCisVT<0, i32>, 137 SDTCisPtrTy<1>, 138 SDTCisVT<2, i32>]>; 139def SDT_ZADAENTRY : SDTypeProfile<1, 3, 140 [SDTCisPtrTy<0>, 141 SDTCisPtrTy<1>, 142 SDTCisPtrTy<2>, 143 SDTCisVT<3, i64>]>; 144def SDT_ZTEnd : SDTypeProfile<1, 0, 145 [SDTCisVT<0, i32>]>; 146def SDT_ZInsertVectorElt : SDTypeProfile<1, 3, 147 [SDTCisVec<0>, 148 SDTCisSameAs<0, 1>, 149 SDTCisVT<3, i32>]>; 150def SDT_ZExtractVectorElt : SDTypeProfile<1, 2, 151 [SDTCisVec<1>, 152 SDTCisVT<2, i32>]>; 153def SDT_ZReplicate : SDTypeProfile<1, 1, 154 [SDTCisVec<0>]>; 155def SDT_ZVecUnaryConv : SDTypeProfile<1, 1, 156 [SDTCisVec<0>, 157 SDTCisVec<1>]>; 158def SDT_ZVecUnary : SDTypeProfile<1, 1, 159 [SDTCisVec<0>, 160 SDTCisSameAs<0, 1>]>; 161def SDT_ZVecUnaryCC : SDTypeProfile<2, 1, 162 [SDTCisVec<0>, 163 SDTCisVT<1, i32>, 164 SDTCisSameAs<0, 2>]>; 165def SDT_ZVecBinary : SDTypeProfile<1, 2, 166 [SDTCisVec<0>, 167 SDTCisSameAs<0, 1>, 168 SDTCisSameAs<0, 2>]>; 169def SDT_ZVecBinaryCC : SDTypeProfile<2, 2, 170 [SDTCisVec<0>, 171 SDTCisVT<1, i32>, 172 SDTCisSameAs<0, 2>, 173 SDTCisSameAs<0, 2>]>; 174def SDT_ZVecBinaryInt : SDTypeProfile<1, 2, 175 [SDTCisVec<0>, 176 SDTCisSameAs<0, 1>, 177 SDTCisVT<2, i32>]>; 178def SDT_ZVecBinaryConv : SDTypeProfile<1, 2, 179 [SDTCisVec<0>, 180 SDTCisVec<1>, 181 SDTCisSameAs<1, 2>]>; 182def SDT_ZVecBinaryConvCC : SDTypeProfile<2, 2, 183 [SDTCisVec<0>, 184 SDTCisVT<1, i32>, 185 SDTCisVec<2>, 186 SDTCisSameAs<2, 3>]>; 187def SDT_ZVecBinaryConvIntCC : SDTypeProfile<2, 2, 188 [SDTCisVec<0>, 189 SDTCisVT<1, i32>, 190 SDTCisVec<2>, 191 SDTCisVT<3, i32>]>; 192def SDT_ZRotateMask : SDTypeProfile<1, 2, 193 [SDTCisVec<0>, 194 SDTCisVT<1, i32>, 195 SDTCisVT<2, i32>]>; 196def SDT_ZJoinDwords : SDTypeProfile<1, 2, 197 [SDTCisVT<0, v2i64>, 198 SDTCisVT<1, i64>, 199 SDTCisVT<2, i64>]>; 200def SDT_ZVecTernary : SDTypeProfile<1, 3, 201 [SDTCisVec<0>, 202 SDTCisSameAs<0, 1>, 203 SDTCisSameAs<0, 2>, 204 SDTCisSameAs<0, 3>]>; 205def SDT_ZVecTernaryConvCC : SDTypeProfile<2, 3, 206 [SDTCisVec<0>, 207 SDTCisVT<1, i32>, 208 SDTCisVec<2>, 209 SDTCisSameAs<2, 3>, 210 SDTCisSameAs<0, 4>]>; 211def SDT_ZVecTernaryInt : SDTypeProfile<1, 3, 212 [SDTCisVec<0>, 213 SDTCisSameAs<0, 1>, 214 SDTCisSameAs<0, 2>, 215 SDTCisVT<3, i32>]>; 216def SDT_ZVecTernaryIntCC : SDTypeProfile<2, 3, 217 [SDTCisVec<0>, 218 SDTCisVT<1, i32>, 219 SDTCisSameAs<0, 2>, 220 SDTCisSameAs<0, 3>, 221 SDTCisVT<4, i32>]>; 222def SDT_ZVecQuaternaryInt : SDTypeProfile<1, 4, 223 [SDTCisVec<0>, 224 SDTCisSameAs<0, 1>, 225 SDTCisSameAs<0, 2>, 226 SDTCisSameAs<0, 3>, 227 SDTCisVT<4, i32>]>; 228def SDT_ZVecQuaternaryIntCC : SDTypeProfile<2, 4, 229 [SDTCisVec<0>, 230 SDTCisVT<1, i32>, 231 SDTCisSameAs<0, 2>, 232 SDTCisSameAs<0, 3>, 233 SDTCisSameAs<0, 4>, 234 SDTCisVT<5, i32>]>; 235def SDT_ZTest : SDTypeProfile<1, 2, 236 [SDTCisVT<0, i32>, 237 SDTCisVT<2, i64>]>; 238 239//===----------------------------------------------------------------------===// 240// Node definitions 241//===----------------------------------------------------------------------===// 242 243// These are target-independent nodes, but have target-specific formats. 244def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_CallSeqStart, 245 [SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>; 246def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_CallSeqEnd, 247 [SDNPHasChain, SDNPSideEffect, SDNPOptInGlue, 248 SDNPOutGlue]>; 249def global_offset_table : SDNode<"ISD::GLOBAL_OFFSET_TABLE", SDTPtrLeaf>; 250 251// Nodes for SystemZISD::*. See SystemZISelLowering.h for more details. 252def z_retglue : SDNode<"SystemZISD::RET_GLUE", SDTNone, 253 [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; 254def z_call : SDNode<"SystemZISD::CALL", SDT_ZCall, 255 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 256 SDNPVariadic]>; 257def z_sibcall : SDNode<"SystemZISD::SIBCALL", SDT_ZCall, 258 [SDNPHasChain, SDNPOutGlue, SDNPOptInGlue, 259 SDNPVariadic]>; 260def z_tls_gdcall : SDNode<"SystemZISD::TLS_GDCALL", SDT_ZCall, 261 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 262 SDNPVariadic]>; 263def z_tls_ldcall : SDNode<"SystemZISD::TLS_LDCALL", SDT_ZCall, 264 [SDNPHasChain, SDNPInGlue, SDNPOutGlue, 265 SDNPVariadic]>; 266def z_pcrel_wrapper : SDNode<"SystemZISD::PCREL_WRAPPER", SDT_ZWrapPtr, []>; 267def z_pcrel_offset : SDNode<"SystemZISD::PCREL_OFFSET", 268 SDT_ZWrapOffset, []>; 269def z_icmp : SDNode<"SystemZISD::ICMP", SDT_ZICmp>; 270def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp>; 271def z_strict_fcmp : SDNode<"SystemZISD::STRICT_FCMP", SDT_ZCmp, 272 [SDNPHasChain]>; 273def z_strict_fcmps : SDNode<"SystemZISD::STRICT_FCMPS", SDT_ZCmp, 274 [SDNPHasChain]>; 275def z_tm : SDNode<"SystemZISD::TM", SDT_ZICmp>; 276def z_br_ccmask_1 : SDNode<"SystemZISD::BR_CCMASK", SDT_ZBRCCMask, 277 [SDNPHasChain]>; 278def z_select_ccmask_1 : SDNode<"SystemZISD::SELECT_CCMASK", 279 SDT_ZSelectCCMask>; 280def z_ipm_1 : SDNode<"SystemZISD::IPM", SDT_ZIPM>; 281def z_adjdynalloc : SDNode<"SystemZISD::ADJDYNALLOC", SDT_ZAdjDynAlloc>; 282def z_probed_alloca : SDNode<"SystemZISD::PROBED_ALLOCA", SDT_ZProbedAlloca, 283 [SDNPHasChain]>; 284def z_popcnt : SDNode<"SystemZISD::POPCNT", SDTIntUnaryOp>; 285def z_smul_lohi : SDNode<"SystemZISD::SMUL_LOHI", SDT_ZGR128Binary>; 286def z_umul_lohi : SDNode<"SystemZISD::UMUL_LOHI", SDT_ZGR128Binary>; 287def z_sdivrem : SDNode<"SystemZISD::SDIVREM", SDT_ZGR128Binary>; 288def z_udivrem : SDNode<"SystemZISD::UDIVREM", SDT_ZGR128Binary>; 289def z_saddo : SDNode<"SystemZISD::SADDO", SDT_ZBinaryWithFlags>; 290def z_ssubo : SDNode<"SystemZISD::SSUBO", SDT_ZBinaryWithFlags>; 291def z_uaddo : SDNode<"SystemZISD::UADDO", SDT_ZBinaryWithFlags>; 292def z_usubo : SDNode<"SystemZISD::USUBO", SDT_ZBinaryWithFlags>; 293def z_addcarry_1 : SDNode<"SystemZISD::ADDCARRY", SDT_ZBinaryWithCarry>; 294def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>; 295def z_vacc : SDNode<"SystemZISD::VACC", SDTIntBinOp>; 296def z_vac : SDNode<"SystemZISD::VAC", SDT_ZTernary>; 297def z_vaccc : SDNode<"SystemZISD::VACCC", SDT_ZTernary>; 298def z_vscbi : SDNode<"SystemZISD::VSCBI", SDTIntBinOp>; 299def z_vsbi : SDNode<"SystemZISD::VSBI", SDT_ZTernary>; 300def z_vsbcbi : SDNode<"SystemZISD::VSBCBI", SDT_ZTernary>; 301 302def z_loadbswap : SDNode<"SystemZISD::LRV", SDTLoad, 303 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 304def z_storebswap : SDNode<"SystemZISD::STRV", SDTStore, 305 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 306def z_loadeswap : SDNode<"SystemZISD::VLER", SDTLoad, 307 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 308def z_storeeswap : SDNode<"SystemZISD::VSTER", SDTStore, 309 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 310 311def z_tdc : SDNode<"SystemZISD::TDC", SDT_ZTest>; 312 313// Defined because the index is an i32 rather than a pointer. 314def z_vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT", 315 SDT_ZInsertVectorElt>; 316def z_vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT", 317 SDT_ZExtractVectorElt>; 318def z_byte_mask : SDNode<"SystemZISD::BYTE_MASK", SDT_ZReplicate>; 319def z_rotate_mask : SDNode<"SystemZISD::ROTATE_MASK", SDT_ZRotateMask>; 320def z_replicate : SDNode<"SystemZISD::REPLICATE", SDT_ZReplicate>; 321def z_join_dwords : SDNode<"SystemZISD::JOIN_DWORDS", SDT_ZJoinDwords>; 322def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>; 323def z_merge_high : SDNode<"SystemZISD::MERGE_HIGH", SDT_ZVecBinary>; 324def z_merge_low : SDNode<"SystemZISD::MERGE_LOW", SDT_ZVecBinary>; 325def z_shl_double : SDNode<"SystemZISD::SHL_DOUBLE", SDT_ZVecTernaryInt>; 326def z_permute_dwords : SDNode<"SystemZISD::PERMUTE_DWORDS", 327 SDT_ZVecTernaryInt>; 328def z_permute : SDNode<"SystemZISD::PERMUTE", SDT_ZVecTernary>; 329def z_pack : SDNode<"SystemZISD::PACK", SDT_ZVecBinaryConv>; 330def z_packs_cc : SDNode<"SystemZISD::PACKS_CC", SDT_ZVecBinaryConvCC>; 331def z_packls_cc : SDNode<"SystemZISD::PACKLS_CC", SDT_ZVecBinaryConvCC>; 332def z_unpack_high : SDNode<"SystemZISD::UNPACK_HIGH", SDT_ZVecUnaryConv>; 333def z_unpackl_high : SDNode<"SystemZISD::UNPACKL_HIGH", SDT_ZVecUnaryConv>; 334def z_unpack_low : SDNode<"SystemZISD::UNPACK_LOW", SDT_ZVecUnaryConv>; 335def z_unpackl_low : SDNode<"SystemZISD::UNPACKL_LOW", SDT_ZVecUnaryConv>; 336def z_vshl_by_scalar : SDNode<"SystemZISD::VSHL_BY_SCALAR", 337 SDT_ZVecBinaryInt>; 338def z_vsrl_by_scalar : SDNode<"SystemZISD::VSRL_BY_SCALAR", 339 SDT_ZVecBinaryInt>; 340def z_vsra_by_scalar : SDNode<"SystemZISD::VSRA_BY_SCALAR", 341 SDT_ZVecBinaryInt>; 342def z_vrotl_by_scalar : SDNode<"SystemZISD::VROTL_BY_SCALAR", 343 SDT_ZVecBinaryInt>; 344def z_vsum : SDNode<"SystemZISD::VSUM", SDT_ZBinaryConv>; 345def z_vicmpe : SDNode<"SystemZISD::VICMPE", SDT_ZVecBinary>; 346def z_vicmph : SDNode<"SystemZISD::VICMPH", SDT_ZVecBinary>; 347def z_vicmphl : SDNode<"SystemZISD::VICMPHL", SDT_ZVecBinary>; 348def z_vicmpes : SDNode<"SystemZISD::VICMPES", SDT_ZVecBinaryCC>; 349def z_vicmphs : SDNode<"SystemZISD::VICMPHS", SDT_ZVecBinaryCC>; 350def z_vicmphls : SDNode<"SystemZISD::VICMPHLS", SDT_ZVecBinaryCC>; 351def z_vfcmpe : SDNode<"SystemZISD::VFCMPE", SDT_ZVecBinaryConv>; 352def z_strict_vfcmpe : SDNode<"SystemZISD::STRICT_VFCMPE", 353 SDT_ZVecBinaryConv, [SDNPHasChain]>; 354def z_strict_vfcmpes : SDNode<"SystemZISD::STRICT_VFCMPES", 355 SDT_ZVecBinaryConv, [SDNPHasChain]>; 356def z_vfcmph : SDNode<"SystemZISD::VFCMPH", SDT_ZVecBinaryConv>; 357def z_strict_vfcmph : SDNode<"SystemZISD::STRICT_VFCMPH", 358 SDT_ZVecBinaryConv, [SDNPHasChain]>; 359def z_strict_vfcmphs : SDNode<"SystemZISD::STRICT_VFCMPHS", 360 SDT_ZVecBinaryConv, [SDNPHasChain]>; 361def z_vfcmphe : SDNode<"SystemZISD::VFCMPHE", SDT_ZVecBinaryConv>; 362def z_strict_vfcmphe : SDNode<"SystemZISD::STRICT_VFCMPHE", 363 SDT_ZVecBinaryConv, [SDNPHasChain]>; 364def z_strict_vfcmphes : SDNode<"SystemZISD::STRICT_VFCMPHES", 365 SDT_ZVecBinaryConv, [SDNPHasChain]>; 366def z_vfcmpes : SDNode<"SystemZISD::VFCMPES", SDT_ZVecBinaryConvCC>; 367def z_vfcmphs : SDNode<"SystemZISD::VFCMPHS", SDT_ZVecBinaryConvCC>; 368def z_vfcmphes : SDNode<"SystemZISD::VFCMPHES", SDT_ZVecBinaryConvCC>; 369def z_vextend : SDNode<"SystemZISD::VEXTEND", SDT_ZVecUnaryConv>; 370def z_strict_vextend : SDNode<"SystemZISD::STRICT_VEXTEND", 371 SDT_ZVecUnaryConv, [SDNPHasChain]>; 372def z_vround : SDNode<"SystemZISD::VROUND", SDT_ZVecUnaryConv>; 373def z_strict_vround : SDNode<"SystemZISD::STRICT_VROUND", 374 SDT_ZVecUnaryConv, [SDNPHasChain]>; 375def z_vtm : SDNode<"SystemZISD::VTM", SDT_ZCmp>; 376def z_scmp128hi : SDNode<"SystemZISD::SCMP128HI", SDT_ZCmp>; 377def z_ucmp128hi : SDNode<"SystemZISD::UCMP128HI", SDT_ZCmp>; 378def z_vfae_cc : SDNode<"SystemZISD::VFAE_CC", SDT_ZVecTernaryIntCC>; 379def z_vfaez_cc : SDNode<"SystemZISD::VFAEZ_CC", SDT_ZVecTernaryIntCC>; 380def z_vfee_cc : SDNode<"SystemZISD::VFEE_CC", SDT_ZVecBinaryCC>; 381def z_vfeez_cc : SDNode<"SystemZISD::VFEEZ_CC", SDT_ZVecBinaryCC>; 382def z_vfene_cc : SDNode<"SystemZISD::VFENE_CC", SDT_ZVecBinaryCC>; 383def z_vfenez_cc : SDNode<"SystemZISD::VFENEZ_CC", SDT_ZVecBinaryCC>; 384def z_vistr_cc : SDNode<"SystemZISD::VISTR_CC", SDT_ZVecUnaryCC>; 385def z_vstrc_cc : SDNode<"SystemZISD::VSTRC_CC", 386 SDT_ZVecQuaternaryIntCC>; 387def z_vstrcz_cc : SDNode<"SystemZISD::VSTRCZ_CC", 388 SDT_ZVecQuaternaryIntCC>; 389def z_vstrs_cc : SDNode<"SystemZISD::VSTRS_CC", 390 SDT_ZVecTernaryConvCC>; 391def z_vstrsz_cc : SDNode<"SystemZISD::VSTRSZ_CC", 392 SDT_ZVecTernaryConvCC>; 393def z_vftci : SDNode<"SystemZISD::VFTCI", SDT_ZVecBinaryConvIntCC>; 394 395class AtomicWOp<string name, SDTypeProfile profile = SDT_ZAtomicLoadBinaryW> 396 : SDNode<"SystemZISD::"#name, profile, 397 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; 398 399def z_atomic_swapw : AtomicWOp<"ATOMIC_SWAPW">; 400def z_atomic_loadw_add : AtomicWOp<"ATOMIC_LOADW_ADD">; 401def z_atomic_loadw_sub : AtomicWOp<"ATOMIC_LOADW_SUB">; 402def z_atomic_loadw_and : AtomicWOp<"ATOMIC_LOADW_AND">; 403def z_atomic_loadw_or : AtomicWOp<"ATOMIC_LOADW_OR">; 404def z_atomic_loadw_xor : AtomicWOp<"ATOMIC_LOADW_XOR">; 405def z_atomic_loadw_nand : AtomicWOp<"ATOMIC_LOADW_NAND">; 406def z_atomic_loadw_min : AtomicWOp<"ATOMIC_LOADW_MIN">; 407def z_atomic_loadw_max : AtomicWOp<"ATOMIC_LOADW_MAX">; 408def z_atomic_loadw_umin : AtomicWOp<"ATOMIC_LOADW_UMIN">; 409def z_atomic_loadw_umax : AtomicWOp<"ATOMIC_LOADW_UMAX">; 410 411def z_atomic_cmp_swap : SDNode<"SystemZISD::ATOMIC_CMP_SWAP", 412 SDT_ZAtomicCmpSwap, 413 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 414 SDNPMemOperand]>; 415def z_atomic_cmp_swapw : SDNode<"SystemZISD::ATOMIC_CMP_SWAPW", 416 SDT_ZAtomicCmpSwapW, 417 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 418 SDNPMemOperand]>; 419 420def z_atomic_load_128 : SDNode<"SystemZISD::ATOMIC_LOAD_128", 421 SDT_ZAtomicLoad128, 422 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; 423def z_atomic_store_128 : SDNode<"SystemZISD::ATOMIC_STORE_128", 424 SDT_ZAtomicStore128, 425 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; 426def z_atomic_cmp_swap_128 : SDNode<"SystemZISD::ATOMIC_CMP_SWAP_128", 427 SDT_ZAtomicCmpSwap128, 428 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, 429 SDNPMemOperand]>; 430 431def z_mvc : SDNode<"SystemZISD::MVC", SDT_ZMemMemLength, 432 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 433def z_nc : SDNode<"SystemZISD::NC", SDT_ZMemMemLength, 434 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 435def z_oc : SDNode<"SystemZISD::OC", SDT_ZMemMemLength, 436 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 437def z_xc : SDNode<"SystemZISD::XC", SDT_ZMemMemLength, 438 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 439def z_clc : SDNode<"SystemZISD::CLC", SDT_ZMemMemLengthCC, 440 [SDNPHasChain, SDNPMayLoad]>; 441def z_memset_mvc : SDNode<"SystemZISD::MEMSET_MVC", SDT_ZMemsetMVC, 442 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 443def z_strcmp : SDNode<"SystemZISD::STRCMP", SDT_ZStringCC, 444 [SDNPHasChain, SDNPMayLoad]>; 445def z_stpcpy : SDNode<"SystemZISD::STPCPY", SDT_ZString, 446 [SDNPHasChain, SDNPMayStore, SDNPMayLoad]>; 447def z_search_string : SDNode<"SystemZISD::SEARCH_STRING", SDT_ZStringCC, 448 [SDNPHasChain, SDNPMayLoad]>; 449def z_prefetch : SDNode<"SystemZISD::PREFETCH", SDT_ZPrefetch, 450 [SDNPHasChain, SDNPMayLoad, SDNPMayStore, 451 SDNPMemOperand]>; 452 453def z_tbegin : SDNode<"SystemZISD::TBEGIN", SDT_ZTBegin, 454 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 455def z_tbegin_nofloat : SDNode<"SystemZISD::TBEGIN_NOFLOAT", SDT_ZTBegin, 456 [SDNPHasChain, SDNPMayStore, SDNPSideEffect]>; 457def z_tend : SDNode<"SystemZISD::TEND", SDT_ZTEnd, 458 [SDNPHasChain, SDNPSideEffect]>; 459 460def z_ada_entry : SDNode<"SystemZISD::ADA_ENTRY", 461 SDT_ZADAENTRY>; 462 463def z_vshl : SDNode<"ISD::SHL", SDT_ZVecBinary>; 464def z_vsra : SDNode<"ISD::SRA", SDT_ZVecBinary>; 465def z_vsrl : SDNode<"ISD::SRL", SDT_ZVecBinary>; 466 467//===----------------------------------------------------------------------===// 468// Pattern fragments 469//===----------------------------------------------------------------------===// 470 471def z_loadbswap16 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 472 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 473}]>; 474def z_loadbswap32 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 475 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 476}]>; 477def z_loadbswap64 : PatFrag<(ops node:$addr), (z_loadbswap node:$addr), [{ 478 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 479}]>; 480 481def z_storebswap16 : PatFrag<(ops node:$src, node:$addr), 482 (z_storebswap node:$src, node:$addr), [{ 483 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i16; 484}]>; 485def z_storebswap32 : PatFrag<(ops node:$src, node:$addr), 486 (z_storebswap node:$src, node:$addr), [{ 487 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i32; 488}]>; 489def z_storebswap64 : PatFrag<(ops node:$src, node:$addr), 490 (z_storebswap node:$src, node:$addr), [{ 491 return cast<MemIntrinsicSDNode>(N)->getMemoryVT() == MVT::i64; 492}]>; 493 494// Fragments including CC as an implicit source. 495def z_br_ccmask 496 : PatFrag<(ops node:$valid, node:$mask, node:$bb), 497 (z_br_ccmask_1 node:$valid, node:$mask, node:$bb, CC)>; 498def z_select_ccmask 499 : PatFrag<(ops node:$true, node:$false, node:$valid, node:$mask), 500 (z_select_ccmask_1 node:$true, node:$false, 501 node:$valid, node:$mask, CC)>; 502def z_ipm : PatFrag<(ops), (z_ipm_1 CC)>; 503def z_addcarry : PatFrag<(ops node:$lhs, node:$rhs), 504 (z_addcarry_1 node:$lhs, node:$rhs, CC)>; 505def z_subcarry : PatFrag<(ops node:$lhs, node:$rhs), 506 (z_subcarry_1 node:$lhs, node:$rhs, CC)>; 507 508// Signed and unsigned comparisons. 509def z_scmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{ 510 unsigned Type = N->getConstantOperandVal(2); 511 return Type != SystemZICMP::UnsignedOnly; 512}]>; 513def z_ucmp : PatFrag<(ops node:$a, node:$b), (z_icmp node:$a, node:$b, timm), [{ 514 unsigned Type = N->getConstantOperandVal(2); 515 return Type != SystemZICMP::SignedOnly; 516}]>; 517 518// Register- and memory-based TEST UNDER MASK. 519def z_tm_reg : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, timm)>; 520def z_tm_mem : PatFrag<(ops node:$a, node:$b), (z_tm node:$a, node:$b, 0)>; 521 522// Register sign-extend operations. Sub-32-bit values are represented as i32s. 523def sext8 : PatFrag<(ops node:$src), (sext_inreg node:$src, i8)>; 524def sext16 : PatFrag<(ops node:$src), (sext_inreg node:$src, i16)>; 525def sext32 : PatFrag<(ops node:$src), (sext (i32 node:$src))>; 526 527// Match extensions of an i32 to an i64, followed by an in-register sign 528// extension from a sub-i32 value. 529def sext8dbl : PatFrag<(ops node:$src), (sext8 (anyext node:$src))>; 530def sext16dbl : PatFrag<(ops node:$src), (sext16 (anyext node:$src))>; 531 532// Register zero-extend operations. Sub-32-bit values are represented as i32s. 533def zext8 : PatFrag<(ops node:$src), (and node:$src, 0xff)>; 534def zext16 : PatFrag<(ops node:$src), (and node:$src, 0xffff)>; 535def zext32 : PatFrag<(ops node:$src), (zext (i32 node:$src))>; 536 537// Extending loads in which the extension type can be signed. 538def asextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 539 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 540 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD; 541}]>; 542def asextloadi8 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 543 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 544}]>; 545def asextloadi16 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 546 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 547}]>; 548def asextloadi32 : PatFrag<(ops node:$ptr), (asextload node:$ptr), [{ 549 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 550}]>; 551 552// Extending loads in which the extension type can be unsigned. 553def azextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 554 unsigned Type = cast<LoadSDNode>(N)->getExtensionType(); 555 return Type == ISD::EXTLOAD || Type == ISD::ZEXTLOAD; 556}]>; 557def azextloadi8 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 558 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 559}]>; 560def azextloadi16 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 561 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 562}]>; 563def azextloadi32 : PatFrag<(ops node:$ptr), (azextload node:$ptr), [{ 564 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 565}]>; 566 567// Extending loads in which the extension type doesn't matter. 568def anyextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ 569 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD; 570}]>; 571def anyextloadi8 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 572 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; 573}]>; 574def anyextloadi16 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 575 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; 576}]>; 577def anyextloadi32 : PatFrag<(ops node:$ptr), (anyextload node:$ptr), [{ 578 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32; 579}]>; 580 581// Aligned loads. 582class AlignedLoad<SDPatternOperator load> 583 : PatFrag<(ops node:$addr), (load node:$addr), 584 [{ return storeLoadIsAligned(N); }]>; 585def aligned_load : AlignedLoad<load>; 586def aligned_asextloadi16 : AlignedLoad<asextloadi16>; 587def aligned_asextloadi32 : AlignedLoad<asextloadi32>; 588def aligned_azextloadi16 : AlignedLoad<azextloadi16>; 589def aligned_azextloadi32 : AlignedLoad<azextloadi32>; 590 591// Aligned stores. 592class AlignedStore<SDPatternOperator store> 593 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), 594 [{ return storeLoadIsAligned(N); }]>; 595def aligned_store : AlignedStore<store>; 596def aligned_truncstorei16 : AlignedStore<truncstorei16>; 597def aligned_truncstorei32 : AlignedStore<truncstorei32>; 598 599// Non-volatile loads. Used for instructions that might access the storage 600// location multiple times. 601class NonvolatileLoad<SDPatternOperator load> 602 : PatFrag<(ops node:$addr), (load node:$addr), [{ 603 auto *Load = cast<LoadSDNode>(N); 604 return !Load->isVolatile(); 605}]>; 606def nonvolatile_anyextloadi8 : NonvolatileLoad<anyextloadi8>; 607def nonvolatile_anyextloadi16 : NonvolatileLoad<anyextloadi16>; 608def nonvolatile_anyextloadi32 : NonvolatileLoad<anyextloadi32>; 609 610// Non-volatile stores. 611class NonvolatileStore<SDPatternOperator store> 612 : PatFrag<(ops node:$src, node:$addr), (store node:$src, node:$addr), [{ 613 auto *Store = cast<StoreSDNode>(N); 614 return !Store->isVolatile(); 615}]>; 616def nonvolatile_truncstorei8 : NonvolatileStore<truncstorei8>; 617def nonvolatile_truncstorei16 : NonvolatileStore<truncstorei16>; 618def nonvolatile_truncstorei32 : NonvolatileStore<truncstorei32>; 619 620// A store of a load that can be implemented using MVC. 621def mvc_store : PatFrag<(ops node:$value, node:$addr), 622 (unindexedstore node:$value, node:$addr), 623 [{ return storeLoadCanUseMVC(N); }]>; 624 625// Binary read-modify-write operations on memory in which the other 626// operand is also memory and for which block operations like NC can 627// be used. There are two patterns for each operator, depending on 628// which operand contains the "other" load. 629multiclass block_op<SDPatternOperator operator> { 630 def "1" : PatFrag<(ops node:$value, node:$addr), 631 (unindexedstore (operator node:$value, 632 (unindexedload node:$addr)), 633 node:$addr), 634 [{ return storeLoadCanUseBlockBinary(N, 0); }]>; 635 def "2" : PatFrag<(ops node:$value, node:$addr), 636 (unindexedstore (operator (unindexedload node:$addr), 637 node:$value), 638 node:$addr), 639 [{ return storeLoadCanUseBlockBinary(N, 1); }]>; 640} 641defm block_and : block_op<and>; 642defm block_or : block_op<or>; 643defm block_xor : block_op<xor>; 644 645// Insertions. 646def inserti8 : PatFrag<(ops node:$src1, node:$src2), 647 (or (and node:$src1, -256), node:$src2)>; 648def insertll : PatFrag<(ops node:$src1, node:$src2), 649 (or (and node:$src1, 0xffffffffffff0000), node:$src2)>; 650def insertlh : PatFrag<(ops node:$src1, node:$src2), 651 (or (and node:$src1, 0xffffffff0000ffff), node:$src2)>; 652def inserthl : PatFrag<(ops node:$src1, node:$src2), 653 (or (and node:$src1, 0xffff0000ffffffff), node:$src2)>; 654def inserthh : PatFrag<(ops node:$src1, node:$src2), 655 (or (and node:$src1, 0x0000ffffffffffff), node:$src2)>; 656def insertlf : PatFrag<(ops node:$src1, node:$src2), 657 (or (and node:$src1, 0xffffffff00000000), node:$src2)>; 658def inserthf : PatFrag<(ops node:$src1, node:$src2), 659 (or (and node:$src1, 0x00000000ffffffff), node:$src2)>; 660 661// ORs that can be treated as insertions. 662def or_as_inserti8 : PatFrag<(ops node:$src1, node:$src2), 663 (or node:$src1, node:$src2), [{ 664 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 665 return CurDAG->MaskedValueIsZero(N->getOperand(0), 666 APInt::getLowBitsSet(BitWidth, 8)); 667}]>; 668 669// ORs that can be treated as reversed insertions. 670def or_as_revinserti8 : PatFrag<(ops node:$src1, node:$src2), 671 (or node:$src1, node:$src2), [{ 672 unsigned BitWidth = N->getValueType(0).getScalarSizeInBits(); 673 return CurDAG->MaskedValueIsZero(N->getOperand(1), 674 APInt::getLowBitsSet(BitWidth, 8)); 675}]>; 676 677// Negative integer absolute. 678def z_inegabs : PatFrag<(ops node:$src), (ineg (abs node:$src))>; 679 680// Integer multiply-and-add 681def z_muladd : PatFrag<(ops node:$src1, node:$src2, node:$src3), 682 (add (mul node:$src1, node:$src2), node:$src3)>; 683 684// Alternatives to match operations with or without an overflow CC result. 685def z_sadd : PatFrags<(ops node:$src1, node:$src2), 686 [(z_saddo node:$src1, node:$src2), 687 (add node:$src1, node:$src2)]>; 688def z_uadd : PatFrags<(ops node:$src1, node:$src2), 689 [(z_uaddo node:$src1, node:$src2), 690 (add node:$src1, node:$src2)]>; 691def z_ssub : PatFrags<(ops node:$src1, node:$src2), 692 [(z_ssubo node:$src1, node:$src2), 693 (sub node:$src1, node:$src2)]>; 694def z_usub : PatFrags<(ops node:$src1, node:$src2), 695 [(z_usubo node:$src1, node:$src2), 696 (sub node:$src1, node:$src2)]>; 697 698// Combined logical operations. 699def andc : PatFrag<(ops node:$src1, node:$src2), 700 (and node:$src1, (not node:$src2))>; 701def orc : PatFrag<(ops node:$src1, node:$src2), 702 (or node:$src1, (not node:$src2))>; 703def nand : PatFrag<(ops node:$src1, node:$src2), 704 (not (and node:$src1, node:$src2))>; 705def nor : PatFrag<(ops node:$src1, node:$src2), 706 (not (or node:$src1, node:$src2))>; 707def nxor : PatFrag<(ops node:$src1, node:$src2), 708 (not (xor node:$src1, node:$src2))>; 709 710// Fused multiply-subtract, using the natural operand order. 711def any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 712 (any_fma node:$src1, node:$src2, (fneg node:$src3))>; 713 714// Fused multiply-add and multiply-subtract, but with the order of the 715// operands matching SystemZ's MA and MS instructions. 716def z_any_fma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 717 (any_fma node:$src2, node:$src3, node:$src1)>; 718def z_any_fms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 719 (any_fma node:$src2, node:$src3, (fneg node:$src1))>; 720 721// Negative fused multiply-add and multiply-subtract. 722def any_fnma : PatFrag<(ops node:$src1, node:$src2, node:$src3), 723 (fneg (any_fma node:$src1, node:$src2, node:$src3))>; 724def any_fnms : PatFrag<(ops node:$src1, node:$src2, node:$src3), 725 (fneg (any_fms node:$src1, node:$src2, node:$src3))>; 726 727// Floating-point negative absolute. 728def fnabs : PatFrag<(ops node:$ptr), (fneg (fabs node:$ptr))>; 729 730// Strict floating-point fragments. 731def z_any_fcmp : PatFrags<(ops node:$lhs, node:$rhs), 732 [(z_strict_fcmp node:$lhs, node:$rhs), 733 (z_fcmp node:$lhs, node:$rhs)]>; 734def z_any_vfcmpe : PatFrags<(ops node:$lhs, node:$rhs), 735 [(z_strict_vfcmpe node:$lhs, node:$rhs), 736 (z_vfcmpe node:$lhs, node:$rhs)]>; 737def z_any_vfcmph : PatFrags<(ops node:$lhs, node:$rhs), 738 [(z_strict_vfcmph node:$lhs, node:$rhs), 739 (z_vfcmph node:$lhs, node:$rhs)]>; 740def z_any_vfcmphe : PatFrags<(ops node:$lhs, node:$rhs), 741 [(z_strict_vfcmphe node:$lhs, node:$rhs), 742 (z_vfcmphe node:$lhs, node:$rhs)]>; 743def z_any_vextend : PatFrags<(ops node:$src), 744 [(z_strict_vextend node:$src), 745 (z_vextend node:$src)]>; 746def z_any_vround : PatFrags<(ops node:$src), 747 [(z_strict_vround node:$src), 748 (z_vround node:$src)]>; 749 750// Create a unary operator that loads from memory and then performs 751// the given operation on it. 752class loadu<SDPatternOperator operator, SDPatternOperator load = load> 753 : PatFrag<(ops node:$addr), (operator (load node:$addr))>; 754 755// Create a store operator that performs the given unary operation 756// on the value before storing it. 757class storeu<SDPatternOperator operator, SDPatternOperator store = store> 758 : PatFrag<(ops node:$value, node:$addr), 759 (store (operator node:$value), node:$addr)>; 760 761// Create a store operator that performs the given inherent operation 762// and stores the resulting value. 763class storei<SDPatternOperator operator, SDPatternOperator store = store> 764 : PatFrag<(ops node:$addr), 765 (store (operator), node:$addr)>; 766 767// Create a shift operator that optionally ignores an AND of the 768// shift count with an immediate if the bottom 6 bits are all set. 769def imm32bottom6set : PatLeaf<(i32 imm), [{ 770 return (N->getZExtValue() & 0x3f) == 0x3f; 771}]>; 772class shiftop<SDPatternOperator operator> 773 : PatFrags<(ops node:$val, node:$count), 774 [(operator node:$val, node:$count), 775 (operator node:$val, (and node:$count, imm32bottom6set))]>; 776 777// Create a shift operator that optionally ignores an AND of the 778// shift count with an immediate if the bottom 7 bits are all set. 779def imm32bottom7set : PatLeaf<(i32 imm), [{ 780 return (N->getZExtValue() & 0x7f) == 0x7f; 781}]>; 782class vshiftop<SDPatternOperator operator> 783 : PatFrags<(ops node:$val, node:$count), 784 [(operator node:$val, node:$count), 785 (operator node:$val, (and node:$count, imm32bottom7set))]>; 786 787def imm32mod64 : PatLeaf<(i32 imm), [{ 788 return (N->getZExtValue() % 64 == 0); 789}]>; 790 791def imm32nobits : PatLeaf<(i32 imm), [{ 792 return (N->getZExtValue() & 0x07) == 0; 793}]>; 794def imm32nobytes : PatLeaf<(i32 imm), [{ 795 return (N->getZExtValue() & 0x78) == 0; 796}]>; 797 798// Load a scalar and replicate it in all elements of a vector. 799class z_replicate_load<ValueType scalartype, SDPatternOperator load> 800 : PatFrag<(ops node:$addr), 801 (z_replicate (scalartype (load node:$addr)))>; 802def z_replicate_loadi8 : z_replicate_load<i32, anyextloadi8>; 803def z_replicate_loadi16 : z_replicate_load<i32, anyextloadi16>; 804def z_replicate_loadi32 : z_replicate_load<i32, load>; 805def z_replicate_loadi64 : z_replicate_load<i64, load>; 806def z_replicate_loadf32 : z_replicate_load<f32, load>; 807def z_replicate_loadf64 : z_replicate_load<f64, load>; 808// Byte-swapped replicated vector element loads. 809def z_replicate_loadbswapi16 : z_replicate_load<i32, z_loadbswap16>; 810def z_replicate_loadbswapi32 : z_replicate_load<i32, z_loadbswap32>; 811def z_replicate_loadbswapi64 : z_replicate_load<i64, z_loadbswap64>; 812 813// Load a scalar and insert it into a single element of a vector. 814class z_vle<ValueType scalartype, SDPatternOperator load> 815 : PatFrag<(ops node:$vec, node:$addr, node:$index), 816 (z_vector_insert node:$vec, (scalartype (load node:$addr)), 817 node:$index)>; 818def z_vlei8 : z_vle<i32, anyextloadi8>; 819def z_vlei16 : z_vle<i32, anyextloadi16>; 820def z_vlei32 : z_vle<i32, load>; 821def z_vlei64 : z_vle<i64, load>; 822def z_vlef32 : z_vle<f32, load>; 823def z_vlef64 : z_vle<f64, load>; 824// Byte-swapped vector element loads. 825def z_vlebri16 : z_vle<i32, z_loadbswap16>; 826def z_vlebri32 : z_vle<i32, z_loadbswap32>; 827def z_vlebri64 : z_vle<i64, z_loadbswap64>; 828 829// Load a scalar and insert it into the low element of the high i64 of a 830// zeroed vector. 831class z_vllez<ValueType scalartype, SDPatternOperator load, int index> 832 : PatFrag<(ops node:$addr), 833 (z_vector_insert immAllZerosV, 834 (scalartype (load node:$addr)), (i32 index))>; 835def z_vllezi8 : z_vllez<i32, anyextloadi8, 7>; 836def z_vllezi16 : z_vllez<i32, anyextloadi16, 3>; 837def z_vllezi32 : z_vllez<i32, load, 1>; 838def z_vllezi64 : PatFrags<(ops node:$addr), 839 [(z_vector_insert immAllZerosV, 840 (i64 (load node:$addr)), (i32 0)), 841 (z_join_dwords (i64 (load node:$addr)), (i64 0))]>; 842// We use high merges to form a v4f32 from four f32s. Propagating zero 843// into all elements but index 1 gives this expression. 844def z_vllezf32 : PatFrag<(ops node:$addr), 845 (z_merge_high 846 (v2i64 847 (z_unpackl_high 848 (v4i32 849 (bitconvert 850 (v4f32 (scalar_to_vector 851 (f32 (load node:$addr)))))))), 852 (v2i64 853 (bitconvert (v4f32 immAllZerosV))))>; 854def z_vllezf64 : PatFrag<(ops node:$addr), 855 (z_merge_high 856 (v2f64 (scalar_to_vector (f64 (load node:$addr)))), 857 immAllZerosV)>; 858 859// Similarly for the high element of a zeroed vector. 860def z_vllezli32 : z_vllez<i32, load, 0>; 861def z_vllezlf32 : PatFrag<(ops node:$addr), 862 (z_merge_high 863 (v2i64 864 (bitconvert 865 (z_merge_high 866 (v4f32 (scalar_to_vector 867 (f32 (load node:$addr)))), 868 (v4f32 immAllZerosV)))), 869 (v2i64 870 (bitconvert (v4f32 immAllZerosV))))>; 871 872// Byte-swapped variants. 873def z_vllebrzi16 : z_vllez<i32, z_loadbswap16, 3>; 874def z_vllebrzi32 : z_vllez<i32, z_loadbswap32, 1>; 875def z_vllebrzli32 : z_vllez<i32, z_loadbswap32, 0>; 876def z_vllebrzi64 : PatFrags<(ops node:$addr), 877 [(z_vector_insert immAllZerosV, 878 (i64 (z_loadbswap64 node:$addr)), 879 (i32 0)), 880 (z_join_dwords (i64 (z_loadbswap64 node:$addr)), 881 (i64 0))]>; 882 883 884// Store one element of a vector. 885class z_vste<ValueType scalartype, SDPatternOperator store> 886 : PatFrag<(ops node:$vec, node:$addr, node:$index), 887 (store (scalartype (z_vector_extract node:$vec, node:$index)), 888 node:$addr)>; 889def z_vstei8 : z_vste<i32, truncstorei8>; 890def z_vstei16 : z_vste<i32, truncstorei16>; 891def z_vstei32 : z_vste<i32, store>; 892def z_vstei64 : z_vste<i64, store>; 893def z_vstef32 : z_vste<f32, store>; 894def z_vstef64 : z_vste<f64, store>; 895// Byte-swapped vector element stores. 896def z_vstebri16 : z_vste<i32, z_storebswap16>; 897def z_vstebri32 : z_vste<i32, z_storebswap32>; 898def z_vstebri64 : z_vste<i64, z_storebswap64>; 899 900// Arithmetic negation on vectors. 901def z_vneg : PatFrag<(ops node:$x), (sub immAllZerosV, node:$x)>; 902 903// Bitwise negation on vectors. 904def z_vnot : PatFrag<(ops node:$x), (xor node:$x, immAllOnesV)>; 905 906// Signed "integer greater than zero" on vectors. 907def z_vicmph_zero : PatFrag<(ops node:$x), (z_vicmph node:$x, immAllZerosV)>; 908 909// Signed "integer less than zero" on vectors. 910def z_vicmpl_zero : PatFrag<(ops node:$x), (z_vicmph immAllZerosV, node:$x)>; 911 912// Sign-extend the i64 elements of a vector. 913class z_vse<int shift> 914 : PatFrag<(ops node:$src), 915 (z_vsra_by_scalar (z_vshl_by_scalar node:$src, shift), shift)>; 916def z_vsei8 : z_vse<56>; 917def z_vsei16 : z_vse<48>; 918def z_vsei32 : z_vse<32>; 919 920// ...and again with the extensions being done on individual i64 scalars. 921class z_vse_by_parts<SDPatternOperator operator, int index1, int index2> 922 : PatFrag<(ops node:$src), 923 (z_join_dwords 924 (operator (z_vector_extract node:$src, index1)), 925 (operator (z_vector_extract node:$src, index2)))>; 926def z_vsei8_by_parts : z_vse_by_parts<sext8dbl, 7, 15>; 927def z_vsei16_by_parts : z_vse_by_parts<sext16dbl, 3, 7>; 928def z_vsei32_by_parts : z_vse_by_parts<sext32, 1, 3>; 929