xref: /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZCallingConv.td (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71) 
1//=- SystemZCallingConv.td - Calling conventions for SystemZ -*- tablegen -*-=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8// This describes the calling conventions for the SystemZ ABI.
9//===----------------------------------------------------------------------===//
10
11class CCIfExtend<CCAction A>
12  : CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>;
13
14class CCIfSubtarget<string F, CCAction A>
15  : CCIf<!strconcat("static_cast<const SystemZSubtarget&>"
16                    "(State.getMachineFunction().getSubtarget()).", F),
17         A>;
18
19// Match if this specific argument is a fixed (i.e. named) argument.
20class CCIfFixed<CCAction A>
21    : CCIf<"static_cast<SystemZCCState *>(&State)->IsFixed(ValNo)", A>;
22
23// Match if this specific argument was widened from a short vector type.
24class CCIfShortVector<CCAction A>
25    : CCIf<"static_cast<SystemZCCState *>(&State)->IsShortVector(ValNo)", A>;
26
27
28//===----------------------------------------------------------------------===//
29// z/Linux return value calling convention
30//===----------------------------------------------------------------------===//
31def RetCC_SystemZ : CallingConv<[
32  // Promote i32 to i64 if it has an explicit extension type.
33  CCIfType<[i32], CCIfExtend<CCPromoteToType<i64>>>,
34
35  // A SwiftError is returned in R9.
36  CCIfSwiftError<CCIfType<[i64], CCAssignToReg<[R9D]>>>,
37
38  // ABI-compliant code returns 64-bit integers in R2.  Make the other
39  // call-clobbered argument registers available for code that doesn't
40  // care about the ABI.  (R6 is an argument register too, but is
41  // call-saved and therefore not suitable for return values.)
42  CCIfType<[i32], CCAssignToReg<[R2L, R3L, R4L, R5L]>>,
43  CCIfType<[i64], CCAssignToReg<[R2D, R3D, R4D, R5D]>>,
44
45  // ABI-complaint code returns float and double in F0.  Make the
46  // other floating-point argument registers available for code that
47  // doesn't care about the ABI.  All floating-point argument registers
48  // are call-clobbered, so we can use all of them here.
49  CCIfType<[f32], CCAssignToReg<[F0S, F2S, F4S, F6S]>>,
50  CCIfType<[f64], CCAssignToReg<[F0D, F2D, F4D, F6D]>>,
51
52  // Similarly for vectors, with V24 being the ABI-compliant choice.
53  // Sub-128 vectors are returned in the same way, but they're widened
54  // to one of these types during type legalization.
55  CCIfSubtarget<"hasVector()",
56    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
57             CCAssignToReg<[V24, V26, V28, V30, V25, V27, V29, V31]>>>
58]>;
59
60//===----------------------------------------------------------------------===//
61// z/Linux argument calling conventions for GHC
62//===----------------------------------------------------------------------===//
63def CC_SystemZ_GHC : CallingConv<[
64  // Pass in STG registers: Base, Sp, Hp, R1, R2, R3, R4, R5, R6, R7, R8, SpLim
65  CCIfType<[i64], CCAssignToReg<[R7D, R8D, R10D, R11D, R12D, R13D,
66                                 R6D, R2D, R3D, R4D, R5D, R9D]>>,
67
68  // Pass in STG registers: F1, ..., F6
69  CCIfType<[f32], CCAssignToReg<[F8S, F9S, F10S, F11S, F0S, F1S]>>,
70
71  // Pass in STG registers: D1, ..., D6
72  CCIfType<[f64], CCAssignToReg<[F12D, F13D, F14D, F15D, F2D, F3D]>>,
73
74  // Pass in STG registers: XMM1, ..., XMM6
75  CCIfSubtarget<"hasVector()",
76    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
77             CCIfFixed<CCAssignToReg<[V16, V17, V18, V19, V20, V21]>>>>,
78
79  // Fail otherwise
80  CCCustom<"CC_SystemZ_GHC_Error">
81]>;
82
83//===----------------------------------------------------------------------===//
84// z/Linux argument calling conventions
85//===----------------------------------------------------------------------===//
86def CC_SystemZ : CallingConv<[
87  CCIfCC<"CallingConv::GHC", CCDelegateTo<CC_SystemZ_GHC>>,
88
89  // Promote i32 to i64 if it has an explicit extension type.
90  // The convention is that true integer arguments that are smaller
91  // than 64 bits should be marked as extended, but structures that
92  // are smaller than 64 bits shouldn't.
93  CCIfType<[i32], CCIfExtend<CCPromoteToType<i64>>>,
94
95  // A SwiftSelf is passed in callee-saved R10.
96  CCIfSwiftSelf<CCIfType<[i64], CCAssignToReg<[R10D]>>>,
97
98  // A SwiftError is passed in callee-saved R9.
99  CCIfSwiftError<CCIfType<[i64], CCAssignToReg<[R9D]>>>,
100
101  // Force long double values to the stack and pass i64 pointers to them.
102  CCIfType<[f128], CCPassIndirect<i64>>,
103  // Same for i128 values.  These are already split into two i64 here,
104  // so we have to use a custom handler.
105  CCIfType<[i64], CCCustom<"CC_SystemZ_I128Indirect">>,
106
107  // The first 5 integer arguments are passed in R2-R6.  Note that R6
108  // is call-saved.
109  CCIfType<[i32], CCAssignToReg<[R2L, R3L, R4L, R5L, R6L]>>,
110  CCIfType<[i64], CCAssignToReg<[R2D, R3D, R4D, R5D, R6D]>>,
111
112  // The first 4 float and double arguments are passed in even registers F0-F6.
113  CCIfType<[f32], CCAssignToReg<[F0S, F2S, F4S, F6S]>>,
114  CCIfType<[f64], CCAssignToReg<[F0D, F2D, F4D, F6D]>>,
115
116  // The first 8 named vector arguments are passed in V24-V31.  Sub-128 vectors
117  // are passed in the same way, but they're widened to one of these types
118  // during type legalization.
119  CCIfSubtarget<"hasVector()",
120    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
121             CCIfFixed<CCAssignToReg<[V24, V26, V28, V30,
122                                      V25, V27, V29, V31]>>>>,
123
124  // However, sub-128 vectors which need to go on the stack occupy just a
125  // single 8-byte-aligned 8-byte stack slot.  Pass as i64.
126  CCIfSubtarget<"hasVector()",
127    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
128             CCIfShortVector<CCBitConvertToType<i64>>>>,
129
130  // Other vector arguments are passed in 8-byte-aligned 16-byte stack slots.
131  CCIfSubtarget<"hasVector()",
132    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
133             CCAssignToStack<16, 8>>>,
134
135  // Other arguments are passed in 8-byte-aligned 8-byte stack slots.
136  CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>
137]>;
138
139//===----------------------------------------------------------------------===//
140// z/Linux callee-saved registers
141//===----------------------------------------------------------------------===//
142def CSR_SystemZ : CalleeSavedRegs<(add (sequence "R%dD", 6, 15),
143                                       (sequence "F%dD", 8, 15))>;
144
145// R9 is used to return SwiftError; remove it from CSR.
146def CSR_SystemZ_SwiftError : CalleeSavedRegs<(sub CSR_SystemZ, R9D)>;
147
148// "All registers" as used by the AnyReg calling convention.
149// Note that registers 0 and 1 are still defined as intra-call scratch
150// registers that may be clobbered e.g. by PLT stubs.
151def CSR_SystemZ_AllRegs : CalleeSavedRegs<(add (sequence "R%dD", 2, 15),
152                                               (sequence "F%dD", 0, 15))>;
153def CSR_SystemZ_AllRegs_Vector : CalleeSavedRegs<(add (sequence "R%dD", 2, 15),
154                                                      (sequence "V%d", 0, 31))>;
155
156def CSR_SystemZ_NoRegs : CalleeSavedRegs<(add)>;
157
158