xref: /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZCallingConv.td (revision 5956d97f4b3204318ceb6aa9c77bd0bc6ea87a41)
1//=- SystemZCallingConv.td - Calling conventions for SystemZ -*- tablegen -*-=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8// This describes the calling conventions for the SystemZ ABI.
9//===----------------------------------------------------------------------===//
10
11class CCIfExtend<CCAction A>
12  : CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>;
13
14class CCIfSubtarget<string F, CCAction A>
15  : CCIf<!strconcat("static_cast<const SystemZSubtarget&>"
16                    "(State.getMachineFunction().getSubtarget()).", F),
17         A>;
18
19// Match if this specific argument is a fixed (i.e. named) argument.
20class CCIfFixed<CCAction A>
21    : CCIf<"static_cast<SystemZCCState *>(&State)->IsFixed(ValNo)", A>;
22
23// Match if this specific argument is not a fixed (i.e. vararg) argument.
24class CCIfNotFixed<CCAction A>
25    : CCIf<"!(static_cast<SystemZCCState *>(&State)->IsFixed(ValNo))", A>;
26
27// Match if this specific argument was widened from a short vector type.
28class CCIfShortVector<CCAction A>
29    : CCIf<"static_cast<SystemZCCState *>(&State)->IsShortVector(ValNo)", A>;
30
31
32//===----------------------------------------------------------------------===//
33// z/Linux return value calling convention
34//===----------------------------------------------------------------------===//
35def RetCC_SystemZ_ELF : CallingConv<[
36  // Promote i32 to i64 if it has an explicit extension type.
37  CCIfType<[i32], CCIfExtend<CCPromoteToType<i64>>>,
38
39  // A SwiftError is returned in R9.
40  CCIfSwiftError<CCIfType<[i64], CCAssignToReg<[R9D]>>>,
41
42  // ABI-compliant code returns 64-bit integers in R2.  Make the other
43  // call-clobbered argument registers available for code that doesn't
44  // care about the ABI.  (R6 is an argument register too, but is
45  // call-saved and therefore not suitable for return values.)
46  CCIfType<[i32], CCAssignToReg<[R2L, R3L, R4L, R5L]>>,
47  CCIfType<[i64], CCAssignToReg<[R2D, R3D, R4D, R5D]>>,
48
49  // ABI-complaint code returns float and double in F0.  Make the
50  // other floating-point argument registers available for code that
51  // doesn't care about the ABI.  All floating-point argument registers
52  // are call-clobbered, so we can use all of them here.
53  CCIfType<[f32], CCAssignToReg<[F0S, F2S, F4S, F6S]>>,
54  CCIfType<[f64], CCAssignToReg<[F0D, F2D, F4D, F6D]>>,
55
56  // Similarly for vectors, with V24 being the ABI-compliant choice.
57  // Sub-128 vectors are returned in the same way, but they're widened
58  // to one of these types during type legalization.
59  CCIfSubtarget<"hasVector()",
60    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
61             CCAssignToReg<[V24, V26, V28, V30, V25, V27, V29, V31]>>>
62]>;
63
64//===----------------------------------------------------------------------===//
65// z/Linux argument calling conventions for GHC
66//===----------------------------------------------------------------------===//
67def CC_SystemZ_GHC : CallingConv<[
68  // Pass in STG registers: Base, Sp, Hp, R1, R2, R3, R4, R5, R6, R7, R8, SpLim
69  CCIfType<[i64], CCAssignToReg<[R7D, R8D, R10D, R11D, R12D, R13D,
70                                 R6D, R2D, R3D, R4D, R5D, R9D]>>,
71
72  // Pass in STG registers: F1, ..., F6
73  CCIfType<[f32], CCAssignToReg<[F8S, F9S, F10S, F11S, F0S, F1S]>>,
74
75  // Pass in STG registers: D1, ..., D6
76  CCIfType<[f64], CCAssignToReg<[F12D, F13D, F14D, F15D, F2D, F3D]>>,
77
78  // Pass in STG registers: XMM1, ..., XMM6
79  CCIfSubtarget<"hasVector()",
80    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
81             CCIfFixed<CCAssignToReg<[V16, V17, V18, V19, V20, V21]>>>>,
82
83  // Fail otherwise
84  CCCustom<"CC_SystemZ_GHC_Error">
85]>;
86
87//===----------------------------------------------------------------------===//
88// z/Linux argument calling conventions
89//===----------------------------------------------------------------------===//
90def CC_SystemZ_ELF : CallingConv<[
91  CCIfCC<"CallingConv::GHC", CCDelegateTo<CC_SystemZ_GHC>>,
92
93  // Promote i32 to i64 if it has an explicit extension type.
94  // The convention is that true integer arguments that are smaller
95  // than 64 bits should be marked as extended, but structures that
96  // are smaller than 64 bits shouldn't.
97  CCIfType<[i32], CCIfExtend<CCPromoteToType<i64>>>,
98
99  // A SwiftSelf is passed in callee-saved R10.
100  CCIfSwiftSelf<CCIfType<[i64], CCAssignToReg<[R10D]>>>,
101
102  // A SwiftError is passed in callee-saved R9.
103  CCIfSwiftError<CCIfType<[i64], CCAssignToReg<[R9D]>>>,
104
105  // Force long double values to the stack and pass i64 pointers to them.
106  CCIfType<[f128], CCPassIndirect<i64>>,
107  // Same for i128 values.  These are already split into two i64 here,
108  // so we have to use a custom handler.
109  CCIfType<[i64], CCCustom<"CC_SystemZ_I128Indirect">>,
110
111  // The first 5 integer arguments are passed in R2-R6.  Note that R6
112  // is call-saved.
113  CCIfType<[i32], CCAssignToReg<[R2L, R3L, R4L, R5L, R6L]>>,
114  CCIfType<[i64], CCAssignToReg<[R2D, R3D, R4D, R5D, R6D]>>,
115
116  // The first 4 float and double arguments are passed in even registers F0-F6.
117  CCIfType<[f32], CCAssignToReg<[F0S, F2S, F4S, F6S]>>,
118  CCIfType<[f64], CCAssignToReg<[F0D, F2D, F4D, F6D]>>,
119
120  // The first 8 named vector arguments are passed in V24-V31.  Sub-128 vectors
121  // are passed in the same way, but they're widened to one of these types
122  // during type legalization.
123  CCIfSubtarget<"hasVector()",
124    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
125             CCIfFixed<CCAssignToReg<[V24, V26, V28, V30,
126                                      V25, V27, V29, V31]>>>>,
127
128  // However, sub-128 vectors which need to go on the stack occupy just a
129  // single 8-byte-aligned 8-byte stack slot.  Pass as i64.
130  CCIfSubtarget<"hasVector()",
131    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
132             CCIfShortVector<CCBitConvertToType<i64>>>>,
133
134  // Other vector arguments are passed in 8-byte-aligned 16-byte stack slots.
135  CCIfSubtarget<"hasVector()",
136    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
137             CCAssignToStack<16, 8>>>,
138
139  // Other arguments are passed in 8-byte-aligned 8-byte stack slots.
140  CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>
141]>;
142
143//===----------------------------------------------------------------------===//
144// z/Linux callee-saved registers
145//===----------------------------------------------------------------------===//
146def CSR_SystemZ_ELF : CalleeSavedRegs<(add (sequence "R%dD", 6, 15),
147                                       (sequence "F%dD", 8, 15))>;
148
149// R9 is used to return SwiftError; remove it from CSR.
150def CSR_SystemZ_SwiftError : CalleeSavedRegs<(sub CSR_SystemZ_ELF, R9D)>;
151
152// "All registers" as used by the AnyReg calling convention.
153// Note that registers 0 and 1 are still defined as intra-call scratch
154// registers that may be clobbered e.g. by PLT stubs.
155def CSR_SystemZ_AllRegs : CalleeSavedRegs<(add (sequence "R%dD", 2, 15),
156                                               (sequence "F%dD", 0, 15))>;
157def CSR_SystemZ_AllRegs_Vector : CalleeSavedRegs<(add (sequence "R%dD", 2, 15),
158                                                      (sequence "V%d", 0, 31))>;
159
160def CSR_SystemZ_NoRegs : CalleeSavedRegs<(add)>;
161
162//===----------------------------------------------------------------------===//
163// z/OS XPLINK64 callee-saved registers
164//===----------------------------------------------------------------------===//
165// %R7D is volatile by the spec, but it must be saved in the prologue by
166// any non-leaf function and restored in the epilogue for use by the
167// return instruction so it functions exactly like a callee-saved register.
168def CSR_SystemZ_XPLINK64 : CalleeSavedRegs<(add (sequence "R%dD", 7, 15),
169                                                (sequence "R%dD", 4, 4),
170                                                (sequence "F%dD", 15, 8))>;
171
172def CSR_SystemZ_XPLINK64_Vector : CalleeSavedRegs<(add CSR_SystemZ_XPLINK64,
173                                                   (sequence "V%d", 23, 16))>;
174
175//===----------------------------------------------------------------------===//
176// z/OS XPLINK64 return value calling convention
177//===----------------------------------------------------------------------===//
178def RetCC_SystemZ_XPLINK64 : CallingConv<[
179  // XPLINK64 ABI compliant code widens integral types smaller than i64
180  // to i64.
181  CCIfType<[i32], CCPromoteToType<i64>>,
182
183  // Structs of size 1-24 bytes are returned in R1D, R2D, and R3D.
184  CCIfType<[i64], CCIfInReg<CCAssignToReg<[R1D, R2D, R3D]>>>,
185  // An i64 is returned in R3D. R2D and R1D provided for ABI non-compliant
186  // code.
187  CCIfType<[i64], CCAssignToReg<[R3D, R2D, R1D]>>,
188
189  // ABI compliant code returns floating point values in FPR0, FPR2, FPR4
190  // and FPR6, using as many registers as required.
191  // All floating point return-value registers are call-clobbered.
192  CCIfType<[f32], CCAssignToReg<[F0S, F2S, F4S, F6S]>>,
193  CCIfType<[f64], CCAssignToReg<[F0D, F2D, F4D, F6D]>>,
194
195  // ABI compliant code returns f128 in F0D and F2D, hence F0Q.
196  // F4D and F6D, hence F4Q are used for complex long double types.
197  CCIfType<[f128], CCAssignToReg<[F0Q,F4Q]>>,
198
199  // ABI compliant code returns vectors in VR24 but other registers
200  // are provided for code that does not care about the ABI.
201  CCIfSubtarget<"hasVector()",
202    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
203             CCAssignToReg<[V24, V25, V26, V27, V28, V29, V30, V31]>>>
204]>;
205
206//===----------------------------------------------------------------------===//
207// z/OS XPLINK64 argument calling conventions
208//===----------------------------------------------------------------------===//
209// XPLink uses a logical argument list consisting of contiguous register-size
210// words (8 bytes in 64-Bit mode) where some arguments are passed in registers
211// and some in storage.
212// Even though 3 GPRs, 4 FPRs, and 8 VRs may be used,
213// space must be reserved for all the args on stack.
214// The first three register-sized words of the parameter area are passed in
215// GPRs 1-3. FP values and vector-type arguments are instead passed in FPRs
216// and VRs respectively, but if a FP value or vector argument occupies one of
217// the first three register-sized words of the parameter area, the corresponding
218// GPR's value is not used to pass arguments.
219//
220// The XPLINK64 Calling Convention is fully specified in Chapter 22 of the z/OS
221// Language Environment Vendor Interfaces. Appendix B of the same document contains
222// examples.
223
224def CC_SystemZ_XPLINK64 : CallingConv<[
225  // XPLINK64 ABI compliant code widens integral types smaller than i64
226  // to i64 before placing the parameters either on the stack or in registers.
227  CCIfType<[i32], CCIfExtend<CCPromoteToType<i64>>>,
228  // Promote f32 to f64 and bitcast to i64, if it needs to be passed in GPRS.
229  CCIfType<[f32], CCIfNotFixed<CCPromoteToType<f64>>>,
230  CCIfType<[f64], CCIfNotFixed<CCBitConvertToType<i64>>>,
231  // long double, can only be passed in GPR2 and GPR3, if available,
232  // hence R2Q
233  CCIfType<[f128], CCIfNotFixed<CCCustom<"CC_XPLINK64_Allocate128BitVararg">>>,
234  // Non fixed vector arguments are treated in the same way as long
235  // doubles.
236  CCIfSubtarget<"hasVector()",
237    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
238      CCIfNotFixed<CCCustom<"CC_XPLINK64_Allocate128BitVararg">>>>,
239
240  // A SwiftSelf is passed in callee-saved R10.
241  CCIfSwiftSelf<CCIfType<[i64], CCAssignToReg<[R10D]>>>,
242
243  // A SwiftError is passed in R0.
244  CCIfSwiftError<CCIfType<[i64], CCAssignToReg<[R0D]>>>,
245
246  // First i128 values. These are already split into two i64 here,
247  // so we have to use a custom handler and assign into registers, if possible
248  // We need to deal with this first
249  CCIfType<[i64], CCCustom<"CC_SystemZ_I128Indirect">>,
250  // The first 3 integer arguments are passed in registers R1D-R3D.
251  // The rest will be passed in the user area. The address offset of the user
252  // area can be found in register R4D.
253  CCIfType<[i64], CCCustom<"CC_XPLINK64_Shadow_Stack">>,
254  CCIfType<[i64], CCAssignToReg<[R1D, R2D, R3D]>>,
255
256  // The first 8 named vector arguments are passed in V24-V31.  Sub-128 vectors
257  // are passed in the same way, but they're widened to one of these types
258  // during type legalization.
259  CCIfSubtarget<"hasVector()",
260    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
261             CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Reg">>>>,
262  CCIfSubtarget<"hasVector()",
263    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
264             CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Stack">>>>,
265  CCIfSubtarget<"hasVector()",
266    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
267             CCIfFixed<CCAssignToReg<[V24, V25, V26, V27,
268                                      V28, V29, V30, V31]>>>>,
269
270  // The first 4 named  float and double arguments are passed in registers FPR0-FPR6.
271  // The rest will be passed in the user area.
272  CCIfType<[f32, f64], CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Reg">>>,
273  CCIfType<[f32, f64], CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Stack">>>,
274  CCIfType<[f32], CCIfFixed<CCAssignToReg<[F0S, F2S, F4S, F6S]>>>,
275  CCIfType<[f64], CCIfFixed<CCAssignToReg<[F0D, F2D, F4D, F6D]>>>,
276  // The first 2 long double arguments are passed in register FPR0/FPR2
277  // and FPR4/FPR6. The rest will be passed in the user area.
278  CCIfType<[f128], CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Reg">>>,
279  CCIfType<[f128], CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Stack">>>,
280  CCIfType<[f128], CCIfFixed<CCAssignToReg<[F0Q, F4Q]>>>,
281
282  // Other arguments are passed in 8-byte-aligned 8-byte stack slots.
283  CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
284  // Other f128 arguments are passed in 8-byte-aligned 16-byte stack slots.
285  CCIfType<[f128], CCAssignToStack<16, 8>>,
286  // Vector arguments are passed in 8-byte-alinged 16-byte stack slots too.
287  CCIfSubtarget<"hasVector()",
288    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
289             CCAssignToStack<16, 8>>>
290]>;
291
292//===----------------------------------------------------------------------===//
293// s390x return value calling convention
294//===----------------------------------------------------------------------===//
295
296def RetCC_SystemZ : CallingConv<[
297  // zOS XPLINK64
298  CCIfSubtarget<"isTargetXPLINK64()", CCDelegateTo<RetCC_SystemZ_XPLINK64>>,
299
300  // ELF Linux SystemZ
301  CCIfSubtarget<"isTargetELF()", CCDelegateTo<RetCC_SystemZ_ELF>>
302]>;
303
304
305//===----------------------------------------------------------------------===//
306// s390x argument calling conventions
307//===----------------------------------------------------------------------===//
308def CC_SystemZ : CallingConv<[
309  // zOS XPLINK64
310  CCIfSubtarget<"isTargetXPLINK64()", CCDelegateTo<CC_SystemZ_XPLINK64>>,
311
312  // ELF Linux SystemZ
313  CCIfSubtarget<"isTargetELF()", CCDelegateTo<CC_SystemZ_ELF>>
314]>;
315