1 //===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file declares the Sparc specific subclass of TargetMachine. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H 14 #define LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H 15 16 #include "SparcInstrInfo.h" 17 #include "SparcSubtarget.h" 18 #include "llvm/Target/TargetMachine.h" 19 #include <optional> 20 21 namespace llvm { 22 23 class SparcTargetMachine : public LLVMTargetMachine { 24 std::unique_ptr<TargetLoweringObjectFile> TLOF; 25 SparcSubtarget Subtarget; 26 bool is64Bit; 27 mutable StringMap<std::unique_ptr<SparcSubtarget>> SubtargetMap; 28 29 public: 30 SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU, 31 StringRef FS, const TargetOptions &Options, 32 std::optional<Reloc::Model> RM, 33 std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, 34 bool JIT, bool is64bit); 35 ~SparcTargetMachine() override; 36 37 const SparcSubtarget *getSubtargetImpl() const { return &Subtarget; } 38 const SparcSubtarget *getSubtargetImpl(const Function &) const override; 39 40 // Pass Pipeline Configuration 41 TargetPassConfig *createPassConfig(PassManagerBase &PM) override; 42 TargetLoweringObjectFile *getObjFileLowering() const override { 43 return TLOF.get(); 44 } 45 46 MachineFunctionInfo * 47 createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, 48 const TargetSubtargetInfo *STI) const override; 49 }; 50 51 /// Sparc 32-bit target machine 52 /// 53 class SparcV8TargetMachine : public SparcTargetMachine { 54 virtual void anchor(); 55 56 public: 57 SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU, 58 StringRef FS, const TargetOptions &Options, 59 std::optional<Reloc::Model> RM, 60 std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, 61 bool JIT); 62 }; 63 64 /// Sparc 64-bit target machine 65 /// 66 class SparcV9TargetMachine : public SparcTargetMachine { 67 virtual void anchor(); 68 69 public: 70 SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU, 71 StringRef FS, const TargetOptions &Options, 72 std::optional<Reloc::Model> RM, 73 std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, 74 bool JIT); 75 }; 76 77 class SparcelTargetMachine : public SparcTargetMachine { 78 virtual void anchor(); 79 80 public: 81 SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU, 82 StringRef FS, const TargetOptions &Options, 83 std::optional<Reloc::Model> RM, 84 std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, 85 bool JIT); 86 }; 87 88 } // end namespace llvm 89 90 #endif 91