xref: /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/SparcTargetMachine.h (revision e6bfd18d21b225af6a0ed67ceeaf1293b7b9eba5)
1 //===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares the Sparc specific subclass of TargetMachine.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H
14 #define LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H
15 
16 #include "SparcInstrInfo.h"
17 #include "SparcSubtarget.h"
18 #include "llvm/Target/TargetMachine.h"
19 
20 namespace llvm {
21 
22 class SparcTargetMachine : public LLVMTargetMachine {
23   std::unique_ptr<TargetLoweringObjectFile> TLOF;
24   SparcSubtarget Subtarget;
25   bool is64Bit;
26   mutable StringMap<std::unique_ptr<SparcSubtarget>> SubtargetMap;
27 public:
28   SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
29                      StringRef FS, const TargetOptions &Options,
30                      Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
31                      CodeGenOpt::Level OL, bool JIT, bool is64bit);
32   ~SparcTargetMachine() override;
33 
34   const SparcSubtarget *getSubtargetImpl() const { return &Subtarget; }
35   const SparcSubtarget *getSubtargetImpl(const Function &) const override;
36 
37   // Pass Pipeline Configuration
38   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
39   TargetLoweringObjectFile *getObjFileLowering() const override {
40     return TLOF.get();
41   }
42 };
43 
44 /// Sparc 32-bit target machine
45 ///
46 class SparcV8TargetMachine : public SparcTargetMachine {
47   virtual void anchor();
48 public:
49   SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
50                        StringRef FS, const TargetOptions &Options,
51                        Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
52                        CodeGenOpt::Level OL, bool JIT);
53 };
54 
55 /// Sparc 64-bit target machine
56 ///
57 class SparcV9TargetMachine : public SparcTargetMachine {
58   virtual void anchor();
59 public:
60   SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
61                        StringRef FS, const TargetOptions &Options,
62                        Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
63                        CodeGenOpt::Level OL, bool JIT);
64 };
65 
66 class SparcelTargetMachine : public SparcTargetMachine {
67   virtual void anchor();
68 
69 public:
70   SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
71                        StringRef FS, const TargetOptions &Options,
72                        Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
73                        CodeGenOpt::Level OL, bool JIT);
74 };
75 
76 } // end namespace llvm
77 
78 #endif
79