1*5ffd83dbSDimitry Andric//===-- SparcSchedule.td - Describe the Sparc Itineraries ----*- tablegen -*-=// 20b57cec5SDimitry Andric// 30b57cec5SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric// 70b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric// 90b57cec5SDimitry Andric// 100b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 110b57cec5SDimitry Andric 120b57cec5SDimitry Andricdef IIC_iu_or_fpu_instr : InstrItinClass; 130b57cec5SDimitry Andricdef IIC_iu_instr : InstrItinClass; 140b57cec5SDimitry Andricdef IIC_fpu_normal_instr : InstrItinClass; 150b57cec5SDimitry Andricdef IIC_fpu_fast_instr : InstrItinClass; 160b57cec5SDimitry Andricdef IIC_jmp_or_call : InstrItinClass; 170b57cec5SDimitry Andricdef IIC_ldd : InstrItinClass; 180b57cec5SDimitry Andricdef IIC_st : InstrItinClass; 190b57cec5SDimitry Andricdef IIC_std : InstrItinClass; 200b57cec5SDimitry Andricdef IIC_iu_smul : InstrItinClass; 210b57cec5SDimitry Andricdef IIC_iu_umul : InstrItinClass; 220b57cec5SDimitry Andricdef IIC_iu_div : InstrItinClass; 230b57cec5SDimitry Andricdef IIC_ticc : InstrItinClass; 240b57cec5SDimitry Andricdef IIC_ldstub : InstrItinClass; 250b57cec5SDimitry Andricdef IIC_fpu_muls : InstrItinClass; 260b57cec5SDimitry Andricdef IIC_fpu_muld : InstrItinClass; 270b57cec5SDimitry Andricdef IIC_fpu_divs : InstrItinClass; 280b57cec5SDimitry Andricdef IIC_fpu_divd : InstrItinClass; 290b57cec5SDimitry Andricdef IIC_fpu_sqrts : InstrItinClass; 300b57cec5SDimitry Andricdef IIC_fpu_sqrtd : InstrItinClass; 310b57cec5SDimitry Andricdef IIC_fpu_abs : InstrItinClass; 320b57cec5SDimitry Andricdef IIC_fpu_movs : InstrItinClass; 330b57cec5SDimitry Andricdef IIC_fpu_negs : InstrItinClass; 340b57cec5SDimitry Andricdef IIC_smac_umac : InstrItinClass; 350b57cec5SDimitry Andricdef IIC_fpu_stod : InstrItinClass; 360b57cec5SDimitry Andric 370b57cec5SDimitry Andricdef LEONIU : FuncUnit; // integer unit 380b57cec5SDimitry Andricdef LEONFPU : FuncUnit; // floating-point unit 390b57cec5SDimitry Andric 400b57cec5SDimitry Andric// Ref: http://www.atmel.com/Images/doc4226.pdf 410b57cec5SDimitry Andric 420b57cec5SDimitry Andricdef LEON2Itineraries : ProcessorItineraries< 430b57cec5SDimitry Andric[LEONIU, LEONFPU], [], [ 440b57cec5SDimitry Andric InstrItinData<IIC_iu_or_fpu_instr, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>, 450b57cec5SDimitry Andric InstrItinData<IIC_iu_instr, [InstrStage<1, [LEONIU]>], [1, 1]>, 460b57cec5SDimitry Andric InstrItinData<IIC_fpu_normal_instr, [InstrStage<1, [LEONFPU]>], [7, 1]>, 470b57cec5SDimitry Andric InstrItinData<IIC_fpu_fast_instr, [InstrStage<1, [LEONFPU]>], [7, 1]>, 480b57cec5SDimitry Andric InstrItinData<IIC_jmp_or_call, [InstrStage<1, [LEONIU, LEONFPU]>], [2, 1]>, 490b57cec5SDimitry Andric InstrItinData<IIC_ldd, [InstrStage<1, [LEONIU, LEONFPU]>], [2, 1]>, 500b57cec5SDimitry Andric InstrItinData<IIC_st, [InstrStage<1, [LEONIU, LEONFPU]>], [2, 1]>, 510b57cec5SDimitry Andric InstrItinData<IIC_std, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>, 520b57cec5SDimitry Andric InstrItinData<IIC_iu_smul, [InstrStage<1, [LEONIU]>], [5, 1]>, 530b57cec5SDimitry Andric InstrItinData<IIC_iu_umul, [InstrStage<1, [LEONIU]>], [5, 1]>, 540b57cec5SDimitry Andric InstrItinData<IIC_iu_div, [InstrStage<1, [LEONIU]>], [35, 1]>, 550b57cec5SDimitry Andric InstrItinData<IIC_ticc, [InstrStage<1, [LEONIU, LEONFPU]>], [4, 1]>, 560b57cec5SDimitry Andric InstrItinData<IIC_ldstub, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>, 570b57cec5SDimitry Andric InstrItinData<IIC_fpu_muls, [InstrStage<1, [LEONFPU]>], [16, 1]>, 580b57cec5SDimitry Andric InstrItinData<IIC_fpu_muld, [InstrStage<1, [LEONFPU]>], [21, 1]>, 590b57cec5SDimitry Andric InstrItinData<IIC_fpu_divs, [InstrStage<1, [LEONFPU]>], [20, 1]>, 600b57cec5SDimitry Andric InstrItinData<IIC_fpu_divd, [InstrStage<1, [LEONFPU]>], [36, 1]>, 610b57cec5SDimitry Andric InstrItinData<IIC_fpu_sqrts, [InstrStage<1, [LEONFPU]>], [37, 1]>, 620b57cec5SDimitry Andric InstrItinData<IIC_fpu_sqrtd, [InstrStage<1, [LEONFPU]>], [65, 1]>, 630b57cec5SDimitry Andric InstrItinData<IIC_fpu_abs, [InstrStage<1, [LEONFPU]>], [2, 1]>, 640b57cec5SDimitry Andric InstrItinData<IIC_fpu_movs, [InstrStage<1, [LEONFPU]>], [2, 1]>, 650b57cec5SDimitry Andric InstrItinData<IIC_fpu_negs, [InstrStage<1, [LEONFPU]>], [2, 1]>, 660b57cec5SDimitry Andric InstrItinData<IIC_fpu_stod, [InstrStage<1, [LEONFPU]>], [2, 1]> 670b57cec5SDimitry Andric]>; 680b57cec5SDimitry Andric 690b57cec5SDimitry Andricdef LEON3Itineraries : ProcessorItineraries< 700b57cec5SDimitry Andric[LEONIU, LEONFPU], [], [ 710b57cec5SDimitry Andric InstrItinData<IIC_iu_or_fpu_instr, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>, 720b57cec5SDimitry Andric InstrItinData<IIC_iu_instr, [InstrStage<1, [LEONIU]>], [1, 1]>, 730b57cec5SDimitry Andric InstrItinData<IIC_fpu_normal_instr, [InstrStage<1, [LEONFPU]>], [7, 1]>, 740b57cec5SDimitry Andric InstrItinData<IIC_fpu_fast_instr, [InstrStage<1, [LEONFPU]>], [4, 1]>, 750b57cec5SDimitry Andric InstrItinData<IIC_jmp_or_call, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>, 760b57cec5SDimitry Andric InstrItinData<IIC_ldd, [InstrStage<1, [LEONIU, LEONFPU]>], [2, 1]>, 770b57cec5SDimitry Andric InstrItinData<IIC_st, [InstrStage<1, [LEONIU, LEONFPU]>], [4, 1]>, 780b57cec5SDimitry Andric InstrItinData<IIC_std, [InstrStage<1, [LEONIU, LEONFPU]>], [5, 1]>, 790b57cec5SDimitry Andric InstrItinData<IIC_iu_smul, [InstrStage<1, [LEONIU]>], [1, 1]>, 800b57cec5SDimitry Andric InstrItinData<IIC_iu_umul, [InstrStage<1, [LEONIU]>], [4, 1]>, 810b57cec5SDimitry Andric InstrItinData<IIC_iu_div, [InstrStage<1, [LEONIU]>], [35, 1]>, 820b57cec5SDimitry Andric InstrItinData<IIC_smac_umac, [InstrStage<1, [LEONIU]>], [2, 1]>, 830b57cec5SDimitry Andric InstrItinData<IIC_ticc, [InstrStage<1, [LEONIU, LEONFPU]>], [5, 1]>, 840b57cec5SDimitry Andric InstrItinData<IIC_ldstub, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>, 850b57cec5SDimitry Andric InstrItinData<IIC_fpu_muls, [InstrStage<1, [LEONFPU]>], [4, 1]>, 860b57cec5SDimitry Andric InstrItinData<IIC_fpu_muld, [InstrStage<1, [LEONFPU]>], [4, 1]>, 870b57cec5SDimitry Andric InstrItinData<IIC_fpu_divs, [InstrStage<1, [LEONFPU]>], [16, 1]>, 880b57cec5SDimitry Andric InstrItinData<IIC_fpu_divd, [InstrStage<1, [LEONFPU]>], [17, 1]>, 890b57cec5SDimitry Andric InstrItinData<IIC_fpu_sqrts, [InstrStage<1, [LEONFPU]>], [24, 1]>, 900b57cec5SDimitry Andric InstrItinData<IIC_fpu_sqrtd, [InstrStage<1, [LEONFPU]>], [25, 1]>, 910b57cec5SDimitry Andric InstrItinData<IIC_fpu_abs, [InstrStage<1, [LEONFPU]>], [2, 1]>, 920b57cec5SDimitry Andric InstrItinData<IIC_fpu_movs, [InstrStage<1, [LEONFPU]>], [2, 1]>, 930b57cec5SDimitry Andric InstrItinData<IIC_fpu_negs, [InstrStage<1, [LEONFPU]>], [2, 1]>, 940b57cec5SDimitry Andric InstrItinData<IIC_fpu_stod, [InstrStage<1, [LEONFPU]>], [4, 1]> 950b57cec5SDimitry Andric]>; 960b57cec5SDimitry Andric 970b57cec5SDimitry Andricdef LEON4Itineraries : ProcessorItineraries< 980b57cec5SDimitry Andric[LEONIU, LEONFPU], [], [ 990b57cec5SDimitry Andric InstrItinData<IIC_iu_or_fpu_instr, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>, 1000b57cec5SDimitry Andric InstrItinData<IIC_iu_instr, [InstrStage<1, [LEONIU]>], [1, 1]>, 1010b57cec5SDimitry Andric InstrItinData<IIC_fpu_normal_instr, [InstrStage<1, [LEONFPU]>], [7, 1]>, 1020b57cec5SDimitry Andric InstrItinData<IIC_fpu_fast_instr, [InstrStage<1, [LEONFPU]>], [4, 1]>, 1030b57cec5SDimitry Andric InstrItinData<IIC_jmp_or_call, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>, 1040b57cec5SDimitry Andric InstrItinData<IIC_ldd, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>, 1050b57cec5SDimitry Andric InstrItinData<IIC_st, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>, 1060b57cec5SDimitry Andric InstrItinData<IIC_std, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>, 1070b57cec5SDimitry Andric InstrItinData<IIC_iu_smul, [InstrStage<1, [LEONIU]>], [1, 1]>, 1080b57cec5SDimitry Andric InstrItinData<IIC_iu_umul, [InstrStage<1, [LEONIU]>], [4, 1]>, 1090b57cec5SDimitry Andric InstrItinData<IIC_iu_div, [InstrStage<1, [LEONIU]>], [35, 1]>, 1100b57cec5SDimitry Andric InstrItinData<IIC_smac_umac, [InstrStage<1, [LEONIU]>], [2, 1]>, 1110b57cec5SDimitry Andric InstrItinData<IIC_ticc, [InstrStage<1, [LEONIU, LEONFPU]>], [5, 1]>, 1120b57cec5SDimitry Andric InstrItinData<IIC_ldstub, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>, 1130b57cec5SDimitry Andric InstrItinData<IIC_fpu_muls, [InstrStage<1, [LEONFPU]>], [4, 1]>, 1140b57cec5SDimitry Andric InstrItinData<IIC_fpu_muld, [InstrStage<1, [LEONFPU]>], [4, 1]>, 1150b57cec5SDimitry Andric InstrItinData<IIC_fpu_divs, [InstrStage<1, [LEONFPU]>], [16, 1]>, 1160b57cec5SDimitry Andric InstrItinData<IIC_fpu_divd, [InstrStage<1, [LEONFPU]>], [17, 1]>, 1170b57cec5SDimitry Andric InstrItinData<IIC_fpu_sqrts, [InstrStage<1, [LEONFPU]>], [24, 1]>, 1180b57cec5SDimitry Andric InstrItinData<IIC_fpu_sqrtd, [InstrStage<1, [LEONFPU]>], [25, 1]>, 1190b57cec5SDimitry Andric InstrItinData<IIC_fpu_abs, [InstrStage<1, [LEONFPU]>], [2, 1]>, 1200b57cec5SDimitry Andric InstrItinData<IIC_fpu_movs, [InstrStage<1, [LEONFPU]>], [2, 1]>, 1210b57cec5SDimitry Andric InstrItinData<IIC_fpu_negs, [InstrStage<1, [LEONFPU]>], [2, 1]>, 1220b57cec5SDimitry Andric InstrItinData<IIC_fpu_stod, [InstrStage<1, [LEONFPU]>], [4, 1]> 1230b57cec5SDimitry Andric]>; 124