xref: /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/Sparc.td (revision e53a21abdf2953714e44e3c54b4bb78557cb096c) 
1//===-- Sparc.td - Describe the Sparc Target Machine -------*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9//
10//===----------------------------------------------------------------------===//
11
12//===----------------------------------------------------------------------===//
13// Target-independent interfaces which we are implementing
14//===----------------------------------------------------------------------===//
15
16include "llvm/Target/Target.td"
17include "llvm/TableGen/SearchableTable.td"
18
19//===----------------------------------------------------------------------===//
20// SPARC Subtarget features.
21//
22
23def FeatureSoftMulDiv
24  : SubtargetFeature<"soft-mul-div", "UseSoftMulDiv", "true",
25                     "Use software emulation for integer multiply and divide">;
26
27def FeatureNoFSMULD
28  : SubtargetFeature<"no-fsmuld", "HasNoFSMULD", "true",
29                     "Disable the fsmuld instruction.">;
30def FeatureNoFMULS
31  : SubtargetFeature<"no-fmuls", "HasNoFMULS", "true",
32                     "Disable the fmuls instruction.">;
33
34def FeatureV9
35  : SubtargetFeature<"v9", "IsV9", "true",
36                     "Enable SPARC-V9 instructions">;
37def FeatureV8Deprecated
38  : SubtargetFeature<"deprecated-v8", "UseV8DeprecatedInsts", "true",
39                     "Enable deprecated V8 instructions in V9 mode">;
40def FeatureVIS
41  : SubtargetFeature<"vis", "IsVIS", "true",
42                     "Enable UltraSPARC Visual Instruction Set extensions">;
43def FeatureVIS2
44  : SubtargetFeature<"vis2", "IsVIS2", "true",
45                     "Enable Visual Instruction Set extensions II">;
46def FeatureVIS3
47  : SubtargetFeature<"vis3", "IsVIS3", "true",
48                     "Enable Visual Instruction Set extensions III">;
49def FeatureLeon
50  : SubtargetFeature<"leon", "IsLeon", "true",
51                     "Enable LEON extensions">;
52def FeaturePWRPSR
53  : SubtargetFeature<"leonpwrpsr", "HasPWRPSR", "true",
54                     "Enable the PWRPSR instruction">;
55
56def FeatureHardQuad
57  : SubtargetFeature<"hard-quad-float", "HasHardQuad", "true",
58                     "Enable quad-word floating point instructions">;
59
60def UsePopc : SubtargetFeature<"popc", "UsePopc", "true",
61                               "Use the popc (population count) instruction">;
62
63def FeatureSoftFloat : SubtargetFeature<"soft-float", "UseSoftFloat", "true",
64                              "Use software emulation for floating point">;
65
66//===----------------------------------------------------------------------===//
67// SPARC Subtarget tuning features.
68//
69
70def TuneSlowRDPC : SubtargetFeature<"slow-rdpc", "HasSlowRDPC", "true",
71                                    "rd %pc, %XX is slow", [FeatureV9]>;
72
73//==== Features added predmoninantly for LEON subtarget support
74include "LeonFeatures.td"
75
76//==== Register allocation tweaks needed by some low-level software
77foreach i = 1 ... 7  in
78    def FeatureReserveG#i : SubtargetFeature<"reserve-g"#i, "ReserveRegister["#i#" + SP::G0]", "true",
79                                             "Reserve G"#i#", making it unavailable as a GPR">;
80foreach i = 0 ... 5 in
81    def FeatureReserveO#i : SubtargetFeature<"reserve-o"#i, "ReserveRegister["#i#" + SP::O0]", "true",
82                                             "Reserve O"#i#", making it unavailable as a GPR">;
83foreach i = 0 ... 7 in
84    def FeatureReserveL#i : SubtargetFeature<"reserve-l"#i, "ReserveRegister["#i#" + SP::L0]", "true",
85                                             "Reserve L"#i#", making it unavailable as a GPR">;
86foreach i = 0 ... 5 in
87    def FeatureReserveI#i : SubtargetFeature<"reserve-i"#i, "ReserveRegister["#i#" + SP::I0]", "true",
88                                             "Reserve I"#i#", making it unavailable as a GPR">;
89
90//===----------------------------------------------------------------------===//
91// Register File, Calling Conv, Instruction Descriptions
92//===----------------------------------------------------------------------===//
93
94include "SparcASITags.td"
95include "SparcPrefetchTags.td"
96include "SparcRegisterInfo.td"
97include "SparcCallingConv.td"
98include "SparcSchedule.td"
99include "SparcInstrInfo.td"
100
101def SparcInstrInfo : InstrInfo;
102
103def SparcAsmParser : AsmParser {
104  let ShouldEmitMatchRegisterAltName = true;
105  let AllowDuplicateRegisterNames = true;
106}
107
108def SparcAsmParserVariant : AsmParserVariant {
109  let RegisterPrefix = "%";
110}
111
112//===----------------------------------------------------------------------===//
113// SPARC processors supported.
114//===----------------------------------------------------------------------===//
115
116class Proc<string Name, list<SubtargetFeature> Features,
117           list<SubtargetFeature> TuneFeatures = []>
118 : Processor<Name, NoItineraries, Features, TuneFeatures>;
119
120def : Proc<"generic",         []>;
121def : Proc<"v7",              [FeatureSoftMulDiv, FeatureNoFSMULD]>;
122def : Proc<"v8",              []>;
123def : Proc<"supersparc",      []>;
124def : Proc<"sparclite",       []>;
125def : Proc<"f934",            []>;
126def : Proc<"hypersparc",      []>;
127def : Proc<"sparclite86x",    []>;
128def : Proc<"sparclet",        []>;
129def : Proc<"tsc701",          []>;
130def : Proc<"myriad2",         [FeatureLeon, LeonCASA]>;
131def : Proc<"myriad2.1",       [FeatureLeon, LeonCASA]>;
132def : Proc<"myriad2.2",       [FeatureLeon, LeonCASA]>;
133def : Proc<"myriad2.3",       [FeatureLeon, LeonCASA]>;
134def : Proc<"ma2100",          [FeatureLeon, LeonCASA]>;
135def : Proc<"ma2150",          [FeatureLeon, LeonCASA]>;
136def : Proc<"ma2155",          [FeatureLeon, LeonCASA]>;
137def : Proc<"ma2450",          [FeatureLeon, LeonCASA]>;
138def : Proc<"ma2455",          [FeatureLeon, LeonCASA]>;
139def : Proc<"ma2x5x",          [FeatureLeon, LeonCASA]>;
140def : Proc<"ma2080",          [FeatureLeon, LeonCASA]>;
141def : Proc<"ma2085",          [FeatureLeon, LeonCASA]>;
142def : Proc<"ma2480",          [FeatureLeon, LeonCASA]>;
143def : Proc<"ma2485",          [FeatureLeon, LeonCASA]>;
144def : Proc<"ma2x8x",          [FeatureLeon, LeonCASA]>;
145def : Proc<"v9",              [FeatureV9]>;
146def : Proc<"ultrasparc",      [FeatureV9, FeatureV8Deprecated, FeatureVIS],
147                              [TuneSlowRDPC]>;
148def : Proc<"ultrasparc3",     [FeatureV9, FeatureV8Deprecated, FeatureVIS,
149                               FeatureVIS2],
150                              [TuneSlowRDPC]>;
151def : Proc<"niagara",         [FeatureV9, FeatureV8Deprecated, FeatureVIS,
152                               FeatureVIS2]>;
153def : Proc<"niagara2",        [FeatureV9, FeatureV8Deprecated, UsePopc,
154                               FeatureVIS, FeatureVIS2]>;
155def : Proc<"niagara3",        [FeatureV9, FeatureV8Deprecated, UsePopc,
156                               FeatureVIS, FeatureVIS2]>;
157def : Proc<"niagara4",        [FeatureV9, FeatureV8Deprecated, UsePopc,
158                               FeatureVIS, FeatureVIS2, FeatureVIS3]>;
159
160// LEON 2 FT generic
161def : Processor<"leon2", LEON2Itineraries,
162                [FeatureLeon]>;
163
164// LEON 2 FT (AT697E)
165// TO DO: Place-holder: Processor specific features will be added *very* soon here.
166def : Processor<"at697e", LEON2Itineraries,
167                [FeatureLeon, InsertNOPLoad]>;
168
169// LEON 2 FT (AT697F)
170// TO DO: Place-holder: Processor specific features will be added *very* soon here.
171def : Processor<"at697f", LEON2Itineraries,
172                [FeatureLeon, InsertNOPLoad]>;
173
174
175// LEON 3 FT generic
176def : Processor<"leon3", LEON3Itineraries,
177                [FeatureLeon, UMACSMACSupport]>;
178
179// LEON 3 FT (UT699). Provides features for the UT699 processor
180// - covers all the erratum fixes for LEON3, but does not support the CASA instruction.
181def : Processor<"ut699", LEON3Itineraries,
182                [FeatureLeon, InsertNOPLoad, FeatureNoFSMULD, FeatureNoFMULS, FixAllFDIVSQRT]>;
183
184// LEON3 FT (GR712RC). Provides features for the GR712RC processor.
185// - covers all the erratum fixed for LEON3 and support for the CASA instruction.
186def : Processor<"gr712rc", LEON3Itineraries,
187                [FeatureLeon, LeonCASA]>;
188
189// LEON 4 FT generic
190def : Processor<"leon4", LEON4Itineraries,
191                [FeatureLeon, UMACSMACSupport, LeonCASA]>;
192
193// LEON 4 FT (GR740)
194// TO DO: Place-holder: Processor specific features will be added *very* soon here.
195def : Processor<"gr740", LEON4Itineraries,
196                [FeatureLeon, UMACSMACSupport, LeonCASA, LeonCycleCounter,
197                 FeaturePWRPSR]>;
198
199//===----------------------------------------------------------------------===//
200// Declare the target which we are implementing
201//===----------------------------------------------------------------------===//
202
203def SparcAsmWriter : AsmWriter {
204  string AsmWriterClassName  = "InstPrinter";
205  int PassSubtarget = 1;
206  int Variant = 0;
207}
208
209def Sparc : Target {
210  // Pull in Instruction Info:
211  let InstructionSet = SparcInstrInfo;
212  let AssemblyParsers  = [SparcAsmParser];
213  let AssemblyParserVariants = [SparcAsmParserVariant];
214  let AssemblyWriters = [SparcAsmWriter];
215  let AllowRegisterRenaming = 1;
216}
217