10b57cec5SDimitry Andric//===-- Sparc.td - Describe the Sparc Target Machine -------*- tablegen -*-===// 20b57cec5SDimitry Andric// 30b57cec5SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric// 70b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric// 90b57cec5SDimitry Andric// 100b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 110b57cec5SDimitry Andric 120b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 130b57cec5SDimitry Andric// Target-independent interfaces which we are implementing 140b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 150b57cec5SDimitry Andric 160b57cec5SDimitry Andricinclude "llvm/Target/Target.td" 170b57cec5SDimitry Andric 180b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 190b57cec5SDimitry Andric// SPARC Subtarget features. 200b57cec5SDimitry Andric// 210b57cec5SDimitry Andric 220b57cec5SDimitry Andricdef FeatureSoftMulDiv 230b57cec5SDimitry Andric : SubtargetFeature<"soft-mul-div", "UseSoftMulDiv", "true", 240b57cec5SDimitry Andric "Use software emulation for integer multiply and divide">; 250b57cec5SDimitry Andric 260b57cec5SDimitry Andricdef FeatureNoFSMULD 270b57cec5SDimitry Andric : SubtargetFeature<"no-fsmuld", "HasNoFSMULD", "true", 280b57cec5SDimitry Andric "Disable the fsmuld instruction.">; 290b57cec5SDimitry Andricdef FeatureNoFMULS 300b57cec5SDimitry Andric : SubtargetFeature<"no-fmuls", "HasNoFMULS", "true", 310b57cec5SDimitry Andric "Disable the fmuls instruction.">; 320b57cec5SDimitry Andric 330b57cec5SDimitry Andricdef FeatureV9 340b57cec5SDimitry Andric : SubtargetFeature<"v9", "IsV9", "true", 350b57cec5SDimitry Andric "Enable SPARC-V9 instructions">; 360b57cec5SDimitry Andricdef FeatureV8Deprecated 37*06c3fb27SDimitry Andric : SubtargetFeature<"deprecated-v8", "UseV8DeprecatedInsts", "true", 380b57cec5SDimitry Andric "Enable deprecated V8 instructions in V9 mode">; 390b57cec5SDimitry Andricdef FeatureVIS 400b57cec5SDimitry Andric : SubtargetFeature<"vis", "IsVIS", "true", 410b57cec5SDimitry Andric "Enable UltraSPARC Visual Instruction Set extensions">; 420b57cec5SDimitry Andricdef FeatureVIS2 430b57cec5SDimitry Andric : SubtargetFeature<"vis2", "IsVIS2", "true", 440b57cec5SDimitry Andric "Enable Visual Instruction Set extensions II">; 450b57cec5SDimitry Andricdef FeatureVIS3 460b57cec5SDimitry Andric : SubtargetFeature<"vis3", "IsVIS3", "true", 470b57cec5SDimitry Andric "Enable Visual Instruction Set extensions III">; 480b57cec5SDimitry Andricdef FeatureLeon 490b57cec5SDimitry Andric : SubtargetFeature<"leon", "IsLeon", "true", 500b57cec5SDimitry Andric "Enable LEON extensions">; 510b57cec5SDimitry Andricdef FeaturePWRPSR 520b57cec5SDimitry Andric : SubtargetFeature<"leonpwrpsr", "HasPWRPSR", "true", 530b57cec5SDimitry Andric "Enable the PWRPSR instruction">; 540b57cec5SDimitry Andric 550b57cec5SDimitry Andricdef FeatureHardQuad 560b57cec5SDimitry Andric : SubtargetFeature<"hard-quad-float", "HasHardQuad", "true", 570b57cec5SDimitry Andric "Enable quad-word floating point instructions">; 580b57cec5SDimitry Andric 590b57cec5SDimitry Andricdef UsePopc : SubtargetFeature<"popc", "UsePopc", "true", 600b57cec5SDimitry Andric "Use the popc (population count) instruction">; 610b57cec5SDimitry Andric 620b57cec5SDimitry Andricdef FeatureSoftFloat : SubtargetFeature<"soft-float", "UseSoftFloat", "true", 630b57cec5SDimitry Andric "Use software emulation for floating point">; 640b57cec5SDimitry Andric 650b57cec5SDimitry Andric//==== Features added predmoninantly for LEON subtarget support 660b57cec5SDimitry Andricinclude "LeonFeatures.td" 670b57cec5SDimitry Andric 680b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 690b57cec5SDimitry Andric// Register File, Calling Conv, Instruction Descriptions 700b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 710b57cec5SDimitry Andric 720b57cec5SDimitry Andricinclude "SparcRegisterInfo.td" 730b57cec5SDimitry Andricinclude "SparcCallingConv.td" 740b57cec5SDimitry Andricinclude "SparcSchedule.td" 750b57cec5SDimitry Andricinclude "SparcInstrInfo.td" 760b57cec5SDimitry Andric 770b57cec5SDimitry Andricdef SparcInstrInfo : InstrInfo; 780b57cec5SDimitry Andric 790b57cec5SDimitry Andricdef SparcAsmParser : AsmParser { 800b57cec5SDimitry Andric bit ShouldEmitMatchRegisterName = 0; 810b57cec5SDimitry Andric} 820b57cec5SDimitry Andric 830b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 840b57cec5SDimitry Andric// SPARC processors supported. 850b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 860b57cec5SDimitry Andric 870b57cec5SDimitry Andricclass Proc<string Name, list<SubtargetFeature> Features> 880b57cec5SDimitry Andric : Processor<Name, NoItineraries, Features>; 890b57cec5SDimitry Andric 900b57cec5SDimitry Andricdef : Proc<"generic", []>; 910b57cec5SDimitry Andricdef : Proc<"v7", [FeatureSoftMulDiv, FeatureNoFSMULD]>; 920b57cec5SDimitry Andricdef : Proc<"v8", []>; 930b57cec5SDimitry Andricdef : Proc<"supersparc", []>; 940b57cec5SDimitry Andricdef : Proc<"sparclite", []>; 950b57cec5SDimitry Andricdef : Proc<"f934", []>; 960b57cec5SDimitry Andricdef : Proc<"hypersparc", []>; 970b57cec5SDimitry Andricdef : Proc<"sparclite86x", []>; 980b57cec5SDimitry Andricdef : Proc<"sparclet", []>; 990b57cec5SDimitry Andricdef : Proc<"tsc701", []>; 1000b57cec5SDimitry Andricdef : Proc<"myriad2", [FeatureLeon, LeonCASA]>; 1010b57cec5SDimitry Andricdef : Proc<"myriad2.1", [FeatureLeon, LeonCASA]>; 1020b57cec5SDimitry Andricdef : Proc<"myriad2.2", [FeatureLeon, LeonCASA]>; 1030b57cec5SDimitry Andricdef : Proc<"myriad2.3", [FeatureLeon, LeonCASA]>; 1040b57cec5SDimitry Andricdef : Proc<"ma2100", [FeatureLeon, LeonCASA]>; 1050b57cec5SDimitry Andricdef : Proc<"ma2150", [FeatureLeon, LeonCASA]>; 1060b57cec5SDimitry Andricdef : Proc<"ma2155", [FeatureLeon, LeonCASA]>; 1070b57cec5SDimitry Andricdef : Proc<"ma2450", [FeatureLeon, LeonCASA]>; 1080b57cec5SDimitry Andricdef : Proc<"ma2455", [FeatureLeon, LeonCASA]>; 1090b57cec5SDimitry Andricdef : Proc<"ma2x5x", [FeatureLeon, LeonCASA]>; 1100b57cec5SDimitry Andricdef : Proc<"ma2080", [FeatureLeon, LeonCASA]>; 1110b57cec5SDimitry Andricdef : Proc<"ma2085", [FeatureLeon, LeonCASA]>; 1120b57cec5SDimitry Andricdef : Proc<"ma2480", [FeatureLeon, LeonCASA]>; 1130b57cec5SDimitry Andricdef : Proc<"ma2485", [FeatureLeon, LeonCASA]>; 1140b57cec5SDimitry Andricdef : Proc<"ma2x8x", [FeatureLeon, LeonCASA]>; 1150b57cec5SDimitry Andricdef : Proc<"v9", [FeatureV9]>; 1160b57cec5SDimitry Andricdef : Proc<"ultrasparc", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>; 1170b57cec5SDimitry Andricdef : Proc<"ultrasparc3", [FeatureV9, FeatureV8Deprecated, FeatureVIS, 1180b57cec5SDimitry Andric FeatureVIS2]>; 1190b57cec5SDimitry Andricdef : Proc<"niagara", [FeatureV9, FeatureV8Deprecated, FeatureVIS, 1200b57cec5SDimitry Andric FeatureVIS2]>; 1210b57cec5SDimitry Andricdef : Proc<"niagara2", [FeatureV9, FeatureV8Deprecated, UsePopc, 1220b57cec5SDimitry Andric FeatureVIS, FeatureVIS2]>; 1230b57cec5SDimitry Andricdef : Proc<"niagara3", [FeatureV9, FeatureV8Deprecated, UsePopc, 1240b57cec5SDimitry Andric FeatureVIS, FeatureVIS2]>; 1250b57cec5SDimitry Andricdef : Proc<"niagara4", [FeatureV9, FeatureV8Deprecated, UsePopc, 1260b57cec5SDimitry Andric FeatureVIS, FeatureVIS2, FeatureVIS3]>; 1270b57cec5SDimitry Andric 1280b57cec5SDimitry Andric// LEON 2 FT generic 1290b57cec5SDimitry Andricdef : Processor<"leon2", LEON2Itineraries, 1300b57cec5SDimitry Andric [FeatureLeon]>; 1310b57cec5SDimitry Andric 1320b57cec5SDimitry Andric// LEON 2 FT (AT697E) 1330b57cec5SDimitry Andric// TO DO: Place-holder: Processor specific features will be added *very* soon here. 1340b57cec5SDimitry Andricdef : Processor<"at697e", LEON2Itineraries, 1350b57cec5SDimitry Andric [FeatureLeon, InsertNOPLoad]>; 1360b57cec5SDimitry Andric 1370b57cec5SDimitry Andric// LEON 2 FT (AT697F) 1380b57cec5SDimitry Andric// TO DO: Place-holder: Processor specific features will be added *very* soon here. 1390b57cec5SDimitry Andricdef : Processor<"at697f", LEON2Itineraries, 1400b57cec5SDimitry Andric [FeatureLeon, InsertNOPLoad]>; 1410b57cec5SDimitry Andric 1420b57cec5SDimitry Andric 1430b57cec5SDimitry Andric// LEON 3 FT generic 1440b57cec5SDimitry Andricdef : Processor<"leon3", LEON3Itineraries, 1450b57cec5SDimitry Andric [FeatureLeon, UMACSMACSupport]>; 1460b57cec5SDimitry Andric 1470b57cec5SDimitry Andric// LEON 3 FT (UT699). Provides features for the UT699 processor 1480b57cec5SDimitry Andric// - covers all the erratum fixes for LEON3, but does not support the CASA instruction. 1490b57cec5SDimitry Andricdef : Processor<"ut699", LEON3Itineraries, 1500b57cec5SDimitry Andric [FeatureLeon, InsertNOPLoad, FeatureNoFSMULD, FeatureNoFMULS, FixAllFDIVSQRT]>; 1510b57cec5SDimitry Andric 1520b57cec5SDimitry Andric// LEON3 FT (GR712RC). Provides features for the GR712RC processor. 1530b57cec5SDimitry Andric// - covers all the erratum fixed for LEON3 and support for the CASA instruction. 1540b57cec5SDimitry Andricdef : Processor<"gr712rc", LEON3Itineraries, 1550b57cec5SDimitry Andric [FeatureLeon, LeonCASA]>; 1560b57cec5SDimitry Andric 1570b57cec5SDimitry Andric// LEON 4 FT generic 1580b57cec5SDimitry Andricdef : Processor<"leon4", LEON4Itineraries, 1590b57cec5SDimitry Andric [FeatureLeon, UMACSMACSupport, LeonCASA]>; 1600b57cec5SDimitry Andric 1610b57cec5SDimitry Andric// LEON 4 FT (GR740) 1620b57cec5SDimitry Andric// TO DO: Place-holder: Processor specific features will be added *very* soon here. 1630b57cec5SDimitry Andricdef : Processor<"gr740", LEON4Itineraries, 1640b57cec5SDimitry Andric [FeatureLeon, UMACSMACSupport, LeonCASA, LeonCycleCounter, 1650b57cec5SDimitry Andric FeaturePWRPSR]>; 1660b57cec5SDimitry Andric 1670b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 1680b57cec5SDimitry Andric// Declare the target which we are implementing 1690b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 1700b57cec5SDimitry Andric 1710b57cec5SDimitry Andricdef SparcAsmWriter : AsmWriter { 1720b57cec5SDimitry Andric string AsmWriterClassName = "InstPrinter"; 1730b57cec5SDimitry Andric int PassSubtarget = 1; 1740b57cec5SDimitry Andric int Variant = 0; 1750b57cec5SDimitry Andric} 1760b57cec5SDimitry Andric 1770b57cec5SDimitry Andricdef Sparc : Target { 1780b57cec5SDimitry Andric // Pull in Instruction Info: 1790b57cec5SDimitry Andric let InstructionSet = SparcInstrInfo; 1800b57cec5SDimitry Andric let AssemblyParsers = [SparcAsmParser]; 1810b57cec5SDimitry Andric let AssemblyWriters = [SparcAsmWriter]; 1820b57cec5SDimitry Andric let AllowRegisterRenaming = 1; 1830b57cec5SDimitry Andric} 184