10b57cec5SDimitry Andric //===-- SparcFixupKinds.h - Sparc Specific Fixup Entries --------*- C++ -*-===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric 90b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_SPARC_MCTARGETDESC_SPARCFIXUPKINDS_H 100b57cec5SDimitry Andric #define LLVM_LIB_TARGET_SPARC_MCTARGETDESC_SPARCFIXUPKINDS_H 110b57cec5SDimitry Andric 120b57cec5SDimitry Andric #include "llvm/MC/MCFixup.h" 130b57cec5SDimitry Andric 140b57cec5SDimitry Andric namespace llvm { 150b57cec5SDimitry Andric namespace Sparc { 160b57cec5SDimitry Andric enum Fixups { 170b57cec5SDimitry Andric // fixup_sparc_call30 - 30-bit PC relative relocation for call 180b57cec5SDimitry Andric fixup_sparc_call30 = FirstTargetFixupKind, 190b57cec5SDimitry Andric 200b57cec5SDimitry Andric /// fixup_sparc_br22 - 22-bit PC relative relocation for 210b57cec5SDimitry Andric /// branches 220b57cec5SDimitry Andric fixup_sparc_br22, 230b57cec5SDimitry Andric 240b57cec5SDimitry Andric /// fixup_sparc_br19 - 19-bit PC relative relocation for 250b57cec5SDimitry Andric /// branches on icc/xcc 260b57cec5SDimitry Andric fixup_sparc_br19, 270b57cec5SDimitry Andric 280b57cec5SDimitry Andric /// fixup_sparc_bpr - 16-bit fixup for bpr 29*06c3fb27SDimitry Andric fixup_sparc_br16, 300b57cec5SDimitry Andric 310b57cec5SDimitry Andric /// fixup_sparc_13 - 13-bit fixup 320b57cec5SDimitry Andric fixup_sparc_13, 330b57cec5SDimitry Andric 340b57cec5SDimitry Andric /// fixup_sparc_hi22 - 22-bit fixup corresponding to %hi(foo) 350b57cec5SDimitry Andric /// for sethi 360b57cec5SDimitry Andric fixup_sparc_hi22, 370b57cec5SDimitry Andric 380b57cec5SDimitry Andric /// fixup_sparc_lo10 - 10-bit fixup corresponding to %lo(foo) 390b57cec5SDimitry Andric fixup_sparc_lo10, 400b57cec5SDimitry Andric 410b57cec5SDimitry Andric /// fixup_sparc_h44 - 22-bit fixup corresponding to %h44(foo) 420b57cec5SDimitry Andric fixup_sparc_h44, 430b57cec5SDimitry Andric 440b57cec5SDimitry Andric /// fixup_sparc_m44 - 10-bit fixup corresponding to %m44(foo) 450b57cec5SDimitry Andric fixup_sparc_m44, 460b57cec5SDimitry Andric 470b57cec5SDimitry Andric /// fixup_sparc_l44 - 12-bit fixup corresponding to %l44(foo) 480b57cec5SDimitry Andric fixup_sparc_l44, 490b57cec5SDimitry Andric 500b57cec5SDimitry Andric /// fixup_sparc_hh - 22-bit fixup corresponding to %hh(foo) 510b57cec5SDimitry Andric fixup_sparc_hh, 520b57cec5SDimitry Andric 530b57cec5SDimitry Andric /// fixup_sparc_hm - 10-bit fixup corresponding to %hm(foo) 540b57cec5SDimitry Andric fixup_sparc_hm, 550b57cec5SDimitry Andric 56fe6060f1SDimitry Andric /// fixup_sparc_lm - 22-bit fixup corresponding to %lm(foo) 57fe6060f1SDimitry Andric fixup_sparc_lm, 58fe6060f1SDimitry Andric 590b57cec5SDimitry Andric /// fixup_sparc_pc22 - 22-bit fixup corresponding to %pc22(foo) 600b57cec5SDimitry Andric fixup_sparc_pc22, 610b57cec5SDimitry Andric 620b57cec5SDimitry Andric /// fixup_sparc_pc10 - 10-bit fixup corresponding to %pc10(foo) 630b57cec5SDimitry Andric fixup_sparc_pc10, 640b57cec5SDimitry Andric 650b57cec5SDimitry Andric /// fixup_sparc_got22 - 22-bit fixup corresponding to %got22(foo) 660b57cec5SDimitry Andric fixup_sparc_got22, 670b57cec5SDimitry Andric 680b57cec5SDimitry Andric /// fixup_sparc_got10 - 10-bit fixup corresponding to %got10(foo) 690b57cec5SDimitry Andric fixup_sparc_got10, 700b57cec5SDimitry Andric 710b57cec5SDimitry Andric /// fixup_sparc_got13 - 13-bit fixup corresponding to %got13(foo) 720b57cec5SDimitry Andric fixup_sparc_got13, 730b57cec5SDimitry Andric 740b57cec5SDimitry Andric /// fixup_sparc_wplt30 750b57cec5SDimitry Andric fixup_sparc_wplt30, 760b57cec5SDimitry Andric 770b57cec5SDimitry Andric /// fixups for Thread Local Storage 780b57cec5SDimitry Andric fixup_sparc_tls_gd_hi22, 790b57cec5SDimitry Andric fixup_sparc_tls_gd_lo10, 800b57cec5SDimitry Andric fixup_sparc_tls_gd_add, 810b57cec5SDimitry Andric fixup_sparc_tls_gd_call, 820b57cec5SDimitry Andric fixup_sparc_tls_ldm_hi22, 830b57cec5SDimitry Andric fixup_sparc_tls_ldm_lo10, 840b57cec5SDimitry Andric fixup_sparc_tls_ldm_add, 850b57cec5SDimitry Andric fixup_sparc_tls_ldm_call, 860b57cec5SDimitry Andric fixup_sparc_tls_ldo_hix22, 870b57cec5SDimitry Andric fixup_sparc_tls_ldo_lox10, 880b57cec5SDimitry Andric fixup_sparc_tls_ldo_add, 890b57cec5SDimitry Andric fixup_sparc_tls_ie_hi22, 900b57cec5SDimitry Andric fixup_sparc_tls_ie_lo10, 910b57cec5SDimitry Andric fixup_sparc_tls_ie_ld, 920b57cec5SDimitry Andric fixup_sparc_tls_ie_ldx, 930b57cec5SDimitry Andric fixup_sparc_tls_ie_add, 940b57cec5SDimitry Andric fixup_sparc_tls_le_hix22, 950b57cec5SDimitry Andric fixup_sparc_tls_le_lox10, 960b57cec5SDimitry Andric 9781ad6265SDimitry Andric /// 22-bit fixup corresponding to %hix(foo) 9881ad6265SDimitry Andric fixup_sparc_hix22, 9981ad6265SDimitry Andric /// 13-bit fixup corresponding to %lox(foo) 10081ad6265SDimitry Andric fixup_sparc_lox10, 10181ad6265SDimitry Andric 10281ad6265SDimitry Andric /// 22-bit fixup corresponding to %gdop_hix22(foo) 10381ad6265SDimitry Andric fixup_sparc_gotdata_hix22, 10481ad6265SDimitry Andric /// 13-bit fixup corresponding to %gdop_lox10(foo) 10581ad6265SDimitry Andric fixup_sparc_gotdata_lox10, 10681ad6265SDimitry Andric /// 32-bit fixup corresponding to %gdop(foo) 10781ad6265SDimitry Andric fixup_sparc_gotdata_op, 10881ad6265SDimitry Andric 1090b57cec5SDimitry Andric // Marker 1100b57cec5SDimitry Andric LastTargetFixupKind, 1110b57cec5SDimitry Andric NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind 1120b57cec5SDimitry Andric }; 1130b57cec5SDimitry Andric } 1140b57cec5SDimitry Andric } 1150b57cec5SDimitry Andric 1160b57cec5SDimitry Andric #endif 117