xref: /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/SPIRVUtils.h (revision 972a253a57b6f144b0e4a3e2080a2a0076ec55a0)
1 //===--- SPIRVUtils.h ---- SPIR-V Utility Functions -------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains miscellaneous utility functions.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_SPIRV_SPIRVUTILS_H
14 #define LLVM_LIB_TARGET_SPIRV_SPIRVUTILS_H
15 
16 #include "MCTargetDesc/SPIRVBaseInfo.h"
17 #include "llvm/IR/IRBuilder.h"
18 #include <string>
19 
20 namespace llvm {
21 class MCInst;
22 class MachineFunction;
23 class MachineInstr;
24 class MachineInstrBuilder;
25 class MachineIRBuilder;
26 class MachineRegisterInfo;
27 class Register;
28 class StringRef;
29 class SPIRVInstrInfo;
30 } // namespace llvm
31 
32 // Add the given string as a series of integer operand, inserting null
33 // terminators and padding to make sure the operands all have 32-bit
34 // little-endian words.
35 void addStringImm(const llvm::StringRef &Str, llvm::MCInst &Inst);
36 void addStringImm(const llvm::StringRef &Str, llvm::MachineInstrBuilder &MIB);
37 void addStringImm(const llvm::StringRef &Str, llvm::IRBuilder<> &B,
38                   std::vector<llvm::Value *> &Args);
39 
40 // Read the series of integer operands back as a null-terminated string using
41 // the reverse of the logic in addStringImm.
42 std::string getStringImm(const llvm::MachineInstr &MI, unsigned StartIndex);
43 
44 // Add the given numerical immediate to MIB.
45 void addNumImm(const llvm::APInt &Imm, llvm::MachineInstrBuilder &MIB);
46 
47 // Add an OpName instruction for the given target register.
48 void buildOpName(llvm::Register Target, const llvm::StringRef &Name,
49                  llvm::MachineIRBuilder &MIRBuilder);
50 
51 // Add an OpDecorate instruction for the given Reg.
52 void buildOpDecorate(llvm::Register Reg, llvm::MachineIRBuilder &MIRBuilder,
53                      llvm::SPIRV::Decoration Dec,
54                      const std::vector<uint32_t> &DecArgs,
55                      llvm::StringRef StrImm = "");
56 void buildOpDecorate(llvm::Register Reg, llvm::MachineInstr &I,
57                      const llvm::SPIRVInstrInfo &TII,
58                      llvm::SPIRV::Decoration Dec,
59                      const std::vector<uint32_t> &DecArgs,
60                      llvm::StringRef StrImm = "");
61 
62 // Convert a SPIR-V storage class to the corresponding LLVM IR address space.
63 unsigned storageClassToAddressSpace(llvm::SPIRV::StorageClass SC);
64 
65 // Convert an LLVM IR address space to a SPIR-V storage class.
66 llvm::SPIRV::StorageClass addressSpaceToStorageClass(unsigned AddrSpace);
67 
68 llvm::SPIRV::MemorySemantics
69 getMemSemanticsForStorageClass(llvm::SPIRV::StorageClass SC);
70 
71 llvm::SPIRV::MemorySemantics getMemSemantics(llvm::AtomicOrdering Ord);
72 
73 // Find def instruction for the given ConstReg, walking through
74 // spv_track_constant and ASSIGN_TYPE instructions. Updates ConstReg by def
75 // of OpConstant instruction.
76 llvm::MachineInstr *
77 getDefInstrMaybeConstant(llvm::Register &ConstReg,
78                          const llvm::MachineRegisterInfo *MRI);
79 
80 // Get constant integer value of the given ConstReg.
81 uint64_t getIConstVal(llvm::Register ConstReg,
82                       const llvm::MachineRegisterInfo *MRI);
83 
84 // Check if MI is a SPIR-V specific intrinsic call.
85 bool isSpvIntrinsic(llvm::MachineInstr &MI, llvm::Intrinsic::ID IntrinsicID);
86 
87 // Get type of i-th operand of the metadata node.
88 llvm::Type *getMDOperandAsType(const llvm::MDNode *N, unsigned I);
89 #endif // LLVM_LIB_TARGET_SPIRV_SPIRVUTILS_H
90