1 //===-- SPIRVInstrInfo.h - SPIR-V Instruction Information -------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains the SPIR-V implementation of the TargetInstrInfo class. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H 14 #define LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H 15 16 #include "SPIRVRegisterInfo.h" 17 #include "llvm/CodeGen/TargetInstrInfo.h" 18 19 #define GET_INSTRINFO_HEADER 20 #include "SPIRVGenInstrInfo.inc" 21 22 namespace llvm { 23 24 class SPIRVInstrInfo : public SPIRVGenInstrInfo { 25 const SPIRVRegisterInfo RI; 26 27 public: 28 SPIRVInstrInfo(); 29 30 const SPIRVRegisterInfo &getRegisterInfo() const { return RI; } 31 bool isHeaderInstr(const MachineInstr &MI) const; 32 bool isConstantInstr(const MachineInstr &MI) const; 33 bool isInlineAsmDefInstr(const MachineInstr &MI) const; 34 bool isTypeDeclInstr(const MachineInstr &MI) const; 35 bool isDecorationInstr(const MachineInstr &MI) const; 36 bool canUseFastMathFlags(const MachineInstr &MI) const; 37 bool canUseNSW(const MachineInstr &MI) const; 38 bool canUseNUW(const MachineInstr &MI) const; 39 40 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 41 MachineBasicBlock *&FBB, 42 SmallVectorImpl<MachineOperand> &Cond, 43 bool AllowModify = false) const override; 44 45 unsigned removeBranch(MachineBasicBlock &MBB, 46 int *BytesRemoved = nullptr) const override; 47 48 unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 49 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, 50 const DebugLoc &DL, 51 int *BytesAdded = nullptr) const override; 52 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, 53 const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, 54 bool KillSrc) const override; 55 bool expandPostRAPseudo(MachineInstr &MI) const override; 56 }; 57 58 namespace SPIRV { 59 enum AsmComments { 60 // It is a half type 61 ASM_PRINTER_WIDTH16 = MachineInstr::TAsmComments 62 }; 63 } // namespace SPIRV 64 65 } // namespace llvm 66 67 #endif // LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H 68