1*81ad6265SDimitry Andric //===-- SPIRVISelLowering.h - SPIR-V DAG Lowering Interface -----*- C++ -*-===// 2*81ad6265SDimitry Andric // 3*81ad6265SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*81ad6265SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5*81ad6265SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*81ad6265SDimitry Andric // 7*81ad6265SDimitry Andric //===----------------------------------------------------------------------===// 8*81ad6265SDimitry Andric // 9*81ad6265SDimitry Andric // This file defines the interfaces that SPIR-V uses to lower LLVM code into a 10*81ad6265SDimitry Andric // selection DAG. 11*81ad6265SDimitry Andric // 12*81ad6265SDimitry Andric //===----------------------------------------------------------------------===// 13*81ad6265SDimitry Andric 14*81ad6265SDimitry Andric #ifndef LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H 15*81ad6265SDimitry Andric #define LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H 16*81ad6265SDimitry Andric 17*81ad6265SDimitry Andric #include "llvm/CodeGen/TargetLowering.h" 18*81ad6265SDimitry Andric 19*81ad6265SDimitry Andric namespace llvm { 20*81ad6265SDimitry Andric class SPIRVSubtarget; 21*81ad6265SDimitry Andric 22*81ad6265SDimitry Andric class SPIRVTargetLowering : public TargetLowering { 23*81ad6265SDimitry Andric public: 24*81ad6265SDimitry Andric explicit SPIRVTargetLowering(const TargetMachine &TM, 25*81ad6265SDimitry Andric const SPIRVSubtarget &STI) 26*81ad6265SDimitry Andric : TargetLowering(TM) {} 27*81ad6265SDimitry Andric 28*81ad6265SDimitry Andric // Stop IRTranslator breaking up FMA instrs to preserve types information. 29*81ad6265SDimitry Andric bool isFMAFasterThanFMulAndFAdd(const MachineFunction &MF, 30*81ad6265SDimitry Andric EVT) const override { 31*81ad6265SDimitry Andric return true; 32*81ad6265SDimitry Andric } 33*81ad6265SDimitry Andric 34*81ad6265SDimitry Andric // This is to prevent sexts of non-i64 vector indices which are generated 35*81ad6265SDimitry Andric // within general IRTranslator hence type generation for it is omitted. 36*81ad6265SDimitry Andric MVT getVectorIdxTy(const DataLayout &DL) const override { 37*81ad6265SDimitry Andric return MVT::getIntegerVT(32); 38*81ad6265SDimitry Andric } 39*81ad6265SDimitry Andric unsigned getNumRegistersForCallingConv(LLVMContext &Context, 40*81ad6265SDimitry Andric CallingConv::ID CC, 41*81ad6265SDimitry Andric EVT VT) const override; 42*81ad6265SDimitry Andric MVT getRegisterTypeForCallingConv(LLVMContext &Context, CallingConv::ID CC, 43*81ad6265SDimitry Andric EVT VT) const override; 44*81ad6265SDimitry Andric }; 45*81ad6265SDimitry Andric } // namespace llvm 46*81ad6265SDimitry Andric 47*81ad6265SDimitry Andric #endif // LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H 48