xref: /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp (revision 5ca8e32633c4ffbbcd6762e5888b6a4ba0708c6c) 
1 //===-- SPIRVAsmPrinter.cpp - SPIR-V LLVM assembly writer ------*- C++ -*--===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains a printer that converts from our internal representation
10 // of machine-dependent LLVM code to the SPIR-V assembly language.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "MCTargetDesc/SPIRVInstPrinter.h"
15 #include "SPIRV.h"
16 #include "SPIRVInstrInfo.h"
17 #include "SPIRVMCInstLower.h"
18 #include "SPIRVModuleAnalysis.h"
19 #include "SPIRVSubtarget.h"
20 #include "SPIRVTargetMachine.h"
21 #include "SPIRVUtils.h"
22 #include "TargetInfo/SPIRVTargetInfo.h"
23 #include "llvm/ADT/DenseMap.h"
24 #include "llvm/Analysis/ValueTracking.h"
25 #include "llvm/CodeGen/AsmPrinter.h"
26 #include "llvm/CodeGen/MachineConstantPool.h"
27 #include "llvm/CodeGen/MachineFunctionPass.h"
28 #include "llvm/CodeGen/MachineInstr.h"
29 #include "llvm/CodeGen/MachineModuleInfo.h"
30 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
31 #include "llvm/MC/MCAsmInfo.h"
32 #include "llvm/MC/MCInst.h"
33 #include "llvm/MC/MCStreamer.h"
34 #include "llvm/MC/MCSymbol.h"
35 #include "llvm/MC/TargetRegistry.h"
36 #include "llvm/Support/raw_ostream.h"
37 
38 using namespace llvm;
39 
40 #define DEBUG_TYPE "asm-printer"
41 
42 namespace {
43 class SPIRVAsmPrinter : public AsmPrinter {
44 public:
45   explicit SPIRVAsmPrinter(TargetMachine &TM,
46                            std::unique_ptr<MCStreamer> Streamer)
47       : AsmPrinter(TM, std::move(Streamer)), ST(nullptr), TII(nullptr) {}
48   bool ModuleSectionsEmitted;
49   const SPIRVSubtarget *ST;
50   const SPIRVInstrInfo *TII;
51 
52   StringRef getPassName() const override { return "SPIRV Assembly Printer"; }
53   void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
54   bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
55                        const char *ExtraCode, raw_ostream &O) override;
56 
57   void outputMCInst(MCInst &Inst);
58   void outputInstruction(const MachineInstr *MI);
59   void outputModuleSection(SPIRV::ModuleSectionType MSType);
60   void outputGlobalRequirements();
61   void outputEntryPoints();
62   void outputDebugSourceAndStrings(const Module &M);
63   void outputOpExtInstImports(const Module &M);
64   void outputOpMemoryModel();
65   void outputOpFunctionEnd();
66   void outputExtFuncDecls();
67   void outputExecutionModeFromMDNode(Register Reg, MDNode *Node,
68                                      SPIRV::ExecutionMode::ExecutionMode EM);
69   void outputExecutionMode(const Module &M);
70   void outputAnnotations(const Module &M);
71   void outputModuleSections();
72 
73   void emitInstruction(const MachineInstr *MI) override;
74   void emitFunctionEntryLabel() override {}
75   void emitFunctionHeader() override;
76   void emitFunctionBodyStart() override {}
77   void emitFunctionBodyEnd() override;
78   void emitBasicBlockStart(const MachineBasicBlock &MBB) override;
79   void emitBasicBlockEnd(const MachineBasicBlock &MBB) override {}
80   void emitGlobalVariable(const GlobalVariable *GV) override {}
81   void emitOpLabel(const MachineBasicBlock &MBB);
82   void emitEndOfAsmFile(Module &M) override;
83   bool doInitialization(Module &M) override;
84 
85   void getAnalysisUsage(AnalysisUsage &AU) const override;
86   SPIRV::ModuleAnalysisInfo *MAI;
87 };
88 } // namespace
89 
90 void SPIRVAsmPrinter::getAnalysisUsage(AnalysisUsage &AU) const {
91   AU.addRequired<SPIRVModuleAnalysis>();
92   AU.addPreserved<SPIRVModuleAnalysis>();
93   AsmPrinter::getAnalysisUsage(AU);
94 }
95 
96 // If the module has no functions, we need output global info anyway.
97 void SPIRVAsmPrinter::emitEndOfAsmFile(Module &M) {
98   if (ModuleSectionsEmitted == false) {
99     outputModuleSections();
100     ModuleSectionsEmitted = true;
101   }
102 }
103 
104 void SPIRVAsmPrinter::emitFunctionHeader() {
105   if (ModuleSectionsEmitted == false) {
106     outputModuleSections();
107     ModuleSectionsEmitted = true;
108   }
109   // Get the subtarget from the current MachineFunction.
110   ST = &MF->getSubtarget<SPIRVSubtarget>();
111   TII = ST->getInstrInfo();
112   const Function &F = MF->getFunction();
113 
114   if (isVerbose()) {
115     OutStreamer->getCommentOS()
116         << "-- Begin function "
117         << GlobalValue::dropLLVMManglingEscape(F.getName()) << '\n';
118   }
119 
120   auto Section = getObjFileLowering().SectionForGlobal(&F, TM);
121   MF->setSection(Section);
122 }
123 
124 void SPIRVAsmPrinter::outputOpFunctionEnd() {
125   MCInst FunctionEndInst;
126   FunctionEndInst.setOpcode(SPIRV::OpFunctionEnd);
127   outputMCInst(FunctionEndInst);
128 }
129 
130 // Emit OpFunctionEnd at the end of MF and clear BBNumToRegMap.
131 void SPIRVAsmPrinter::emitFunctionBodyEnd() {
132   outputOpFunctionEnd();
133   MAI->BBNumToRegMap.clear();
134 }
135 
136 void SPIRVAsmPrinter::emitOpLabel(const MachineBasicBlock &MBB) {
137   MCInst LabelInst;
138   LabelInst.setOpcode(SPIRV::OpLabel);
139   LabelInst.addOperand(MCOperand::createReg(MAI->getOrCreateMBBRegister(MBB)));
140   outputMCInst(LabelInst);
141 }
142 
143 void SPIRVAsmPrinter::emitBasicBlockStart(const MachineBasicBlock &MBB) {
144   assert(!MBB.empty() && "MBB is empty!");
145 
146   // If it's the first MBB in MF, it has OpFunction and OpFunctionParameter, so
147   // OpLabel should be output after them.
148   if (MBB.getNumber() == MF->front().getNumber()) {
149     for (const MachineInstr &MI : MBB)
150       if (MI.getOpcode() == SPIRV::OpFunction)
151         return;
152     // TODO: this case should be checked by the verifier.
153     report_fatal_error("OpFunction is expected in the front MBB of MF");
154   }
155   emitOpLabel(MBB);
156 }
157 
158 void SPIRVAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
159                                    raw_ostream &O) {
160   const MachineOperand &MO = MI->getOperand(OpNum);
161 
162   switch (MO.getType()) {
163   case MachineOperand::MO_Register:
164     O << SPIRVInstPrinter::getRegisterName(MO.getReg());
165     break;
166 
167   case MachineOperand::MO_Immediate:
168     O << MO.getImm();
169     break;
170 
171   case MachineOperand::MO_FPImmediate:
172     O << MO.getFPImm();
173     break;
174 
175   case MachineOperand::MO_MachineBasicBlock:
176     O << *MO.getMBB()->getSymbol();
177     break;
178 
179   case MachineOperand::MO_GlobalAddress:
180     O << *getSymbol(MO.getGlobal());
181     break;
182 
183   case MachineOperand::MO_BlockAddress: {
184     MCSymbol *BA = GetBlockAddressSymbol(MO.getBlockAddress());
185     O << BA->getName();
186     break;
187   }
188 
189   case MachineOperand::MO_ExternalSymbol:
190     O << *GetExternalSymbolSymbol(MO.getSymbolName());
191     break;
192 
193   case MachineOperand::MO_JumpTableIndex:
194   case MachineOperand::MO_ConstantPoolIndex:
195   default:
196     llvm_unreachable("<unknown operand type>");
197   }
198 }
199 
200 bool SPIRVAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
201                                       const char *ExtraCode, raw_ostream &O) {
202   if (ExtraCode && ExtraCode[0])
203     return true; // Invalid instruction - SPIR-V does not have special modifiers
204 
205   printOperand(MI, OpNo, O);
206   return false;
207 }
208 
209 static bool isFuncOrHeaderInstr(const MachineInstr *MI,
210                                 const SPIRVInstrInfo *TII) {
211   return TII->isHeaderInstr(*MI) || MI->getOpcode() == SPIRV::OpFunction ||
212          MI->getOpcode() == SPIRV::OpFunctionParameter;
213 }
214 
215 void SPIRVAsmPrinter::outputMCInst(MCInst &Inst) {
216   OutStreamer->emitInstruction(Inst, *OutContext.getSubtargetInfo());
217 }
218 
219 void SPIRVAsmPrinter::outputInstruction(const MachineInstr *MI) {
220   SPIRVMCInstLower MCInstLowering;
221   MCInst TmpInst;
222   MCInstLowering.lower(MI, TmpInst, MAI);
223   outputMCInst(TmpInst);
224 }
225 
226 void SPIRVAsmPrinter::emitInstruction(const MachineInstr *MI) {
227   SPIRV_MC::verifyInstructionPredicates(MI->getOpcode(),
228                                         getSubtargetInfo().getFeatureBits());
229 
230   if (!MAI->getSkipEmission(MI))
231     outputInstruction(MI);
232 
233   // Output OpLabel after OpFunction and OpFunctionParameter in the first MBB.
234   const MachineInstr *NextMI = MI->getNextNode();
235   if (!MAI->hasMBBRegister(*MI->getParent()) && isFuncOrHeaderInstr(MI, TII) &&
236       (!NextMI || !isFuncOrHeaderInstr(NextMI, TII))) {
237     assert(MI->getParent()->getNumber() == MF->front().getNumber() &&
238            "OpFunction is not in the front MBB of MF");
239     emitOpLabel(*MI->getParent());
240   }
241 }
242 
243 void SPIRVAsmPrinter::outputModuleSection(SPIRV::ModuleSectionType MSType) {
244   for (MachineInstr *MI : MAI->getMSInstrs(MSType))
245     outputInstruction(MI);
246 }
247 
248 void SPIRVAsmPrinter::outputDebugSourceAndStrings(const Module &M) {
249   // Output OpSourceExtensions.
250   for (auto &Str : MAI->SrcExt) {
251     MCInst Inst;
252     Inst.setOpcode(SPIRV::OpSourceExtension);
253     addStringImm(Str.first(), Inst);
254     outputMCInst(Inst);
255   }
256   // Output OpSource.
257   MCInst Inst;
258   Inst.setOpcode(SPIRV::OpSource);
259   Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->SrcLang)));
260   Inst.addOperand(
261       MCOperand::createImm(static_cast<unsigned>(MAI->SrcLangVersion)));
262   outputMCInst(Inst);
263 }
264 
265 void SPIRVAsmPrinter::outputOpExtInstImports(const Module &M) {
266   for (auto &CU : MAI->ExtInstSetMap) {
267     unsigned Set = CU.first;
268     Register Reg = CU.second;
269     MCInst Inst;
270     Inst.setOpcode(SPIRV::OpExtInstImport);
271     Inst.addOperand(MCOperand::createReg(Reg));
272     addStringImm(getExtInstSetName(
273                      static_cast<SPIRV::InstructionSet::InstructionSet>(Set)),
274                  Inst);
275     outputMCInst(Inst);
276   }
277 }
278 
279 void SPIRVAsmPrinter::outputOpMemoryModel() {
280   MCInst Inst;
281   Inst.setOpcode(SPIRV::OpMemoryModel);
282   Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->Addr)));
283   Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->Mem)));
284   outputMCInst(Inst);
285 }
286 
287 // Before the OpEntryPoints' output, we need to add the entry point's
288 // interfaces. The interface is a list of IDs of global OpVariable instructions.
289 // These declare the set of global variables from a module that form
290 // the interface of this entry point.
291 void SPIRVAsmPrinter::outputEntryPoints() {
292   // Find all OpVariable IDs with required StorageClass.
293   DenseSet<Register> InterfaceIDs;
294   for (MachineInstr *MI : MAI->GlobalVarList) {
295     assert(MI->getOpcode() == SPIRV::OpVariable);
296     auto SC = static_cast<SPIRV::StorageClass::StorageClass>(
297         MI->getOperand(2).getImm());
298     // Before version 1.4, the interface's storage classes are limited to
299     // the Input and Output storage classes. Starting with version 1.4,
300     // the interface's storage classes are all storage classes used in
301     // declaring all global variables referenced by the entry point call tree.
302     if (ST->getSPIRVVersion() >= 14 || SC == SPIRV::StorageClass::Input ||
303         SC == SPIRV::StorageClass::Output) {
304       MachineFunction *MF = MI->getMF();
305       Register Reg = MAI->getRegisterAlias(MF, MI->getOperand(0).getReg());
306       InterfaceIDs.insert(Reg);
307     }
308   }
309 
310   // Output OpEntryPoints adding interface args to all of them.
311   for (MachineInstr *MI : MAI->getMSInstrs(SPIRV::MB_EntryPoints)) {
312     SPIRVMCInstLower MCInstLowering;
313     MCInst TmpInst;
314     MCInstLowering.lower(MI, TmpInst, MAI);
315     for (Register Reg : InterfaceIDs) {
316       assert(Reg.isValid());
317       TmpInst.addOperand(MCOperand::createReg(Reg));
318     }
319     outputMCInst(TmpInst);
320   }
321 }
322 
323 // Create global OpCapability instructions for the required capabilities.
324 void SPIRVAsmPrinter::outputGlobalRequirements() {
325   // Abort here if not all requirements can be satisfied.
326   MAI->Reqs.checkSatisfiable(*ST);
327 
328   for (const auto &Cap : MAI->Reqs.getMinimalCapabilities()) {
329     MCInst Inst;
330     Inst.setOpcode(SPIRV::OpCapability);
331     Inst.addOperand(MCOperand::createImm(Cap));
332     outputMCInst(Inst);
333   }
334 
335   // Generate the final OpExtensions with strings instead of enums.
336   for (const auto &Ext : MAI->Reqs.getExtensions()) {
337     MCInst Inst;
338     Inst.setOpcode(SPIRV::OpExtension);
339     addStringImm(getSymbolicOperandMnemonic(
340                      SPIRV::OperandCategory::ExtensionOperand, Ext),
341                  Inst);
342     outputMCInst(Inst);
343   }
344   // TODO add a pseudo instr for version number.
345 }
346 
347 void SPIRVAsmPrinter::outputExtFuncDecls() {
348   // Insert OpFunctionEnd after each declaration.
349   SmallVectorImpl<MachineInstr *>::iterator
350       I = MAI->getMSInstrs(SPIRV::MB_ExtFuncDecls).begin(),
351       E = MAI->getMSInstrs(SPIRV::MB_ExtFuncDecls).end();
352   for (; I != E; ++I) {
353     outputInstruction(*I);
354     if ((I + 1) == E || (*(I + 1))->getOpcode() == SPIRV::OpFunction)
355       outputOpFunctionEnd();
356   }
357 }
358 
359 // Encode LLVM type by SPIR-V execution mode VecTypeHint.
360 static unsigned encodeVecTypeHint(Type *Ty) {
361   if (Ty->isHalfTy())
362     return 4;
363   if (Ty->isFloatTy())
364     return 5;
365   if (Ty->isDoubleTy())
366     return 6;
367   if (IntegerType *IntTy = dyn_cast<IntegerType>(Ty)) {
368     switch (IntTy->getIntegerBitWidth()) {
369     case 8:
370       return 0;
371     case 16:
372       return 1;
373     case 32:
374       return 2;
375     case 64:
376       return 3;
377     default:
378       llvm_unreachable("invalid integer type");
379     }
380   }
381   if (FixedVectorType *VecTy = dyn_cast<FixedVectorType>(Ty)) {
382     Type *EleTy = VecTy->getElementType();
383     unsigned Size = VecTy->getNumElements();
384     return Size << 16 | encodeVecTypeHint(EleTy);
385   }
386   llvm_unreachable("invalid type");
387 }
388 
389 static void addOpsFromMDNode(MDNode *MDN, MCInst &Inst,
390                              SPIRV::ModuleAnalysisInfo *MAI) {
391   for (const MDOperand &MDOp : MDN->operands()) {
392     if (auto *CMeta = dyn_cast<ConstantAsMetadata>(MDOp)) {
393       Constant *C = CMeta->getValue();
394       if (ConstantInt *Const = dyn_cast<ConstantInt>(C)) {
395         Inst.addOperand(MCOperand::createImm(Const->getZExtValue()));
396       } else if (auto *CE = dyn_cast<Function>(C)) {
397         Register FuncReg = MAI->getFuncReg(CE);
398         assert(FuncReg.isValid());
399         Inst.addOperand(MCOperand::createReg(FuncReg));
400       }
401     }
402   }
403 }
404 
405 void SPIRVAsmPrinter::outputExecutionModeFromMDNode(
406     Register Reg, MDNode *Node, SPIRV::ExecutionMode::ExecutionMode EM) {
407   MCInst Inst;
408   Inst.setOpcode(SPIRV::OpExecutionMode);
409   Inst.addOperand(MCOperand::createReg(Reg));
410   Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(EM)));
411   addOpsFromMDNode(Node, Inst, MAI);
412   outputMCInst(Inst);
413 }
414 
415 void SPIRVAsmPrinter::outputExecutionMode(const Module &M) {
416   NamedMDNode *Node = M.getNamedMetadata("spirv.ExecutionMode");
417   if (Node) {
418     for (unsigned i = 0; i < Node->getNumOperands(); i++) {
419       MCInst Inst;
420       Inst.setOpcode(SPIRV::OpExecutionMode);
421       addOpsFromMDNode(cast<MDNode>(Node->getOperand(i)), Inst, MAI);
422       outputMCInst(Inst);
423     }
424   }
425   for (auto FI = M.begin(), E = M.end(); FI != E; ++FI) {
426     const Function &F = *FI;
427     if (F.isDeclaration())
428       continue;
429     Register FReg = MAI->getFuncReg(&F);
430     assert(FReg.isValid());
431     if (MDNode *Node = F.getMetadata("reqd_work_group_size"))
432       outputExecutionModeFromMDNode(FReg, Node,
433                                     SPIRV::ExecutionMode::LocalSize);
434     if (MDNode *Node = F.getMetadata("work_group_size_hint"))
435       outputExecutionModeFromMDNode(FReg, Node,
436                                     SPIRV::ExecutionMode::LocalSizeHint);
437     if (MDNode *Node = F.getMetadata("intel_reqd_sub_group_size"))
438       outputExecutionModeFromMDNode(FReg, Node,
439                                     SPIRV::ExecutionMode::SubgroupSize);
440     if (MDNode *Node = F.getMetadata("vec_type_hint")) {
441       MCInst Inst;
442       Inst.setOpcode(SPIRV::OpExecutionMode);
443       Inst.addOperand(MCOperand::createReg(FReg));
444       unsigned EM = static_cast<unsigned>(SPIRV::ExecutionMode::VecTypeHint);
445       Inst.addOperand(MCOperand::createImm(EM));
446       unsigned TypeCode = encodeVecTypeHint(getMDOperandAsType(Node, 0));
447       Inst.addOperand(MCOperand::createImm(TypeCode));
448       outputMCInst(Inst);
449     }
450     if (!M.getNamedMetadata("spirv.ExecutionMode") &&
451         !M.getNamedMetadata("opencl.enable.FP_CONTRACT")) {
452       MCInst Inst;
453       Inst.setOpcode(SPIRV::OpExecutionMode);
454       Inst.addOperand(MCOperand::createReg(FReg));
455       unsigned EM = static_cast<unsigned>(SPIRV::ExecutionMode::ContractionOff);
456       Inst.addOperand(MCOperand::createImm(EM));
457       outputMCInst(Inst);
458     }
459   }
460 }
461 
462 void SPIRVAsmPrinter::outputAnnotations(const Module &M) {
463   outputModuleSection(SPIRV::MB_Annotations);
464   // Process llvm.global.annotations special global variable.
465   for (auto F = M.global_begin(), E = M.global_end(); F != E; ++F) {
466     if ((*F).getName() != "llvm.global.annotations")
467       continue;
468     const GlobalVariable *V = &(*F);
469     const ConstantArray *CA = cast<ConstantArray>(V->getOperand(0));
470     for (Value *Op : CA->operands()) {
471       ConstantStruct *CS = cast<ConstantStruct>(Op);
472       // The first field of the struct contains a pointer to
473       // the annotated variable.
474       Value *AnnotatedVar = CS->getOperand(0)->stripPointerCasts();
475       if (!isa<Function>(AnnotatedVar))
476         report_fatal_error("Unsupported value in llvm.global.annotations");
477       Function *Func = cast<Function>(AnnotatedVar);
478       Register Reg = MAI->getFuncReg(Func);
479 
480       // The second field contains a pointer to a global annotation string.
481       GlobalVariable *GV =
482           cast<GlobalVariable>(CS->getOperand(1)->stripPointerCasts());
483 
484       StringRef AnnotationString;
485       getConstantStringInfo(GV, AnnotationString);
486       MCInst Inst;
487       Inst.setOpcode(SPIRV::OpDecorate);
488       Inst.addOperand(MCOperand::createReg(Reg));
489       unsigned Dec = static_cast<unsigned>(SPIRV::Decoration::UserSemantic);
490       Inst.addOperand(MCOperand::createImm(Dec));
491       addStringImm(AnnotationString, Inst);
492       outputMCInst(Inst);
493     }
494   }
495 }
496 
497 void SPIRVAsmPrinter::outputModuleSections() {
498   const Module *M = MMI->getModule();
499   // Get the global subtarget to output module-level info.
500   ST = static_cast<const SPIRVTargetMachine &>(TM).getSubtargetImpl();
501   TII = ST->getInstrInfo();
502   MAI = &SPIRVModuleAnalysis::MAI;
503   assert(ST && TII && MAI && M && "Module analysis is required");
504   // Output instructions according to the Logical Layout of a Module:
505   // 1,2. All OpCapability instructions, then optional OpExtension instructions.
506   outputGlobalRequirements();
507   // 3. Optional OpExtInstImport instructions.
508   outputOpExtInstImports(*M);
509   // 4. The single required OpMemoryModel instruction.
510   outputOpMemoryModel();
511   // 5. All entry point declarations, using OpEntryPoint.
512   outputEntryPoints();
513   // 6. Execution-mode declarations, using OpExecutionMode or OpExecutionModeId.
514   outputExecutionMode(*M);
515   // 7a. Debug: all OpString, OpSourceExtension, OpSource, and
516   // OpSourceContinued, without forward references.
517   outputDebugSourceAndStrings(*M);
518   // 7b. Debug: all OpName and all OpMemberName.
519   outputModuleSection(SPIRV::MB_DebugNames);
520   // 7c. Debug: all OpModuleProcessed instructions.
521   outputModuleSection(SPIRV::MB_DebugModuleProcessed);
522   // 8. All annotation instructions (all decorations).
523   outputAnnotations(*M);
524   // 9. All type declarations (OpTypeXXX instructions), all constant
525   // instructions, and all global variable declarations. This section is
526   // the first section to allow use of: OpLine and OpNoLine debug information;
527   // non-semantic instructions with OpExtInst.
528   outputModuleSection(SPIRV::MB_TypeConstVars);
529   // 10. All function declarations (functions without a body).
530   outputExtFuncDecls();
531   // 11. All function definitions (functions with a body).
532   // This is done in regular function output.
533 }
534 
535 bool SPIRVAsmPrinter::doInitialization(Module &M) {
536   ModuleSectionsEmitted = false;
537   // We need to call the parent's one explicitly.
538   return AsmPrinter::doInitialization(M);
539 }
540 
541 // Force static initialization.
542 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSPIRVAsmPrinter() {
543   RegisterAsmPrinter<SPIRVAsmPrinter> X(getTheSPIRV32Target());
544   RegisterAsmPrinter<SPIRVAsmPrinter> Y(getTheSPIRV64Target());
545 }
546