xref: /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVAsmBackend.cpp (revision 7fdf597e96a02165cfe22ff357b857d5fa15ed8a)
1 //===-- SPIRVAsmBackend.cpp - SPIR-V Assembler Backend ---------*- C++ -*--===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "MCTargetDesc/SPIRVMCTargetDesc.h"
10 #include "llvm/MC/MCAsmBackend.h"
11 #include "llvm/MC/MCAssembler.h"
12 #include "llvm/MC/MCObjectWriter.h"
13 #include "llvm/Support/EndianStream.h"
14 
15 using namespace llvm;
16 
17 namespace {
18 
19 class SPIRVAsmBackend : public MCAsmBackend {
20 public:
21   SPIRVAsmBackend(llvm::endianness Endian) : MCAsmBackend(Endian) {}
22 
23   void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
24                   const MCValue &Target, MutableArrayRef<char> Data,
25                   uint64_t Value, bool IsResolved,
26                   const MCSubtargetInfo *STI) const override {}
27 
28   std::unique_ptr<MCObjectTargetWriter>
29   createObjectTargetWriter() const override {
30     return createSPIRVObjectTargetWriter();
31   }
32 
33   unsigned getNumFixupKinds() const override { return 1; }
34 
35   bool mayNeedRelaxation(const MCInst &Inst,
36                          const MCSubtargetInfo &STI) const override {
37     return false;
38   }
39 
40   void relaxInstruction(MCInst &Inst,
41                         const MCSubtargetInfo &STI) const override {}
42 
43   bool writeNopData(raw_ostream &OS, uint64_t Count,
44                     const MCSubtargetInfo *STI) const override {
45     return false;
46   }
47 };
48 
49 } // end anonymous namespace
50 
51 MCAsmBackend *llvm::createSPIRVAsmBackend(const Target &T,
52                                           const MCSubtargetInfo &STI,
53                                           const MCRegisterInfo &MRI,
54                                           const MCTargetOptions &) {
55   return new SPIRVAsmBackend(llvm::endianness::little);
56 }
57