1 //===- RISCVTargetTransformInfo.h - RISC-V specific TTI ---------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 /// \file 9 /// This file defines a TargetTransformInfo::Concept conforming object specific 10 /// to the RISC-V target machine. It uses the target's detailed information to 11 /// provide more precise answers to certain TTI queries, while letting the 12 /// target independent and default TTI implementations handle the rest. 13 /// 14 //===----------------------------------------------------------------------===// 15 16 #ifndef LLVM_LIB_TARGET_RISCV_RISCVTARGETTRANSFORMINFO_H 17 #define LLVM_LIB_TARGET_RISCV_RISCVTARGETTRANSFORMINFO_H 18 19 #include "RISCVSubtarget.h" 20 #include "RISCVTargetMachine.h" 21 #include "llvm/Analysis/TargetTransformInfo.h" 22 #include "llvm/CodeGen/BasicTTIImpl.h" 23 #include "llvm/IR/Function.h" 24 25 namespace llvm { 26 27 class RISCVTTIImpl : public BasicTTIImplBase<RISCVTTIImpl> { 28 using BaseT = BasicTTIImplBase<RISCVTTIImpl>; 29 using TTI = TargetTransformInfo; 30 31 friend BaseT; 32 33 const RISCVSubtarget *ST; 34 const RISCVTargetLowering *TLI; 35 36 const RISCVSubtarget *getST() const { return ST; } 37 const RISCVTargetLowering *getTLI() const { return TLI; } 38 39 public: 40 explicit RISCVTTIImpl(const RISCVTargetMachine *TM, const Function &F) 41 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), 42 TLI(ST->getTargetLowering()) {} 43 44 int getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind); 45 int getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, 46 TTI::TargetCostKind CostKind); 47 int getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, 48 Type *Ty, TTI::TargetCostKind CostKind); 49 }; 50 51 } // end namespace llvm 52 53 #endif // LLVM_LIB_TARGET_RISCV_RISCVTARGETTRANSFORMINFO_H 54