xref: /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVSubtarget.h (revision e2eeea75eb8b6dd50c1298067a0655880d186734)
1 //===-- RISCVSubtarget.h - Define Subtarget for the RISCV -------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares the RISCV specific subclass of TargetSubtargetInfo.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_RISCV_RISCVSUBTARGET_H
14 #define LLVM_LIB_TARGET_RISCV_RISCVSUBTARGET_H
15 
16 #include "RISCVFrameLowering.h"
17 #include "RISCVISelLowering.h"
18 #include "RISCVInstrInfo.h"
19 #include "Utils/RISCVBaseInfo.h"
20 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
21 #include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
22 #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
23 #include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
24 #include "llvm/CodeGen/SelectionDAGTargetInfo.h"
25 #include "llvm/CodeGen/TargetSubtargetInfo.h"
26 #include "llvm/IR/DataLayout.h"
27 #include "llvm/Target/TargetMachine.h"
28 
29 #define GET_SUBTARGETINFO_HEADER
30 #include "RISCVGenSubtargetInfo.inc"
31 
32 namespace llvm {
33 class StringRef;
34 
35 class RISCVSubtarget : public RISCVGenSubtargetInfo {
36   virtual void anchor();
37   bool HasStdExtM = false;
38   bool HasStdExtA = false;
39   bool HasStdExtF = false;
40   bool HasStdExtD = false;
41   bool HasStdExtC = false;
42   bool HasStdExtB = false;
43   bool HasStdExtZbb = false;
44   bool HasStdExtZbc = false;
45   bool HasStdExtZbe = false;
46   bool HasStdExtZbf = false;
47   bool HasStdExtZbm = false;
48   bool HasStdExtZbp = false;
49   bool HasStdExtZbr = false;
50   bool HasStdExtZbs = false;
51   bool HasStdExtZbt = false;
52   bool HasStdExtZbproposedc = false;
53   bool HasStdExtV = false;
54   bool HasRV64 = false;
55   bool IsRV32E = false;
56   bool EnableLinkerRelax = false;
57   bool EnableRVCHintInstrs = true;
58   bool EnableSaveRestore = false;
59   unsigned XLen = 32;
60   MVT XLenVT = MVT::i32;
61   RISCVABI::ABI TargetABI = RISCVABI::ABI_Unknown;
62   BitVector UserReservedRegister;
63   RISCVFrameLowering FrameLowering;
64   RISCVInstrInfo InstrInfo;
65   RISCVRegisterInfo RegInfo;
66   RISCVTargetLowering TLInfo;
67   SelectionDAGTargetInfo TSInfo;
68 
69   /// Initializes using the passed in CPU and feature strings so that we can
70   /// use initializer lists for subtarget initialization.
71   RISCVSubtarget &initializeSubtargetDependencies(const Triple &TT,
72                                                   StringRef CPU, StringRef FS,
73                                                   StringRef ABIName);
74 
75 public:
76   // Initializes the data members to match that of the specified triple.
77   RISCVSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
78                  StringRef ABIName, const TargetMachine &TM);
79 
80   // Parses features string setting specified subtarget options. The
81   // definition of this function is auto-generated by tblgen.
82   void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
83 
84   const RISCVFrameLowering *getFrameLowering() const override {
85     return &FrameLowering;
86   }
87   const RISCVInstrInfo *getInstrInfo() const override { return &InstrInfo; }
88   const RISCVRegisterInfo *getRegisterInfo() const override {
89     return &RegInfo;
90   }
91   const RISCVTargetLowering *getTargetLowering() const override {
92     return &TLInfo;
93   }
94   const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
95     return &TSInfo;
96   }
97   bool enableMachineScheduler() const override { return true; }
98   bool hasStdExtM() const { return HasStdExtM; }
99   bool hasStdExtA() const { return HasStdExtA; }
100   bool hasStdExtF() const { return HasStdExtF; }
101   bool hasStdExtD() const { return HasStdExtD; }
102   bool hasStdExtC() const { return HasStdExtC; }
103   bool hasStdExtB() const { return HasStdExtB; }
104   bool hasStdExtZbb() const { return HasStdExtZbb; }
105   bool hasStdExtZbc() const { return HasStdExtZbc; }
106   bool hasStdExtZbe() const { return HasStdExtZbe; }
107   bool hasStdExtZbf() const { return HasStdExtZbf; }
108   bool hasStdExtZbm() const { return HasStdExtZbm; }
109   bool hasStdExtZbp() const { return HasStdExtZbp; }
110   bool hasStdExtZbr() const { return HasStdExtZbr; }
111   bool hasStdExtZbs() const { return HasStdExtZbs; }
112   bool hasStdExtZbt() const { return HasStdExtZbt; }
113   bool hasStdExtZbproposedc() const { return HasStdExtZbproposedc; }
114   bool hasStdExtV() const { return HasStdExtV; }
115   bool is64Bit() const { return HasRV64; }
116   bool isRV32E() const { return IsRV32E; }
117   bool enableLinkerRelax() const { return EnableLinkerRelax; }
118   bool enableRVCHintInstrs() const { return EnableRVCHintInstrs; }
119   bool enableSaveRestore() const { return EnableSaveRestore; }
120   MVT getXLenVT() const { return XLenVT; }
121   unsigned getXLen() const { return XLen; }
122   RISCVABI::ABI getTargetABI() const { return TargetABI; }
123   bool isRegisterReservedByUser(Register i) const {
124     assert(i < RISCV::NUM_TARGET_REGS && "Register out of range");
125     return UserReservedRegister[i];
126   }
127 
128 protected:
129   // GlobalISel related APIs.
130   std::unique_ptr<CallLowering> CallLoweringInfo;
131   std::unique_ptr<InstructionSelector> InstSelector;
132   std::unique_ptr<LegalizerInfo> Legalizer;
133   std::unique_ptr<RegisterBankInfo> RegBankInfo;
134 
135 public:
136   const CallLowering *getCallLowering() const override;
137   InstructionSelector *getInstructionSelector() const override;
138   const LegalizerInfo *getLegalizerInfo() const override;
139   const RegisterBankInfo *getRegBankInfo() const override;
140 };
141 } // End llvm namespace
142 
143 #endif
144