xref: /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVSubtarget.cpp (revision 6966ac055c3b7a39266fb982493330df7a097997)
1 //===-- RISCVSubtarget.cpp - RISCV Subtarget Information ------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the RISCV specific subclass of TargetSubtargetInfo.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "RISCVSubtarget.h"
14 #include "RISCV.h"
15 #include "RISCVFrameLowering.h"
16 #include "llvm/Support/TargetRegistry.h"
17 
18 using namespace llvm;
19 
20 #define DEBUG_TYPE "riscv-subtarget"
21 
22 #define GET_SUBTARGETINFO_TARGET_DESC
23 #define GET_SUBTARGETINFO_CTOR
24 #include "RISCVGenSubtargetInfo.inc"
25 
26 void RISCVSubtarget::anchor() {}
27 
28 RISCVSubtarget &RISCVSubtarget::initializeSubtargetDependencies(
29     const Triple &TT, StringRef CPU, StringRef FS, StringRef ABIName) {
30   // Determine default and user-specified characteristics
31   bool Is64Bit = TT.isArch64Bit();
32   std::string CPUName = CPU;
33   if (CPUName.empty())
34     CPUName = Is64Bit ? "generic-rv64" : "generic-rv32";
35   ParseSubtargetFeatures(CPUName, FS);
36   if (Is64Bit) {
37     XLenVT = MVT::i64;
38     XLen = 64;
39   }
40 
41   TargetABI = RISCVABI::computeTargetABI(TT, getFeatureBits(), ABIName);
42   RISCVFeatures::validate(TT, getFeatureBits());
43   return *this;
44 }
45 
46 RISCVSubtarget::RISCVSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
47                                StringRef ABIName, const TargetMachine &TM)
48     : RISCVGenSubtargetInfo(TT, CPU, FS),
49       FrameLowering(initializeSubtargetDependencies(TT, CPU, FS, ABIName)),
50       InstrInfo(), RegInfo(getHwMode()), TLInfo(TM, *this) {}
51