xref: /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVScheduleV.td (revision ba3c1f5972d7b90feb6e6da47905ff2757e0fe57) 
1//===-- RISCVScheduleV.td - RISCV Scheduling Definitions V -*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9//===----------------------------------------------------------------------===//
10/// Define scheduler resources associated with def operands.
11
12defvar UpperBoundLMUL = "UpperBound";
13defvar SchedMxList = ["UpperBound", "M1", "M2", "M4", "M8", "MF2", "MF4", "MF8"];
14// Used for widening and narrowing instructions as it doesn't contain M8.
15defvar SchedMxListW = ["UpperBound", "MF8", "MF4", "MF2", "M1", "M2", "M4"];
16defvar SchedMxListFW = ["UpperBound", "MF4", "MF2", "M1", "M2", "M4"];
17
18// Creates SchedWrite for each (name, LMUL) pair for LMUL in SchedMxList
19multiclass LMULSchedWrites<string name> {
20  foreach mx = SchedMxList in {
21    def name # "_" # mx : SchedWrite;
22  }
23}
24
25// Creates SchedWrite for each (name, LMUL) pair for LMUL in SchedMxListW
26multiclass LMULSchedWritesW<string name> {
27  foreach mx = SchedMxListW in {
28    def name # "_" # mx : SchedWrite;
29  }
30}
31
32// Creates SchedWrite for each (name, LMUL) pair for LMUL in SchedMxListFW
33multiclass LMULSchedWritesFW<string name> {
34  foreach mx = SchedMxListFW in {
35    def name # "_" # mx : SchedWrite;
36  }
37}
38
39// Creates SchedRead for each (name, LMUL) pair for LMUL in SchedMxList
40multiclass LMULSchedReads<string name> {
41  foreach mx = SchedMxList in {
42    def name # "_" # mx : SchedRead;
43  }
44}
45
46// Creates SchedRead for each (name, LMUL) pair for LMUL in SchedMxListW
47multiclass LMULSchedReadsW<string name> {
48  foreach mx = SchedMxListW in {
49    def name # "_" # mx : SchedRead;
50  }
51}
52
53// Creates SchedRead for each (name, LMUL) pair for LMUL in SchedMxListFW
54multiclass LMULSchedReadsFW<string name> {
55  foreach mx = SchedMxListFW in {
56    def name # "_" # mx : SchedRead;
57  }
58}
59
60// Creates WriteRes for each (name, LMUL, resources) tuple for LMUL
61// in SchedMxList
62multiclass LMULWriteRes<string name, list<ProcResourceKind> resources> {
63  foreach mx = SchedMxList in {
64    def : WriteRes<!cast<SchedWrite>(name # "_" # mx), resources>;
65  }
66}
67
68// Creates WriteRes for each (name, LMUL, resources) tuple for LMUL
69// in SchedMxListW
70multiclass LMULWriteResW<string name, list<ProcResourceKind> resources> {
71  foreach mx = SchedMxListW in {
72    def : WriteRes<!cast<SchedWrite>(name # "_" # mx), resources>;
73  }
74}
75
76// Creates WriteRes for each (name, LMUL, resources) tuple for LMUL
77// in SchedMxListFW
78multiclass LMULWriteResFW<string name, list<ProcResourceKind> resources> {
79  foreach mx = SchedMxListFW in {
80    def : WriteRes<!cast<SchedWrite>(name # "_" # mx), resources>;
81  }
82}
83
84// Creates ReadAdvance for each (name, LMUL, val) tuple for LMUL
85// in SchedMxList
86multiclass LMULReadAdvance<string name, int val, list<SchedWrite> writes = []> {
87  foreach mx = SchedMxList in {
88    def : ReadAdvance<!cast<SchedRead>(name # "_" # mx), val, writes>;
89  }
90}
91
92// Creates ReadAdvance for each (name, LMUL, val) tuple for LMUL
93// in SchedMxListW
94multiclass LMULReadAdvanceW<string name, int val, list<SchedWrite> writes = []> {
95  foreach mx = SchedMxListW in {
96    def : ReadAdvance<!cast<SchedRead>(name # "_" # mx), val, writes>;
97  }
98}
99
100// Creates ReadAdvance for each (name, LMUL, val) tuple for LMUL
101// in SchedMxListFW
102multiclass LMULReadAdvanceFW<string name, int val, list<SchedWrite> writes = []> {
103  foreach mx = SchedMxListFW in {
104    def : ReadAdvance<!cast<SchedRead>(name # "_" # mx), val, writes>;
105  }
106}
107
108// 3.6 Vector Byte Length vlenb
109def WriteRdVLENB      : SchedWrite;
110
111// 6. Configuration-Setting Instructions
112def WriteVSETVLI      : SchedWrite;
113def WriteVSETIVLI     : SchedWrite;
114def WriteVSETVL       : SchedWrite;
115
116// 7. Vector Loads and Stores
117// 7.4. Vector Unit-Stride Instructions
118defm "" : LMULSchedWrites<"WriteVLDE">;
119defm "" : LMULSchedWrites<"WriteVSTE">;
120// 7.4.1. Vector Unit-Strided Mask
121defm "" : LMULSchedWrites<"WriteVLDM">;
122defm "" : LMULSchedWrites<"WriteVSTM">;
123// 7.5. Vector Strided Instructions
124defm "" : LMULSchedWrites<"WriteVLDS8">;
125defm "" : LMULSchedWrites<"WriteVLDS16">;
126defm "" : LMULSchedWrites<"WriteVLDS32">;
127defm "" : LMULSchedWrites<"WriteVLDS64">;
128defm "" : LMULSchedWrites<"WriteVSTS8">;
129defm "" : LMULSchedWrites<"WriteVSTS16">;
130defm "" : LMULSchedWrites<"WriteVSTS32">;
131defm "" : LMULSchedWrites<"WriteVSTS64">;
132// 7.6. Vector Indexed Instructions
133defm "" : LMULSchedWrites<"WriteVLDUX8">;
134defm "" : LMULSchedWrites<"WriteVLDUX16">;
135defm "" : LMULSchedWrites<"WriteVLDUX32">;
136defm "" : LMULSchedWrites<"WriteVLDUX64">;
137defm "" : LMULSchedWrites<"WriteVLDOX8">;
138defm "" : LMULSchedWrites<"WriteVLDOX16">;
139defm "" : LMULSchedWrites<"WriteVLDOX32">;
140defm "" : LMULSchedWrites<"WriteVLDOX64">;
141defm "" : LMULSchedWrites<"WriteVSTUX8">;
142defm "" : LMULSchedWrites<"WriteVSTUX16">;
143defm "" : LMULSchedWrites<"WriteVSTUX32">;
144defm "" : LMULSchedWrites<"WriteVSTUX64">;
145defm "" : LMULSchedWrites<"WriteVSTOX8">;
146defm "" : LMULSchedWrites<"WriteVSTOX16">;
147defm "" : LMULSchedWrites<"WriteVSTOX32">;
148defm "" : LMULSchedWrites<"WriteVSTOX64">;
149// 7.7. Vector Unit-stride Fault-Only-First Loads
150defm "" : LMULSchedWrites<"WriteVLDFF">;
151// 7.8. Vector Segment Instructions
152foreach nf=2-8 in {
153  foreach eew = [8, 16, 32, 64] in {
154    defm "" : LMULSchedWrites<"WriteVLSEG" # nf # e # eew>;
155    defm "" : LMULSchedWrites<"WriteVSSEG" # nf # e # eew>;
156    defm "" : LMULSchedWrites<"WriteVLSEGFF" # nf # e # eew>;
157    defm "" : LMULSchedWrites<"WriteVLSSEG" # nf # e # eew>;
158    defm "" : LMULSchedWrites<"WriteVSSSEG" # nf # e # eew>;
159    defm "" : LMULSchedWrites<"WriteVLUXSEG" # nf # e # eew>;
160    defm "" : LMULSchedWrites<"WriteVLOXSEG" # nf # e # eew>;
161    defm "" : LMULSchedWrites<"WriteVSUXSEG" # nf # e # eew>;
162    defm "" : LMULSchedWrites<"WriteVSOXSEG" # nf # e # eew>;
163  }
164}
165// 7.9. Vector Whole Register Instructions
166def WriteVLD1R        : SchedWrite;
167def WriteVLD2R        : SchedWrite;
168def WriteVLD4R        : SchedWrite;
169def WriteVLD8R        : SchedWrite;
170def WriteVST1R        : SchedWrite;
171def WriteVST2R        : SchedWrite;
172def WriteVST4R        : SchedWrite;
173def WriteVST8R        : SchedWrite;
174
175// 11. Vector Integer Arithmetic Instructions
176// 11.1. Vector Single-Width Integer Add and Subtract
177// 11.5. Vector Bitwise Logical Instructions
178defm "" : LMULSchedWrites<"WriteVIALUV">;
179defm "" : LMULSchedWrites<"WriteVIALUX">;
180defm "" : LMULSchedWrites<"WriteVIALUI">;
181// 11.2. Vector Widening Integer Add/Subtract
182defm "" : LMULSchedWritesW<"WriteVIWALUV">;
183defm "" : LMULSchedWritesW<"WriteVIWALUX">;
184defm "" : LMULSchedWritesW<"WriteVIWALUI">;
185// 11.3. Vector Integer Extension
186defm "" : LMULSchedWrites<"WriteVExtV">;
187// 11.4. Vector Integer Arithmetic with Carry or Borrow Instructions
188defm "" : LMULSchedWrites<"WriteVICALUV">;
189defm "" : LMULSchedWrites<"WriteVICALUX">;
190defm "" : LMULSchedWrites<"WriteVICALUI">;
191// 11.6. Vector Single-Width Bit Shift Instructions
192defm "" : LMULSchedWrites<"WriteVShiftV">;
193defm "" : LMULSchedWrites<"WriteVShiftX">;
194defm "" : LMULSchedWrites<"WriteVShiftI">;
195// 11.7. Vector Narrowing Integer Right Shift Instructions
196defm "" : LMULSchedWritesW<"WriteVNShiftV">;
197defm "" : LMULSchedWritesW<"WriteVNShiftX">;
198defm "" : LMULSchedWritesW<"WriteVNShiftI">;
199// 11.8. Vector Integer Comparison Instructions
200// 11.9. Vector Integer Min/Max Instructions
201defm "" : LMULSchedWrites<"WriteVICmpV">;
202defm "" : LMULSchedWrites<"WriteVICmpX">;
203defm "" : LMULSchedWrites<"WriteVICmpI">;
204// 11.10. Vector Single-Width Integer Multiply Instructions
205defm "" : LMULSchedWrites<"WriteVIMulV">;
206defm "" : LMULSchedWrites<"WriteVIMulX">;
207// 11.11. Vector Integer Divide Instructions
208defm "" : LMULSchedWrites<"WriteVIDivV">;
209defm "" : LMULSchedWrites<"WriteVIDivX">;
210// 11.12. Vector Widening Integer Multiply Instructions
211defm "" : LMULSchedWritesW<"WriteVIWMulV">;
212defm "" : LMULSchedWritesW<"WriteVIWMulX">;
213// 11.13. Vector Single-Width Integer Multiply-Add Instructions
214defm "" : LMULSchedWrites<"WriteVIMulAddV">;
215defm "" : LMULSchedWrites<"WriteVIMulAddX">;
216// 11.14. Vector Widening Integer Multiply-Add Instructions
217defm "" : LMULSchedWritesW<"WriteVIWMulAddV">;
218defm "" : LMULSchedWritesW<"WriteVIWMulAddX">;
219// 11.15. Vector Integer Merge Instructions
220defm "" : LMULSchedWrites<"WriteVIMergeV">;
221defm "" : LMULSchedWrites<"WriteVIMergeX">;
222defm "" : LMULSchedWrites<"WriteVIMergeI">;
223// 11.16. Vector Integer Move Instructions
224defm "" : LMULSchedWrites<"WriteVIMovV">;
225defm "" : LMULSchedWrites<"WriteVIMovX">;
226defm "" : LMULSchedWrites<"WriteVIMovI">;
227
228// 12. Vector Fixed-Point Arithmetic Instructions
229// 12.1. Vector Single-Width Saturating Add and Subtract
230defm "" : LMULSchedWrites<"WriteVSALUV">;
231defm "" : LMULSchedWrites<"WriteVSALUX">;
232defm "" : LMULSchedWrites<"WriteVSALUI">;
233// 12.2. Vector Single-Width Averaging Add and Subtract
234defm "" : LMULSchedWrites<"WriteVAALUV">;
235defm "" : LMULSchedWrites<"WriteVAALUX">;
236// 12.3. Vector Single-Width Fractional Multiply with Rounding and Saturation
237defm "" : LMULSchedWrites<"WriteVSMulV">;
238defm "" : LMULSchedWrites<"WriteVSMulX">;
239// 12.4. Vector Single-Width Scaling Shift Instructions
240defm "" : LMULSchedWrites<"WriteVSShiftV">;
241defm "" : LMULSchedWrites<"WriteVSShiftX">;
242defm "" : LMULSchedWrites<"WriteVSShiftI">;
243// 12.5. Vector Narrowing Fixed-Point Clip Instructions
244defm "" : LMULSchedWritesW<"WriteVNClipV">;
245defm "" : LMULSchedWritesW<"WriteVNClipX">;
246defm "" : LMULSchedWritesW<"WriteVNClipI">;
247
248// 13. Vector Floating-Point Instructions
249// 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions
250defm "" : LMULSchedWrites<"WriteVFALUV">;
251defm "" : LMULSchedWrites<"WriteVFALUF">;
252// 13.3. Vector Widening Floating-Point Add/Subtract Instructions
253defm "" : LMULSchedWritesFW<"WriteVFWALUV">;
254defm "" : LMULSchedWritesFW<"WriteVFWALUF">;
255// 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions
256defm "" : LMULSchedWrites<"WriteVFMulV">;
257defm "" : LMULSchedWrites<"WriteVFMulF">;
258defm "" : LMULSchedWrites<"WriteVFDivV">;
259defm "" : LMULSchedWrites<"WriteVFDivF">;
260// 13.5. Vector Widening Floating-Point Multiply
261defm "" : LMULSchedWritesFW<"WriteVFWMulV">;
262defm "" : LMULSchedWritesFW<"WriteVFWMulF">;
263// 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions
264defm "" : LMULSchedWrites<"WriteVFMulAddV">;
265defm "" : LMULSchedWrites<"WriteVFMulAddF">;
266// 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions
267defm "" : LMULSchedWritesFW<"WriteVFWMulAddV">;
268defm "" : LMULSchedWritesFW<"WriteVFWMulAddF">;
269// 13.8. Vector Floating-Point Square-Root Instruction
270defm "" : LMULSchedWrites<"WriteVFSqrtV">;
271// 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction
272// 13.10. Vector Floating-Point Reciprocal Estimate Instruction
273defm "" : LMULSchedWrites<"WriteVFRecpV">;
274// 13.11. Vector Floating-Point MIN/MAX Instructions
275// 13.13. Vector Floating-Point Compare Instructions
276defm "" : LMULSchedWrites<"WriteVFCmpV">;
277defm "" : LMULSchedWrites<"WriteVFCmpF">;
278// 13.12. Vector Floating-Point Sign-Injection Instructions
279defm "" : LMULSchedWrites<"WriteVFSgnjV">;
280defm "" : LMULSchedWrites<"WriteVFSgnjF">;
281// 13.14. Vector Floating-Point Classify Instruction
282defm "" : LMULSchedWrites<"WriteVFClassV">;
283// 13.15. Vector Floating-Point Merge Instruction
284defm "" : LMULSchedWrites<"WriteVFMergeV">;
285// 13.16. Vector Floating-Point Move Instruction
286defm "" : LMULSchedWrites<"WriteVFMovV">;
287// 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions
288defm "" : LMULSchedWrites<"WriteVFCvtIToFV">;
289defm "" : LMULSchedWrites<"WriteVFCvtFToIV">;
290// 13.18. Widening Floating-Point/Integer Type-Convert Instructions
291defm "" : LMULSchedWritesW<"WriteVFWCvtIToFV">;
292defm "" : LMULSchedWritesFW<"WriteVFWCvtFToIV">;
293defm "" : LMULSchedWritesFW<"WriteVFWCvtFToFV">;
294// 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions
295defm "" : LMULSchedWritesFW<"WriteVFNCvtIToFV">;
296defm "" : LMULSchedWritesW<"WriteVFNCvtFToIV">;
297defm "" : LMULSchedWritesFW<"WriteVFNCvtFToFV">;
298
299// 14. Vector Reduction Operations
300// 14.1. Vector Single-Width Integer Reduction Instructions
301def WriteVIRedV       : SchedWrite;
302// 14.2. Vector Widening Integer Reduction Instructions
303def WriteVIWRedV      : SchedWrite;
304// 14.3. Vector Single-Width Floating-Point Reduction Instructions
305def WriteVFRedV       : SchedWrite;
306def WriteVFRedOV      : SchedWrite;
307// 14.4. Vector Widening Floating-Point Reduction Instructions
308def WriteVFWRedV      : SchedWrite;
309def WriteVFWRedOV     : SchedWrite;
310
311// 15. Vector Mask Instructions
312// 15.1. Vector Mask-Register Logical Instructions
313defm "" : LMULSchedWrites<"WriteVMALUV">;
314// 15.2. Vector Mask Population Count
315defm "" : LMULSchedWrites<"WriteVMPopV">;
316// 15.3. Vector Find-First-Set Mask Bit
317defm "" : LMULSchedWrites<"WriteVMFFSV">;
318// 15.4. Vector Set-Before-First Mask Bit
319// 15.5. Vector Set-Including-First Mask Bit
320// 15.6. Vector Set-only-First Mask Bit
321defm "" : LMULSchedWrites<"WriteVMSFSV">;
322// 15.8. Vector Iota Instruction
323defm "" : LMULSchedWrites<"WriteVMIotV">;
324// 15.9. Vector Element Index Instruction
325defm "" : LMULSchedWrites<"WriteVMIdxV">;
326
327// 16. Vector Permutation Instructions
328// 16.1. Integer Scalar Move Instructions
329defm "" : LMULSchedWrites<"WriteVIMovVX">;
330defm "" : LMULSchedWrites<"WriteVIMovXV">;
331// 16.2. Floating-Point Scalar Move Instructions
332defm "" : LMULSchedWrites<"WriteVFMovVF">;
333defm "" : LMULSchedWrites<"WriteVFMovFV">;
334// 16.3. Vector Slide Instructions
335defm "" : LMULSchedWrites<"WriteVISlideX">;
336defm "" : LMULSchedWrites<"WriteVISlideI">;
337defm "" : LMULSchedWrites<"WriteVISlide1X">;
338defm "" : LMULSchedWrites<"WriteVFSlide1F">;
339// 16.4. Vector Register Gather Instructions
340defm "" : LMULSchedWrites<"WriteVGatherV">;
341defm "" : LMULSchedWrites<"WriteVGatherX">;
342defm "" : LMULSchedWrites<"WriteVGatherI">;
343// 16.5. Vector Compress Instruction
344defm "" : LMULSchedWrites<"WriteVCompressV">;
345// 16.6. Whole Vector Register Move
346// These are already LMUL aware
347def WriteVMov1V       : SchedWrite;
348def WriteVMov2V       : SchedWrite;
349def WriteVMov4V       : SchedWrite;
350def WriteVMov8V       : SchedWrite;
351
352//===----------------------------------------------------------------------===//
353/// Define scheduler resources associated with use operands.
354
355// 6. Configuration-Setting Instructions
356def ReadVSETVLI       : SchedRead;
357def ReadVSETVL        : SchedRead;
358
359// 7. Vector Loads and Stores
360defm "" : LMULSchedReads<"ReadVLDX">;
361defm "" : LMULSchedReads<"ReadVSTX">;
362// 7.4. Vector Unit-Stride Instructions
363defm "" : LMULSchedReads<"ReadVSTEV">;
364// 7.4.1. Vector Unit-Strided Mask
365defm "" : LMULSchedReads<"ReadVSTM">;
366// 7.5. Vector Strided Instructions
367defm "" : LMULSchedReads<"ReadVLDSX">;
368defm "" : LMULSchedReads<"ReadVSTSX">;
369defm "" : LMULSchedReads<"ReadVSTS8V">;
370defm "" : LMULSchedReads<"ReadVSTS16V">;
371defm "" : LMULSchedReads<"ReadVSTS32V">;
372defm "" : LMULSchedReads<"ReadVSTS64V">;
373// 7.6. Vector Indexed Instructions
374defm "" : LMULSchedReads<"ReadVLDUXV">;
375defm "" : LMULSchedReads<"ReadVLDOXV">;
376defm "" : LMULSchedReads<"ReadVSTUX8">;
377defm "" : LMULSchedReads<"ReadVSTUX16">;
378defm "" : LMULSchedReads<"ReadVSTUX32">;
379defm "" : LMULSchedReads<"ReadVSTUX64">;
380defm "" : LMULSchedReads<"ReadVSTUXV">;
381defm "" : LMULSchedReads<"ReadVSTUX8V">;
382defm "" : LMULSchedReads<"ReadVSTUX16V">;
383defm "" : LMULSchedReads<"ReadVSTUX32V">;
384defm "" : LMULSchedReads<"ReadVSTUX64V">;
385defm "" : LMULSchedReads<"ReadVSTOX8">;
386defm "" : LMULSchedReads<"ReadVSTOX16">;
387defm "" : LMULSchedReads<"ReadVSTOX32">;
388defm "" : LMULSchedReads<"ReadVSTOX64">;
389defm "" : LMULSchedReads<"ReadVSTOXV">;
390defm "" : LMULSchedReads<"ReadVSTOX8V">;
391defm "" : LMULSchedReads<"ReadVSTOX16V">;
392defm "" : LMULSchedReads<"ReadVSTOX32V">;
393defm "" : LMULSchedReads<"ReadVSTOX64V">;
394// 7.9. Vector Whole Register Instructions
395// These are already LMUL aware
396def ReadVST1R         : SchedRead;
397def ReadVST2R         : SchedRead;
398def ReadVST4R         : SchedRead;
399def ReadVST8R         : SchedRead;
400
401// 11. Vector Integer Arithmetic Instructions
402// 11.1. Vector Single-Width Integer Add and Subtract
403// 11.5. Vector Bitwise Logical Instructions
404defm "" : LMULSchedReads<"ReadVIALUV">;
405defm "" : LMULSchedReads<"ReadVIALUX">;
406// 11.2. Vector Widening Integer Add/Subtract
407defm "" : LMULSchedReadsW<"ReadVIWALUV">;
408defm "" : LMULSchedReadsW<"ReadVIWALUX">;
409// 11.3. Vector Integer Extension
410defm "" : LMULSchedReads<"ReadVExtV">;
411// 11.4. Vector Integer Arithmetic with Carry or Borrow Instructions
412defm "" : LMULSchedReads<"ReadVICALUV">;
413defm "" : LMULSchedReads<"ReadVICALUX">;
414// 11.6. Vector Single-Width Bit Shift Instructions
415defm "" : LMULSchedReads<"ReadVShiftV">;
416defm "" : LMULSchedReads<"ReadVShiftX">;
417// 11.7. Vector Narrowing Integer Right Shift Instructions
418defm "" : LMULSchedReadsW<"ReadVNShiftV">;
419defm "" : LMULSchedReadsW<"ReadVNShiftX">;
420// 11.8. Vector Integer Comparison Instructions
421// 11.9. Vector Integer Min/Max Instructions
422defm "" : LMULSchedReads<"ReadVICmpV">;
423defm "" : LMULSchedReads<"ReadVICmpX">;
424// 11.10. Vector Single-Width Integer Multiply Instructions
425defm "" : LMULSchedReads<"ReadVIMulV">;
426defm "" : LMULSchedReads<"ReadVIMulX">;
427// 11.11. Vector Integer Divide Instructions
428defm "" : LMULSchedReads<"ReadVIDivV">;
429defm "" : LMULSchedReads<"ReadVIDivX">;
430// 11.12. Vector Widening Integer Multiply Instructions
431defm "" : LMULSchedReadsW<"ReadVIWMulV">;
432defm "" : LMULSchedReadsW<"ReadVIWMulX">;
433// 11.13. Vector Single-Width Integer Multiply-Add Instructions
434defm "" : LMULSchedReads<"ReadVIMulAddV">;
435defm "" : LMULSchedReads<"ReadVIMulAddX">;
436// 11.14. Vector Widening Integer Multiply-Add Instructions
437defm "" : LMULSchedReadsW<"ReadVIWMulAddV">;
438defm "" : LMULSchedReadsW<"ReadVIWMulAddX">;
439// 11.15. Vector Integer Merge Instructions
440defm "" : LMULSchedReads<"ReadVIMergeV">;
441defm "" : LMULSchedReads<"ReadVIMergeX">;
442// 11.16. Vector Integer Move Instructions
443defm "" : LMULSchedReads<"ReadVIMovV">;
444defm "" : LMULSchedReads<"ReadVIMovX">;
445
446// 12. Vector Fixed-Point Arithmetic Instructions
447// 12.1. Vector Single-Width Saturating Add and Subtract
448defm "" : LMULSchedReads<"ReadVSALUV">;
449defm "" : LMULSchedReads<"ReadVSALUX">;
450// 12.2. Vector Single-Width Averaging Add and Subtract
451defm "" : LMULSchedReads<"ReadVAALUV">;
452defm "" : LMULSchedReads<"ReadVAALUX">;
453// 12.3. Vector Single-Width Fractional Multiply with Rounding and Saturation
454defm "" : LMULSchedReads<"ReadVSMulV">;
455defm "" : LMULSchedReads<"ReadVSMulX">;
456// 12.4. Vector Single-Width Scaling Shift Instructions
457defm "" : LMULSchedReads<"ReadVSShiftV">;
458defm "" : LMULSchedReads<"ReadVSShiftX">;
459// 12.5. Vector Narrowing Fixed-Point Clip Instructions
460defm "" : LMULSchedReadsW<"ReadVNClipV">;
461defm "" : LMULSchedReadsW<"ReadVNClipX">;
462
463// 13. Vector Floating-Point Instructions
464// 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions
465defm "" : LMULSchedReads<"ReadVFALUV">;
466defm "" : LMULSchedReads<"ReadVFALUF">;
467// 13.3. Vector Widening Floating-Point Add/Subtract Instructions
468defm "" : LMULSchedReadsFW<"ReadVFWALUV">;
469defm "" : LMULSchedReadsFW<"ReadVFWALUF">;
470// 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions
471defm "" : LMULSchedReads<"ReadVFMulV">;
472defm "" : LMULSchedReads<"ReadVFMulF">;
473defm "" : LMULSchedReads<"ReadVFDivV">;
474defm "" : LMULSchedReads<"ReadVFDivF">;
475// 13.5. Vector Widening Floating-Point Multiply
476defm "" : LMULSchedReadsFW<"ReadVFWMulV">;
477defm "" : LMULSchedReadsFW<"ReadVFWMulF">;
478// 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions
479defm "" : LMULSchedReads<"ReadVFMulAddV">;
480defm "" : LMULSchedReads<"ReadVFMulAddF">;
481// 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions
482defm "" : LMULSchedReadsFW<"ReadVFWMulAddV">;
483defm "" : LMULSchedReadsFW<"ReadVFWMulAddF">;
484// 13.8. Vector Floating-Point Square-Root Instruction
485defm "" : LMULSchedReads<"ReadVFSqrtV">;
486// 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction
487// 13.10. Vector Floating-Point Reciprocal Estimate Instruction
488defm "" : LMULSchedReads<"ReadVFRecpV">;
489// 13.11. Vector Floating-Point MIN/MAX Instructions
490// 13.13. Vector Floating-Point Compare Instructions
491defm "" : LMULSchedReads<"ReadVFCmpV">;
492defm "" : LMULSchedReads<"ReadVFCmpF">;
493// 13.12. Vector Floating-Point Sign-Injection Instructions
494defm "" : LMULSchedReads<"ReadVFSgnjV">;
495defm "" : LMULSchedReads<"ReadVFSgnjF">;
496// 13.14. Vector Floating-Point Classify Instruction
497defm "" : LMULSchedReads<"ReadVFClassV">;
498// 13.15. Vector Floating-Point Merge Instruction
499defm "" : LMULSchedReads<"ReadVFMergeV">;
500defm "" : LMULSchedReads<"ReadVFMergeF">;
501// 13.16. Vector Floating-Point Move Instruction
502defm "" : LMULSchedReads<"ReadVFMovF">;
503// 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions
504defm "" : LMULSchedReads<"ReadVFCvtIToFV">;
505defm "" : LMULSchedReads<"ReadVFCvtFToIV">;
506// 13.18. Widening Floating-Point/Integer Type-Convert Instructions
507defm "" : LMULSchedReadsW<"ReadVFWCvtIToFV">;
508defm "" : LMULSchedReadsFW<"ReadVFWCvtFToIV">;
509defm "" : LMULSchedReadsFW<"ReadVFWCvtFToFV">;
510// 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions
511defm "" : LMULSchedReadsFW<"ReadVFNCvtIToFV">;
512defm "" : LMULSchedReadsW<"ReadVFNCvtFToIV">;
513defm "" : LMULSchedReadsFW<"ReadVFNCvtFToFV">;
514
515// 14. Vector Reduction Operations
516// 14.1. Vector Single-Width Integer Reduction Instructions
517def ReadVIRedV        : SchedRead;
518def ReadVIRedV0       : SchedRead;
519// 14.2. Vector Widening Integer Reduction Instructions
520def ReadVIWRedV       : SchedRead;
521def ReadVIWRedV0      : SchedRead;
522// 14.3. Vector Single-Width Floating-Point Reduction Instructions
523def ReadVFRedV        : SchedRead;
524def ReadVFRedV0       : SchedRead;
525def ReadVFRedOV       : SchedRead;
526def ReadVFRedOV0      : SchedRead;
527// 14.4. Vector Widening Floating-Point Reduction Instructions
528def ReadVFWRedV       : SchedRead;
529def ReadVFWRedV0      : SchedRead;
530def ReadVFWRedOV      : SchedRead;
531def ReadVFWRedOV0     : SchedRead;
532
533// 15. Vector Mask Instructions
534// 15.1. Vector Mask-Register Logical Instructions
535defm "" : LMULSchedReads<"ReadVMALUV">;
536// 15.2. Vector Mask Population Count
537defm "" : LMULSchedReads<"ReadVMPopV">;
538// 15.3. Vector Find-First-Set Mask Bit
539defm "" : LMULSchedReads<"ReadVMFFSV">;
540// 15.4. Vector Set-Before-First Mask Bit
541// 15.5. Vector Set-Including-First Mask Bit
542// 15.6. Vector Set-only-First Mask Bit
543defm "" : LMULSchedReads<"ReadVMSFSV">;
544// 15.8. Vector Iota Instruction
545defm "" : LMULSchedReads<"ReadVMIotV">;
546
547// 16. Vector Permutation Instructions
548// 16.1. Integer Scalar Move Instructions
549defm "" : LMULSchedReads<"ReadVIMovVX">;
550defm "" : LMULSchedReads<"ReadVIMovXV">;
551defm "" : LMULSchedReads<"ReadVIMovXX">;
552// 16.2. Floating-Point Scalar Move Instructions
553defm "" : LMULSchedReads<"ReadVFMovVF">;
554defm "" : LMULSchedReads<"ReadVFMovFV">;
555defm "" : LMULSchedReads<"ReadVFMovFX">;
556// 16.3. Vector Slide Instructions
557defm "" : LMULSchedReads<"ReadVISlideV">;
558defm "" : LMULSchedReads<"ReadVISlideX">;
559defm "" : LMULSchedReads<"ReadVFSlideV">;
560defm "" : LMULSchedReads<"ReadVFSlideF">;
561// 16.4. Vector Register Gather Instructions
562defm "" : LMULSchedReads<"ReadVGatherV">;
563defm "" : LMULSchedReads<"ReadVGatherX">;
564// 16.5. Vector Compress Instruction
565defm "" : LMULSchedReads<"ReadVCompressV">;
566// 16.6. Whole Vector Register Move
567// These are already LMUL aware
568def ReadVMov1V        : SchedRead;
569def ReadVMov2V        : SchedRead;
570def ReadVMov4V        : SchedRead;
571def ReadVMov8V        : SchedRead;
572
573// Others
574def ReadVMask         : SchedRead;
575
576//===----------------------------------------------------------------------===//
577/// Define default scheduler resources for V.
578
579multiclass UnsupportedSchedV {
580let Unsupported = true in {
581
582// 3.6 Vector Byte Length vlenb
583def : WriteRes<WriteRdVLENB, []>;
584
585// 6. Configuration-Setting Instructions
586def : WriteRes<WriteVSETVLI, []>;
587def : WriteRes<WriteVSETIVLI, []>;
588def : WriteRes<WriteVSETVL, []>;
589
590// 7. Vector Loads and Stores
591defm "" : LMULWriteRes<"WriteVLDE", []>;
592defm "" : LMULWriteRes<"WriteVSTE", []>;
593defm "" : LMULWriteRes<"WriteVLDM", []>;
594defm "" : LMULWriteRes<"WriteVSTM", []>;
595defm "" : LMULWriteRes<"WriteVLDS8", []>;
596defm "" : LMULWriteRes<"WriteVLDS16", []>;
597defm "" : LMULWriteRes<"WriteVLDS32", []>;
598defm "" : LMULWriteRes<"WriteVLDS64", []>;
599defm "" : LMULWriteRes<"WriteVSTS8", []>;
600defm "" : LMULWriteRes<"WriteVSTS16", []>;
601defm "" : LMULWriteRes<"WriteVSTS32", []>;
602defm "" : LMULWriteRes<"WriteVSTS64", []>;
603defm "" : LMULWriteRes<"WriteVLDUX8", []>;
604defm "" : LMULWriteRes<"WriteVLDUX16", []>;
605defm "" : LMULWriteRes<"WriteVLDUX32", []>;
606defm "" : LMULWriteRes<"WriteVLDUX64", []>;
607defm "" : LMULWriteRes<"WriteVLDOX8", []>;
608defm "" : LMULWriteRes<"WriteVLDOX16", []>;
609defm "" : LMULWriteRes<"WriteVLDOX32", []>;
610defm "" : LMULWriteRes<"WriteVLDOX64", []>;
611defm "" : LMULWriteRes<"WriteVSTUX8", []>;
612defm "" : LMULWriteRes<"WriteVSTUX16", []>;
613defm "" : LMULWriteRes<"WriteVSTUX32", []>;
614defm "" : LMULWriteRes<"WriteVSTUX64", []>;
615defm "" : LMULWriteRes<"WriteVSTOX8", []>;
616defm "" : LMULWriteRes<"WriteVSTOX16", []>;
617defm "" : LMULWriteRes<"WriteVSTOX32", []>;
618defm "" : LMULWriteRes<"WriteVSTOX64", []>;
619defm "" : LMULWriteRes<"WriteVLDFF", []>;
620// These are already LMUL aware
621def : WriteRes<WriteVLD1R, []>;
622def : WriteRes<WriteVLD2R, []>;
623def : WriteRes<WriteVLD4R, []>;
624def : WriteRes<WriteVLD8R, []>;
625def : WriteRes<WriteVST1R, []>;
626def : WriteRes<WriteVST2R, []>;
627def : WriteRes<WriteVST4R, []>;
628def : WriteRes<WriteVST8R, []>;
629// Vector Segment Loads and Stores
630foreach nf=2-8 in {
631  foreach eew = [8, 16, 32, 64] in {
632    defm "" : LMULWriteRes <"WriteVLSEG" # nf # "e" # eew, []>;
633    defm "" : LMULWriteRes <"WriteVLSEGFF" # nf # "e" # eew, []>;
634    defm "" : LMULWriteRes <"WriteVSSEG" # nf # "e" # eew, []>;
635    defm "" : LMULWriteRes <"WriteVLSSEG" # nf # "e" # eew, []>;
636    defm "" : LMULWriteRes <"WriteVSSSEG" # nf # "e" # eew, []>;
637    defm "" : LMULWriteRes <"WriteVLUXSEG" # nf # "e" # eew, []>;
638    defm "" : LMULWriteRes <"WriteVLOXSEG" # nf # "e" # eew, []>;
639    defm "" : LMULWriteRes <"WriteVSUXSEG" # nf # "e" # eew, []>;
640    defm "" : LMULWriteRes <"WriteVSOXSEG" # nf # "e" # eew, []>;
641  }
642}
643
644// 11. Vector Integer Arithmetic Instructions
645defm "" : LMULWriteRes<"WriteVIALUV", []>;
646defm "" : LMULWriteRes<"WriteVIALUX", []>;
647defm "" : LMULWriteRes<"WriteVIALUI", []>;
648defm "" : LMULWriteResW<"WriteVIWALUV", []>;
649defm "" : LMULWriteResW<"WriteVIWALUX", []>;
650defm "" : LMULWriteResW<"WriteVIWALUI", []>;
651defm "" : LMULWriteRes<"WriteVExtV", []>;
652defm "" : LMULWriteRes<"WriteVICALUV", []>;
653defm "" : LMULWriteRes<"WriteVICALUX", []>;
654defm "" : LMULWriteRes<"WriteVICALUI", []>;
655defm "" : LMULWriteRes<"WriteVShiftV", []>;
656defm "" : LMULWriteRes<"WriteVShiftX", []>;
657defm "" : LMULWriteRes<"WriteVShiftI", []>;
658defm "" : LMULWriteResW<"WriteVNShiftV", []>;
659defm "" : LMULWriteResW<"WriteVNShiftX", []>;
660defm "" : LMULWriteResW<"WriteVNShiftI", []>;
661defm "" : LMULWriteRes<"WriteVICmpV", []>;
662defm "" : LMULWriteRes<"WriteVICmpX", []>;
663defm "" : LMULWriteRes<"WriteVICmpI", []>;
664defm "" : LMULWriteRes<"WriteVIMulV", []>;
665defm "" : LMULWriteRes<"WriteVIMulX", []>;
666defm "" : LMULWriteRes<"WriteVIDivV", []>;
667defm "" : LMULWriteRes<"WriteVIDivX", []>;
668defm "" : LMULWriteResW<"WriteVIWMulV", []>;
669defm "" : LMULWriteResW<"WriteVIWMulX", []>;
670defm "" : LMULWriteRes<"WriteVIMulAddV", []>;
671defm "" : LMULWriteRes<"WriteVIMulAddX", []>;
672defm "" : LMULWriteResW<"WriteVIWMulAddV", []>;
673defm "" : LMULWriteResW<"WriteVIWMulAddX", []>;
674defm "" : LMULWriteRes<"WriteVIMergeV", []>;
675defm "" : LMULWriteRes<"WriteVIMergeX", []>;
676defm "" : LMULWriteRes<"WriteVIMergeI", []>;
677defm "" : LMULWriteRes<"WriteVIMovV", []>;
678defm "" : LMULWriteRes<"WriteVIMovX", []>;
679defm "" : LMULWriteRes<"WriteVIMovI", []>;
680
681// 12. Vector Fixed-Point Arithmetic Instructions
682defm "" : LMULWriteRes<"WriteVSALUV", []>;
683defm "" : LMULWriteRes<"WriteVSALUX", []>;
684defm "" : LMULWriteRes<"WriteVSALUI", []>;
685defm "" : LMULWriteRes<"WriteVAALUV", []>;
686defm "" : LMULWriteRes<"WriteVAALUX", []>;
687defm "" : LMULWriteRes<"WriteVSMulV", []>;
688defm "" : LMULWriteRes<"WriteVSMulX", []>;
689defm "" : LMULWriteRes<"WriteVSShiftV", []>;
690defm "" : LMULWriteRes<"WriteVSShiftX", []>;
691defm "" : LMULWriteRes<"WriteVSShiftI", []>;
692defm "" : LMULWriteResW<"WriteVNClipV", []>;
693defm "" : LMULWriteResW<"WriteVNClipX", []>;
694defm "" : LMULWriteResW<"WriteVNClipI", []>;
695
696// 13. Vector Floating-Point Instructions
697defm "" : LMULWriteRes<"WriteVFALUV", []>;
698defm "" : LMULWriteRes<"WriteVFALUF", []>;
699defm "" : LMULWriteResFW<"WriteVFWALUV", []>;
700defm "" : LMULWriteResFW<"WriteVFWALUF", []>;
701defm "" : LMULWriteRes<"WriteVFMulV", []>;
702defm "" : LMULWriteRes<"WriteVFMulF", []>;
703defm "" : LMULWriteRes<"WriteVFDivV", []>;
704defm "" : LMULWriteRes<"WriteVFDivF", []>;
705defm "" : LMULWriteResFW<"WriteVFWMulV", []>;
706defm "" : LMULWriteResFW<"WriteVFWMulF", []>;
707defm "" : LMULWriteRes<"WriteVFMulAddV", []>;
708defm "" : LMULWriteRes<"WriteVFMulAddF", []>;
709defm "" : LMULWriteResFW<"WriteVFWMulAddV", []>;
710defm "" : LMULWriteResFW<"WriteVFWMulAddF", []>;
711defm "" : LMULWriteRes<"WriteVFSqrtV", []>;
712defm "" : LMULWriteRes<"WriteVFRecpV", []>;
713defm "" : LMULWriteRes<"WriteVFCmpV", []>;
714defm "" : LMULWriteRes<"WriteVFCmpF", []>;
715defm "" : LMULWriteRes<"WriteVFSgnjV", []>;
716defm "" : LMULWriteRes<"WriteVFSgnjF", []>;
717defm "" : LMULWriteRes<"WriteVFClassV", []>;
718defm "" : LMULWriteRes<"WriteVFMergeV", []>;
719defm "" : LMULWriteRes<"WriteVFMovV", []>;
720defm "" : LMULWriteRes<"WriteVFCvtIToFV", []>;
721defm "" : LMULWriteRes<"WriteVFCvtFToIV", []>;
722defm "" : LMULWriteResW<"WriteVFWCvtIToFV", []>;
723defm "" : LMULWriteResFW<"WriteVFWCvtFToIV", []>;
724defm "" : LMULWriteResFW<"WriteVFWCvtFToFV", []>;
725defm "" : LMULWriteResFW<"WriteVFNCvtIToFV", []>;
726defm "" : LMULWriteResW<"WriteVFNCvtFToIV", []>;
727defm "" : LMULWriteResFW<"WriteVFNCvtFToFV", []>;
728
729// 14. Vector Reduction Operations
730def : WriteRes<WriteVIRedV, []>;
731def : WriteRes<WriteVIWRedV, []>;
732def : WriteRes<WriteVFRedV, []>;
733def : WriteRes<WriteVFRedOV, []>;
734def : WriteRes<WriteVFWRedV, []>;
735def : WriteRes<WriteVFWRedOV, []>;
736
737// 15. Vector Mask Instructions
738defm "" : LMULWriteRes<"WriteVMALUV", []>;
739defm "" : LMULWriteRes<"WriteVMPopV", []>;
740defm "" : LMULWriteRes<"WriteVMFFSV", []>;
741defm "" : LMULWriteRes<"WriteVMSFSV", []>;
742defm "" : LMULWriteRes<"WriteVMIotV", []>;
743defm "" : LMULWriteRes<"WriteVMIdxV", []>;
744
745// 16. Vector Permutation Instructions
746defm "" : LMULWriteRes<"WriteVIMovVX", []>;
747defm "" : LMULWriteRes<"WriteVIMovXV", []>;
748defm "" : LMULWriteRes<"WriteVFMovVF", []>;
749defm "" : LMULWriteRes<"WriteVFMovFV", []>;
750defm "" : LMULWriteRes<"WriteVISlideX", []>;
751defm "" : LMULWriteRes<"WriteVISlideI", []>;
752defm "" : LMULWriteRes<"WriteVISlide1X", []>;
753defm "" : LMULWriteRes<"WriteVFSlide1F", []>;
754defm "" : LMULWriteRes<"WriteVGatherV", []>;
755defm "" : LMULWriteRes<"WriteVGatherX", []>;
756defm "" : LMULWriteRes<"WriteVGatherI", []>;
757defm "" : LMULWriteRes<"WriteVCompressV", []>;
758// These are already LMUL aware
759def : WriteRes<WriteVMov1V, []>;
760def : WriteRes<WriteVMov2V, []>;
761def : WriteRes<WriteVMov4V, []>;
762def : WriteRes<WriteVMov8V, []>;
763
764// 6. Configuration-Setting Instructions
765def : ReadAdvance<ReadVSETVLI, 0>;
766def : ReadAdvance<ReadVSETVL, 0>;
767
768// 7. Vector Loads and Stores
769defm "" : LMULReadAdvance<"ReadVLDX", 0>;
770defm "" : LMULReadAdvance<"ReadVSTX", 0>;
771defm "" : LMULReadAdvance<"ReadVSTEV", 0>;
772defm "" : LMULReadAdvance<"ReadVSTM", 0>;
773defm "" : LMULReadAdvance<"ReadVLDSX", 0>;
774defm "" : LMULReadAdvance<"ReadVSTSX", 0>;
775defm "" : LMULReadAdvance<"ReadVSTS8V", 0>;
776defm "" : LMULReadAdvance<"ReadVSTS16V", 0>;
777defm "" : LMULReadAdvance<"ReadVSTS32V", 0>;
778defm "" : LMULReadAdvance<"ReadVSTS64V", 0>;
779defm "" : LMULReadAdvance<"ReadVLDUXV", 0>;
780defm "" : LMULReadAdvance<"ReadVLDOXV", 0>;
781defm "" : LMULReadAdvance<"ReadVSTUXV", 0>;
782defm "" : LMULReadAdvance<"ReadVSTUX8", 0>;
783defm "" : LMULReadAdvance<"ReadVSTUX16", 0>;
784defm "" : LMULReadAdvance<"ReadVSTUX32", 0>;
785defm "" : LMULReadAdvance<"ReadVSTUX64", 0>;
786defm "" : LMULReadAdvance<"ReadVSTUX8V", 0>;
787defm "" : LMULReadAdvance<"ReadVSTUX16V", 0>;
788defm "" : LMULReadAdvance<"ReadVSTUX32V", 0>;
789defm "" : LMULReadAdvance<"ReadVSTUX64V", 0>;
790defm "" : LMULReadAdvance<"ReadVSTOX8", 0>;
791defm "" : LMULReadAdvance<"ReadVSTOX16", 0>;
792defm "" : LMULReadAdvance<"ReadVSTOX32", 0>;
793defm "" : LMULReadAdvance<"ReadVSTOX64", 0>;
794defm "" : LMULReadAdvance<"ReadVSTOXV", 0>;
795defm "" : LMULReadAdvance<"ReadVSTOX8V", 0>;
796defm "" : LMULReadAdvance<"ReadVSTOX16V", 0>;
797defm "" : LMULReadAdvance<"ReadVSTOX32V", 0>;
798defm "" : LMULReadAdvance<"ReadVSTOX64V", 0>;
799// These are already LMUL aware
800def : ReadAdvance<ReadVST1R, 0>;
801def : ReadAdvance<ReadVST2R, 0>;
802def : ReadAdvance<ReadVST4R, 0>;
803def : ReadAdvance<ReadVST8R, 0>;
804
805// 11. Vector Integer Arithmetic Instructions
806defm "" : LMULReadAdvance<"ReadVIALUV", 0>;
807defm "" : LMULReadAdvance<"ReadVIALUX", 0>;
808defm "" : LMULReadAdvanceW<"ReadVIWALUV", 0>;
809defm "" : LMULReadAdvanceW<"ReadVIWALUX", 0>;
810defm "" : LMULReadAdvance<"ReadVExtV", 0>;
811defm "" : LMULReadAdvance<"ReadVICALUV", 0>;
812defm "" : LMULReadAdvance<"ReadVICALUX", 0>;
813defm "" : LMULReadAdvance<"ReadVShiftV", 0>;
814defm "" : LMULReadAdvance<"ReadVShiftX", 0>;
815defm "" : LMULReadAdvanceW<"ReadVNShiftV", 0>;
816defm "" : LMULReadAdvanceW<"ReadVNShiftX", 0>;
817defm "" : LMULReadAdvance<"ReadVICmpV", 0>;
818defm "" : LMULReadAdvance<"ReadVICmpX", 0>;
819defm "" : LMULReadAdvance<"ReadVIMulV", 0>;
820defm "" : LMULReadAdvance<"ReadVIMulX", 0>;
821defm "" : LMULReadAdvance<"ReadVIDivV", 0>;
822defm "" : LMULReadAdvance<"ReadVIDivX", 0>;
823defm "" : LMULReadAdvanceW<"ReadVIWMulV", 0>;
824defm "" : LMULReadAdvanceW<"ReadVIWMulX", 0>;
825defm "" : LMULReadAdvance<"ReadVIMulAddV", 0>;
826defm "" : LMULReadAdvance<"ReadVIMulAddX", 0>;
827defm "" : LMULReadAdvanceW<"ReadVIWMulAddV", 0>;
828defm "" : LMULReadAdvanceW<"ReadVIWMulAddX", 0>;
829defm "" : LMULReadAdvance<"ReadVIMergeV", 0>;
830defm "" : LMULReadAdvance<"ReadVIMergeX", 0>;
831defm "" : LMULReadAdvance<"ReadVIMovV", 0>;
832defm "" : LMULReadAdvance<"ReadVIMovX", 0>;
833
834// 12. Vector Fixed-Point Arithmetic Instructions
835defm "" : LMULReadAdvance<"ReadVSALUV", 0>;
836defm "" : LMULReadAdvance<"ReadVSALUX", 0>;
837defm "" : LMULReadAdvance<"ReadVAALUV", 0>;
838defm "" : LMULReadAdvance<"ReadVAALUX", 0>;
839defm "" : LMULReadAdvance<"ReadVSMulV", 0>;
840defm "" : LMULReadAdvance<"ReadVSMulX", 0>;
841defm "" : LMULReadAdvance<"ReadVSShiftV", 0>;
842defm "" : LMULReadAdvance<"ReadVSShiftX", 0>;
843defm "" : LMULReadAdvanceW<"ReadVNClipV", 0>;
844defm "" : LMULReadAdvanceW<"ReadVNClipX", 0>;
845
846// 13. Vector Floating-Point Instructions
847defm "" : LMULReadAdvance<"ReadVFALUV", 0>;
848defm "" : LMULReadAdvance<"ReadVFALUF", 0>;
849defm "" : LMULReadAdvanceFW<"ReadVFWALUV", 0>;
850defm "" : LMULReadAdvanceFW<"ReadVFWALUF", 0>;
851defm "" : LMULReadAdvance<"ReadVFMulV", 0>;
852defm "" : LMULReadAdvance<"ReadVFMulF", 0>;
853defm "" : LMULReadAdvance<"ReadVFDivV", 0>;
854defm "" : LMULReadAdvance<"ReadVFDivF", 0>;
855defm "" : LMULReadAdvanceFW<"ReadVFWMulV", 0>;
856defm "" : LMULReadAdvanceFW<"ReadVFWMulF", 0>;
857defm "" : LMULReadAdvance<"ReadVFMulAddV", 0>;
858defm "" : LMULReadAdvance<"ReadVFMulAddF", 0>;
859defm "" : LMULReadAdvanceFW<"ReadVFWMulAddV", 0>;
860defm "" : LMULReadAdvanceFW<"ReadVFWMulAddF", 0>;
861defm "" : LMULReadAdvance<"ReadVFSqrtV", 0>;
862defm "" : LMULReadAdvance<"ReadVFRecpV", 0>;
863defm "" : LMULReadAdvance<"ReadVFCmpV", 0>;
864defm "" : LMULReadAdvance<"ReadVFCmpF", 0>;
865defm "" : LMULReadAdvance<"ReadVFSgnjV", 0>;
866defm "" : LMULReadAdvance<"ReadVFSgnjF", 0>;
867defm "" : LMULReadAdvance<"ReadVFClassV", 0>;
868defm "" : LMULReadAdvance<"ReadVFMergeV", 0>;
869defm "" : LMULReadAdvance<"ReadVFMergeF", 0>;
870defm "" : LMULReadAdvance<"ReadVFMovF", 0>;
871defm "" : LMULReadAdvance<"ReadVFCvtIToFV", 0>;
872defm "" : LMULReadAdvance<"ReadVFCvtFToIV", 0>;
873defm "" : LMULReadAdvanceW<"ReadVFWCvtIToFV", 0>;
874defm "" : LMULReadAdvanceFW<"ReadVFWCvtFToIV", 0>;
875defm "" : LMULReadAdvanceFW<"ReadVFWCvtFToFV", 0>;
876defm "" : LMULReadAdvanceFW<"ReadVFNCvtIToFV", 0>;
877defm "" : LMULReadAdvanceW<"ReadVFNCvtFToIV", 0>;
878defm "" : LMULReadAdvanceFW<"ReadVFNCvtFToFV", 0>;
879
880// 14. Vector Reduction Operations
881def : ReadAdvance<ReadVIRedV, 0>;
882def : ReadAdvance<ReadVIRedV0, 0>;
883def : ReadAdvance<ReadVIWRedV, 0>;
884def : ReadAdvance<ReadVIWRedV0, 0>;
885def : ReadAdvance<ReadVFRedV, 0>;
886def : ReadAdvance<ReadVFRedV0, 0>;
887def : ReadAdvance<ReadVFRedOV, 0>;
888def : ReadAdvance<ReadVFRedOV0, 0>;
889def : ReadAdvance<ReadVFWRedV, 0>;
890def : ReadAdvance<ReadVFWRedV0, 0>;
891def : ReadAdvance<ReadVFWRedOV, 0>;
892def : ReadAdvance<ReadVFWRedOV0, 0>;
893
894// 15. Vector Mask Instructions
895defm "" : LMULReadAdvance<"ReadVMALUV", 0>;
896defm "" : LMULReadAdvance<"ReadVMPopV", 0>;
897defm "" : LMULReadAdvance<"ReadVMFFSV", 0>;
898defm "" : LMULReadAdvance<"ReadVMSFSV", 0>;
899defm "" : LMULReadAdvance<"ReadVMIotV", 0>;
900
901// 16. Vector Permutation Instructions
902defm "" : LMULReadAdvance<"ReadVIMovVX", 0>;
903defm "" : LMULReadAdvance<"ReadVIMovXV", 0>;
904defm "" : LMULReadAdvance<"ReadVIMovXX", 0>;
905defm "" : LMULReadAdvance<"ReadVFMovVF", 0>;
906defm "" : LMULReadAdvance<"ReadVFMovFV", 0>;
907defm "" : LMULReadAdvance<"ReadVFMovFX", 0>;
908defm "" : LMULReadAdvance<"ReadVISlideV", 0>;
909defm "" : LMULReadAdvance<"ReadVISlideX", 0>;
910defm "" : LMULReadAdvance<"ReadVFSlideV", 0>;
911defm "" : LMULReadAdvance<"ReadVFSlideF", 0>;
912defm "" : LMULReadAdvance<"ReadVGatherV", 0>;
913defm "" : LMULReadAdvance<"ReadVGatherX", 0>;
914defm "" : LMULReadAdvance<"ReadVCompressV", 0>;
915// These are already LMUL aware
916def : ReadAdvance<ReadVMov1V, 0>;
917def : ReadAdvance<ReadVMov2V, 0>;
918def : ReadAdvance<ReadVMov4V, 0>;
919def : ReadAdvance<ReadVMov8V, 0>;
920
921// Others
922def : ReadAdvance<ReadVMask, 0>;
923
924} // Unsupported
925} // UnsupportedSchedV
926