xref: /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVScheduleV.td (revision 924226fba12cc9a228c73b956e1b7fa24c60b055)
1//===-- RISCVScheduleV.td - RISCV Scheduling Definitions V -*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9//===----------------------------------------------------------------------===//
10/// Define scheduler resources associated with def operands.
11
12// 7. Vector Loads and Stores
13// 7.4. Vector Unit-Stride Instructions
14def WriteVLDE8        : SchedWrite;
15def WriteVLDE16       : SchedWrite;
16def WriteVLDE32       : SchedWrite;
17def WriteVLDE64       : SchedWrite;
18def WriteVSTE8        : SchedWrite;
19def WriteVSTE16       : SchedWrite;
20def WriteVSTE32       : SchedWrite;
21def WriteVSTE64       : SchedWrite;
22// 7.4.1. Vector Unit-Strided Mask
23def WriteVLDM         : SchedWrite;
24def WriteVSTM         : SchedWrite;
25// 7.5. Vector Strided Instructions
26def WriteVLDS8        : SchedWrite;
27def WriteVLDS16       : SchedWrite;
28def WriteVLDS32       : SchedWrite;
29def WriteVLDS64       : SchedWrite;
30def WriteVSTS8        : SchedWrite;
31def WriteVSTS16       : SchedWrite;
32def WriteVSTS32       : SchedWrite;
33def WriteVSTS64       : SchedWrite;
34// 7.6. Vector Indexed Instructions
35def WriteVLDUX8       : SchedWrite;
36def WriteVLDUX16      : SchedWrite;
37def WriteVLDUX32      : SchedWrite;
38def WriteVLDUX64      : SchedWrite;
39def WriteVLDOX8       : SchedWrite;
40def WriteVLDOX16      : SchedWrite;
41def WriteVLDOX32      : SchedWrite;
42def WriteVLDOX64      : SchedWrite;
43def WriteVSTUX8       : SchedWrite;
44def WriteVSTUX16      : SchedWrite;
45def WriteVSTUX32      : SchedWrite;
46def WriteVSTUX64      : SchedWrite;
47def WriteVSTOX8       : SchedWrite;
48def WriteVSTOX16      : SchedWrite;
49def WriteVSTOX32      : SchedWrite;
50def WriteVSTOX64      : SchedWrite;
51// 7.7. Vector Unit-stride Fault-Only-First Loads
52def WriteVLDFF8       : SchedWrite;
53def WriteVLDFF16      : SchedWrite;
54def WriteVLDFF32      : SchedWrite;
55def WriteVLDFF64      : SchedWrite;
56// 7.9. Vector Whole Register Instructions
57def WriteVLD1R8       : SchedWrite;
58def WriteVLD1R16      : SchedWrite;
59def WriteVLD1R32      : SchedWrite;
60def WriteVLD1R64      : SchedWrite;
61def WriteVLD2R8       : SchedWrite;
62def WriteVLD2R16      : SchedWrite;
63def WriteVLD2R32      : SchedWrite;
64def WriteVLD2R64      : SchedWrite;
65def WriteVLD4R8       : SchedWrite;
66def WriteVLD4R16      : SchedWrite;
67def WriteVLD4R32      : SchedWrite;
68def WriteVLD4R64      : SchedWrite;
69def WriteVLD8R8       : SchedWrite;
70def WriteVLD8R16      : SchedWrite;
71def WriteVLD8R32      : SchedWrite;
72def WriteVLD8R64      : SchedWrite;
73def WriteVST1R        : SchedWrite;
74def WriteVST2R        : SchedWrite;
75def WriteVST4R        : SchedWrite;
76def WriteVST8R        : SchedWrite;
77
78// 11. Vector Integer Arithmetic Instructions
79// 11.1. Vector Single-Width Integer Add and Subtract
80// 11.5. Vector Bitwise Logical Instructions
81def WriteVIALUV       : SchedWrite;
82def WriteVIALUX       : SchedWrite;
83def WriteVIALUI       : SchedWrite;
84// 11.2. Vector Widening Integer Add/Subtract
85def WriteVIWALUV      : SchedWrite;
86def WriteVIWALUX      : SchedWrite;
87def WriteVIWALUI      : SchedWrite;
88// 11.3. Vector Integer Extension
89def WriteVExtV        : SchedWrite;
90// 11.4. Vector Integer Arithmetic with Carry or Borrow Instructions
91def WriteVICALUV      : SchedWrite;
92def WriteVICALUX      : SchedWrite;
93def WriteVICALUI      : SchedWrite;
94// 11.6. Vector Single-Width Bit Shift Instructions
95def WriteVShiftV      : SchedWrite;
96def WriteVShiftX      : SchedWrite;
97def WriteVShiftI      : SchedWrite;
98// 11.7. Vector Narrowing Integer Right Shift Instructions
99def WriteVNShiftV     : SchedWrite;
100def WriteVNShiftX     : SchedWrite;
101def WriteVNShiftI     : SchedWrite;
102// 11.8. Vector Integer Comparison Instructions
103// 11.9. Vector Integer Min/Max Instructions
104def WriteVICmpV       : SchedWrite;
105def WriteVICmpX       : SchedWrite;
106def WriteVICmpI       : SchedWrite;
107// 11.10. Vector Single-Width Integer Multiply Instructions
108def WriteVIMulV       : SchedWrite;
109def WriteVIMulX       : SchedWrite;
110// 11.11. Vector Integer Divide Instructions
111def WriteVIDivV       : SchedWrite;
112def WriteVIDivX       : SchedWrite;
113// 11.12. Vector Widening Integer Multiply Instructions
114def WriteVIWMulV      : SchedWrite;
115def WriteVIWMulX      : SchedWrite;
116// 11.13. Vector Single-Width Integer Multiply-Add Instructions
117def WriteVIMulAddV    : SchedWrite;
118def WriteVIMulAddX    : SchedWrite;
119// 11.14. Vector Widening Integer Multiply-Add Instructions
120def WriteVIWMulAddV   : SchedWrite;
121def WriteVIWMulAddX   : SchedWrite;
122// 11.15. Vector Integer Merge Instructions
123def WriteVIMergeV     : SchedWrite;
124def WriteVIMergeX     : SchedWrite;
125def WriteVIMergeI     : SchedWrite;
126// 11.16. Vector Integer Move Instructions
127def WriteVIMovV       : SchedWrite;
128def WriteVIMovX       : SchedWrite;
129def WriteVIMovI       : SchedWrite;
130
131// 12. Vector Fixed-Point Arithmetic Instructions
132// 12.1. Vector Single-Width Saturating Add and Subtract
133def WriteVSALUV       : SchedWrite;
134def WriteVSALUX       : SchedWrite;
135def WriteVSALUI       : SchedWrite;
136// 12.2. Vector Single-Width Averaging Add and Subtract
137def WriteVAALUV       : SchedWrite;
138def WriteVAALUX       : SchedWrite;
139// 12.3. Vector Single-Width Fractional Multiply with Rounding and Saturation
140def WriteVSMulV       : SchedWrite;
141def WriteVSMulX       : SchedWrite;
142// 12.4. Vector Single-Width Scaling Shift Instructions
143def WriteVSShiftV     : SchedWrite;
144def WriteVSShiftX     : SchedWrite;
145def WriteVSShiftI     : SchedWrite;
146// 12.5. Vector Narrowing Fixed-Point Clip Instructions
147def WriteVNClipV      : SchedWrite;
148def WriteVNClipX      : SchedWrite;
149def WriteVNClipI      : SchedWrite;
150
151// 13. Vector Floating-Point Instructions
152// 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions
153def WriteVFALUV       : SchedWrite;
154def WriteVFALUF       : SchedWrite;
155// 13.3. Vector Widening Floating-Point Add/Subtract Instructions
156def WriteVFWALUV      : SchedWrite;
157def WriteVFWALUF      : SchedWrite;
158// 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions
159def WriteVFMulV       : SchedWrite;
160def WriteVFMulF       : SchedWrite;
161def WriteVFDivV       : SchedWrite;
162def WriteVFDivF       : SchedWrite;
163// 13.5. Vector Widening Floating-Point Multiply
164def WriteVFWMulV      : SchedWrite;
165def WriteVFWMulF      : SchedWrite;
166// 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions
167def WriteVFMulAddV    : SchedWrite;
168def WriteVFMulAddF    : SchedWrite;
169// 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions
170def WriteVFWMulAddV   : SchedWrite;
171def WriteVFWMulAddF   : SchedWrite;
172// 13.8. Vector Floating-Point Square-Root Instruction
173def WriteVFSqrtV      : SchedWrite;
174// 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction
175// 13.10. Vector Floating-Point Reciprocal Estimate Instruction
176def WriteVFRecpV      : SchedWrite;
177// 13.11. Vector Floating-Point MIN/MAX Instructions
178// 13.13. Vector Floating-Point Compare Instructions
179def WriteVFCmpV       : SchedWrite;
180def WriteVFCmpF       : SchedWrite;
181// 13.12. Vector Floating-Point Sign-Injection Instructions
182def WriteVFSgnjV      : SchedWrite;
183def WriteVFSgnjF      : SchedWrite;
184// 13.14. Vector Floating-Point Classify Instruction
185def WriteVFClassV     : SchedWrite;
186// 13.15. Vector Floating-Point Merge Instruction
187def WriteVFMergeV     : SchedWrite;
188// 13.16. Vector Floating-Point Move Instruction
189def WriteVFMovV       : SchedWrite;
190// 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions
191def WriteVFCvtIToFV   : SchedWrite;
192def WriteVFCvtFToIV   : SchedWrite;
193def WriteVFCvtFToFV   : SchedWrite;
194// 13.18. Widening Floating-Point/Integer Type-Convert Instructions
195def WriteVFWCvtIToFV  : SchedWrite;
196def WriteVFWCvtFToIV  : SchedWrite;
197def WriteVFWCvtFToFV  : SchedWrite;
198// 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions
199def WriteVFNCvtIToFV  : SchedWrite;
200def WriteVFNCvtFToIV  : SchedWrite;
201def WriteVFNCvtFToFV  : SchedWrite;
202
203// 14. Vector Reduction Operations
204// 14.1. Vector Single-Width Integer Reduction Instructions
205def WriteVIRedV       : SchedWrite;
206// 14.2. Vector Widening Integer Reduction Instructions
207def WriteVIWRedV      : SchedWrite;
208// 14.3. Vector Single-Width Floating-Point Reduction Instructions
209def WriteVFRedV       : SchedWrite;
210def WriteVFRedOV      : SchedWrite;
211// 14.4. Vector Widening Floating-Point Reduction Instructions
212def WriteVFWRedV      : SchedWrite;
213def WriteVFWRedOV     : SchedWrite;
214
215// 15. Vector Mask Instructions
216// 15.1. Vector Mask-Register Logical Instructions
217def WriteVMALUV       : SchedWrite;
218// 15.2. Vector Mask Population Count
219def WriteVMPopV       : SchedWrite;
220// 15.3. Vector Find-First-Set Mask Bit
221def WriteVMFFSV       : SchedWrite;
222// 15.4. Vector Set-Before-First Mask Bit
223// 15.5. Vector Set-Including-First Mask Bit
224// 15.6. Vector Set-only-First Mask Bit
225def WriteVMSFSV       : SchedWrite;
226// 15.8. Vector Iota Instruction
227def WriteVMIotV       : SchedWrite;
228// 15.9. Vector Element Index Instruction
229def WriteVMIdxV       : SchedWrite;
230
231// 16. Vector Permutation Instructions
232// 16.1. Integer Scalar Move Instructions
233def WriteVIMovVX      : SchedWrite;
234def WriteVIMovXV      : SchedWrite;
235// 16.2. Floating-Point Scalar Move Instructions
236def WriteVFMovVF      : SchedWrite;
237def WriteVFMovFV      : SchedWrite;
238// 16.3. Vector Slide Instructions
239def WriteVISlideX     : SchedWrite;
240def WriteVISlideI     : SchedWrite;
241def WriteVISlide1X    : SchedWrite;
242def WriteVFSlide1F    : SchedWrite;
243// 16.4. Vector Register Gather Instructions
244def WriteVGatherV     : SchedWrite;
245def WriteVGatherX     : SchedWrite;
246def WriteVGatherI     : SchedWrite;
247// 16.5. Vector Compress Instruction
248def WriteVCompressV   : SchedWrite;
249// 16.6. Whole Vector Register Move
250def WriteVMov1V       : SchedWrite;
251def WriteVMov2V       : SchedWrite;
252def WriteVMov4V       : SchedWrite;
253def WriteVMov8V       : SchedWrite;
254
255//===----------------------------------------------------------------------===//
256/// Define scheduler resources associated with use operands.
257
258// 7. Vector Loads and Stores
259def ReadVLDX          : SchedRead;
260def ReadVSTX          : SchedRead;
261// 7.4. Vector Unit-Stride Instructions
262def ReadVSTE8V        : SchedRead;
263def ReadVSTE16V       : SchedRead;
264def ReadVSTE32V       : SchedRead;
265def ReadVSTE64V       : SchedRead;
266// 7.4.1. Vector Unit-Strided Mask
267def ReadVSTM          : SchedRead;
268// 7.5. Vector Strided Instructions
269def ReadVLDSX         : SchedRead;
270def ReadVSTSX         : SchedRead;
271def ReadVSTS8V        : SchedRead;
272def ReadVSTS16V       : SchedRead;
273def ReadVSTS32V       : SchedRead;
274def ReadVSTS64V       : SchedRead;
275// 7.6. Vector Indexed Instructions
276def ReadVLDUXV        : SchedRead;
277def ReadVLDOXV        : SchedRead;
278def ReadVSTUX8        : SchedRead;
279def ReadVSTUX16       : SchedRead;
280def ReadVSTUX32       : SchedRead;
281def ReadVSTUX64       : SchedRead;
282def ReadVSTUXV        : SchedRead;
283def ReadVSTUX8V       : SchedRead;
284def ReadVSTUX16V      : SchedRead;
285def ReadVSTUX32V      : SchedRead;
286def ReadVSTUX64V      : SchedRead;
287def ReadVSTOX8        : SchedRead;
288def ReadVSTOX16       : SchedRead;
289def ReadVSTOX32       : SchedRead;
290def ReadVSTOX64       : SchedRead;
291def ReadVSTOXV        : SchedRead;
292def ReadVSTOX8V       : SchedRead;
293def ReadVSTOX16V      : SchedRead;
294def ReadVSTOX32V      : SchedRead;
295def ReadVSTOX64V      : SchedRead;
296// 7.9. Vector Whole Register Instructions
297def ReadVST1R         : SchedRead;
298def ReadVST2R         : SchedRead;
299def ReadVST4R         : SchedRead;
300def ReadVST8R         : SchedRead;
301
302// 11. Vector Integer Arithmetic Instructions
303// 11.1. Vector Single-Width Integer Add and Subtract
304// 11.5. Vector Bitwise Logical Instructions
305def ReadVIALUV        : SchedRead;
306def ReadVIALUX        : SchedRead;
307// 11.2. Vector Widening Integer Add/Subtract
308def ReadVIWALUV       : SchedRead;
309def ReadVIWALUX       : SchedRead;
310// 11.3. Vector Integer Extension
311def ReadVExtV         : SchedRead;
312// 11.4. Vector Integer Arithmetic with Carry or Borrow Instructions
313def ReadVIALUCV       : SchedRead;
314def ReadVIALUCX       : SchedRead;
315// 11.6. Vector Single-Width Bit Shift Instructions
316def ReadVShiftV       : SchedRead;
317def ReadVShiftX       : SchedRead;
318// 11.7. Vector Narrowing Integer Right Shift Instructions
319def ReadVNShiftV      : SchedRead;
320def ReadVNShiftX      : SchedRead;
321// 11.8. Vector Integer Comparison Instructions
322// 11.9. Vector Integer Min/Max Instructions
323def ReadVICmpV        : SchedRead;
324def ReadVICmpX        : SchedRead;
325// 11.10. Vector Single-Width Integer Multiply Instructions
326def ReadVIMulV        : SchedRead;
327def ReadVIMulX        : SchedRead;
328// 11.11. Vector Integer Divide Instructions
329def ReadVIDivV        : SchedRead;
330def ReadVIDivX        : SchedRead;
331// 11.12. Vector Widening Integer Multiply Instructions
332def ReadVIWMulV       : SchedRead;
333def ReadVIWMulX       : SchedRead;
334// 11.13. Vector Single-Width Integer Multiply-Add Instructions
335def ReadVIMulAddV     : SchedRead;
336def ReadVIMulAddX     : SchedRead;
337// 11.14. Vector Widening Integer Multiply-Add Instructions
338def ReadVIWMulAddV    : SchedRead;
339def ReadVIWMulAddX    : SchedRead;
340// 11.15. Vector Integer Merge Instructions
341def ReadVIMergeV      : SchedRead;
342def ReadVIMergeX      : SchedRead;
343// 11.16. Vector Integer Move Instructions
344def ReadVIMovV        : SchedRead;
345def ReadVIMovX        : SchedRead;
346
347// 12. Vector Fixed-Point Arithmetic Instructions
348// 12.1. Vector Single-Width Saturating Add and Subtract
349def ReadVSALUV        : SchedRead;
350def ReadVSALUX        : SchedRead;
351// 12.2. Vector Single-Width Averaging Add and Subtract
352def ReadVAALUV        : SchedRead;
353def ReadVAALUX        : SchedRead;
354// 12.3. Vector Single-Width Fractional Multiply with Rounding and Saturation
355def ReadVSMulV        : SchedRead;
356def ReadVSMulX        : SchedRead;
357// 12.4. Vector Single-Width Scaling Shift Instructions
358def ReadVSShiftV      : SchedRead;
359def ReadVSShiftX      : SchedRead;
360// 12.5. Vector Narrowing Fixed-Point Clip Instructions
361def ReadVNClipV       : SchedRead;
362def ReadVNClipX       : SchedRead;
363
364// 13. Vector Floating-Point Instructions
365// 13.2. Vector Single-Width Floating-Point Add/Subtract Instructions
366def ReadVFALUV        : SchedRead;
367def ReadVFALUF        : SchedRead;
368// 13.3. Vector Widening Floating-Point Add/Subtract Instructions
369def ReadVFWALUV       : SchedRead;
370def ReadVFWALUF       : SchedRead;
371// 13.4. Vector Single-Width Floating-Point Multiply/Divide Instructions
372def ReadVFMulV        : SchedRead;
373def ReadVFMulF        : SchedRead;
374def ReadVFDivV        : SchedRead;
375def ReadVFDivF        : SchedRead;
376// 13.5. Vector Widening Floating-Point Multiply
377def ReadVFWMulV       : SchedRead;
378def ReadVFWMulF       : SchedRead;
379// 13.6. Vector Single-Width Floating-Point Fused Multiply-Add Instructions
380def ReadVFMulAddV     : SchedRead;
381def ReadVFMulAddF     : SchedRead;
382// 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions
383def ReadVFWMulAddV    : SchedRead;
384def ReadVFWMulAddF    : SchedRead;
385// 13.8. Vector Floating-Point Square-Root Instruction
386def ReadVFSqrtV       : SchedRead;
387// 13.9. Vector Floating-Point Reciprocal Square-Root Estimate Instruction
388// 13.10. Vector Floating-Point Reciprocal Estimate Instruction
389def ReadVFRecpV       : SchedRead;
390// 13.11. Vector Floating-Point MIN/MAX Instructions
391// 13.13. Vector Floating-Point Compare Instructions
392def ReadVFCmpV        : SchedRead;
393def ReadVFCmpF        : SchedRead;
394// 13.12. Vector Floating-Point Sign-Injection Instructions
395def ReadVFSgnjV       : SchedRead;
396def ReadVFSgnjF       : SchedRead;
397// 13.14. Vector Floating-Point Classify Instruction
398def ReadVFClassV      : SchedRead;
399// 13.15. Vector Floating-Point Merge Instruction
400def ReadVFMergeV      : SchedRead;
401def ReadVFMergeF      : SchedRead;
402// 13.16. Vector Floating-Point Move Instruction
403def ReadVFMovF        : SchedRead;
404// 13.17. Single-Width Floating-Point/Integer Type-Convert Instructions
405def ReadVFCvtIToFV    : SchedRead;
406def ReadVFCvtFToIV    : SchedRead;
407// 13.18. Widening Floating-Point/Integer Type-Convert Instructions
408def ReadVFWCvtIToFV   : SchedRead;
409def ReadVFWCvtFToIV   : SchedRead;
410def ReadVFWCvtFToFV   : SchedRead;
411// 13.19. Narrowing Floating-Point/Integer Type-Convert Instructions
412def ReadVFNCvtIToFV   : SchedRead;
413def ReadVFNCvtFToIV   : SchedRead;
414def ReadVFNCvtFToFV   : SchedRead;
415
416// 14. Vector Reduction Operations
417// 14.1. Vector Single-Width Integer Reduction Instructions
418def ReadVIRedV        : SchedRead;
419def ReadVIRedV0       : SchedRead;
420// 14.2. Vector Widening Integer Reduction Instructions
421def ReadVIWRedV       : SchedRead;
422def ReadVIWRedV0      : SchedRead;
423// 14.3. Vector Single-Width Floating-Point Reduction Instructions
424def ReadVFRedV        : SchedRead;
425def ReadVFRedV0       : SchedRead;
426def ReadVFRedOV       : SchedRead;
427def ReadVFRedOV0      : SchedRead;
428// 14.4. Vector Widening Floating-Point Reduction Instructions
429def ReadVFWRedV       : SchedRead;
430def ReadVFWRedV0      : SchedRead;
431def ReadVFWRedOV      : SchedRead;
432def ReadVFWRedOV0     : SchedRead;
433
434// 15. Vector Mask Instructions
435// 15.1. Vector Mask-Register Logical Instructions
436def ReadVMALUV        : SchedRead;
437// 15.2. Vector Mask Population Count
438def ReadVMPopV        : SchedRead;
439// 15.3. Vector Find-First-Set Mask Bit
440def ReadVMFFSV        : SchedRead;
441// 15.4. Vector Set-Before-First Mask Bit
442// 15.5. Vector Set-Including-First Mask Bit
443// 15.6. Vector Set-only-First Mask Bit
444def ReadVMSFSV        : SchedRead;
445// 15.8. Vector Iota Instruction
446def ReadVMIotV        : SchedRead;
447
448// 16. Vector Permutation Instructions
449// 16.1. Integer Scalar Move Instructions
450def ReadVIMovVX       : SchedRead;
451def ReadVIMovXV       : SchedRead;
452def ReadVIMovXX       : SchedRead;
453// 16.2. Floating-Point Scalar Move Instructions
454def ReadVFMovVF       : SchedRead;
455def ReadVFMovFV       : SchedRead;
456def ReadVFMovFX       : SchedRead;
457// 16.3. Vector Slide Instructions
458def ReadVISlideV      : SchedRead;
459def ReadVISlideX      : SchedRead;
460def ReadVFSlideV      : SchedRead;
461def ReadVFSlideF      : SchedRead;
462// 16.4. Vector Register Gather Instructions
463def ReadVGatherV      : SchedRead;
464def ReadVGatherX      : SchedRead;
465// 16.5. Vector Compress Instruction
466def ReadVCompressV    : SchedRead;
467// 16.6. Whole Vector Register Move
468def ReadVMov1V        : SchedRead;
469def ReadVMov2V        : SchedRead;
470def ReadVMov4V        : SchedRead;
471def ReadVMov8V        : SchedRead;
472
473// Others
474def ReadVMask         : SchedRead;
475
476//===----------------------------------------------------------------------===//
477/// Define default scheduler resources for V.
478
479multiclass UnsupportedSchedV {
480let Unsupported = true in {
481
482// 7. Vector Loads and Stores
483def : WriteRes<WriteVLDE8, []>;
484def : WriteRes<WriteVLDE16, []>;
485def : WriteRes<WriteVLDE32, []>;
486def : WriteRes<WriteVLDE64, []>;
487def : WriteRes<WriteVSTE8, []>;
488def : WriteRes<WriteVSTE16, []>;
489def : WriteRes<WriteVSTE32, []>;
490def : WriteRes<WriteVSTE64, []>;
491def : WriteRes<WriteVLDM, []>;
492def : WriteRes<WriteVSTM, []>;
493def : WriteRes<WriteVLDS8, []>;
494def : WriteRes<WriteVLDS16, []>;
495def : WriteRes<WriteVLDS32, []>;
496def : WriteRes<WriteVLDS64, []>;
497def : WriteRes<WriteVSTS8, []>;
498def : WriteRes<WriteVSTS16, []>;
499def : WriteRes<WriteVSTS32, []>;
500def : WriteRes<WriteVSTS64, []>;
501def : WriteRes<WriteVLDUX8, []>;
502def : WriteRes<WriteVLDUX16, []>;
503def : WriteRes<WriteVLDUX32, []>;
504def : WriteRes<WriteVLDUX64, []>;
505def : WriteRes<WriteVLDOX8, []>;
506def : WriteRes<WriteVLDOX16, []>;
507def : WriteRes<WriteVLDOX32, []>;
508def : WriteRes<WriteVLDOX64, []>;
509def : WriteRes<WriteVSTUX8, []>;
510def : WriteRes<WriteVSTUX16, []>;
511def : WriteRes<WriteVSTUX32, []>;
512def : WriteRes<WriteVSTUX64, []>;
513def : WriteRes<WriteVSTOX8, []>;
514def : WriteRes<WriteVSTOX16, []>;
515def : WriteRes<WriteVSTOX32, []>;
516def : WriteRes<WriteVSTOX64, []>;
517def : WriteRes<WriteVLDFF8, []>;
518def : WriteRes<WriteVLDFF16, []>;
519def : WriteRes<WriteVLDFF32, []>;
520def : WriteRes<WriteVLDFF64, []>;
521def : WriteRes<WriteVLD1R8, []>;
522def : WriteRes<WriteVLD1R16, []>;
523def : WriteRes<WriteVLD1R32, []>;
524def : WriteRes<WriteVLD1R64, []>;
525def : WriteRes<WriteVLD2R8, []>;
526def : WriteRes<WriteVLD2R16, []>;
527def : WriteRes<WriteVLD2R32, []>;
528def : WriteRes<WriteVLD2R64, []>;
529def : WriteRes<WriteVLD4R8, []>;
530def : WriteRes<WriteVLD4R16, []>;
531def : WriteRes<WriteVLD4R32, []>;
532def : WriteRes<WriteVLD4R64, []>;
533def : WriteRes<WriteVLD8R8, []>;
534def : WriteRes<WriteVLD8R16, []>;
535def : WriteRes<WriteVLD8R32, []>;
536def : WriteRes<WriteVLD8R64, []>;
537def : WriteRes<WriteVST1R, []>;
538def : WriteRes<WriteVST2R, []>;
539def : WriteRes<WriteVST4R, []>;
540def : WriteRes<WriteVST8R, []>;
541
542// 12. Vector Integer Arithmetic Instructions
543def : WriteRes<WriteVIALUV, []>;
544def : WriteRes<WriteVIALUX, []>;
545def : WriteRes<WriteVIALUI, []>;
546def : WriteRes<WriteVIWALUV, []>;
547def : WriteRes<WriteVIWALUX, []>;
548def : WriteRes<WriteVIWALUI, []>;
549def : WriteRes<WriteVExtV, []>;
550def : WriteRes<WriteVICALUV, []>;
551def : WriteRes<WriteVICALUX, []>;
552def : WriteRes<WriteVICALUI, []>;
553def : WriteRes<WriteVShiftV, []>;
554def : WriteRes<WriteVShiftX, []>;
555def : WriteRes<WriteVShiftI, []>;
556def : WriteRes<WriteVNShiftV, []>;
557def : WriteRes<WriteVNShiftX, []>;
558def : WriteRes<WriteVNShiftI, []>;
559def : WriteRes<WriteVICmpV, []>;
560def : WriteRes<WriteVICmpX, []>;
561def : WriteRes<WriteVICmpI, []>;
562def : WriteRes<WriteVIMulV, []>;
563def : WriteRes<WriteVIMulX, []>;
564def : WriteRes<WriteVIDivV, []>;
565def : WriteRes<WriteVIDivX, []>;
566def : WriteRes<WriteVIWMulV, []>;
567def : WriteRes<WriteVIWMulX, []>;
568def : WriteRes<WriteVIMulAddV, []>;
569def : WriteRes<WriteVIMulAddX, []>;
570def : WriteRes<WriteVIWMulAddV, []>;
571def : WriteRes<WriteVIWMulAddX, []>;
572def : WriteRes<WriteVIMergeV, []>;
573def : WriteRes<WriteVIMergeX, []>;
574def : WriteRes<WriteVIMergeI, []>;
575def : WriteRes<WriteVIMovV, []>;
576def : WriteRes<WriteVIMovX, []>;
577def : WriteRes<WriteVIMovI, []>;
578
579// 13. Vector Fixed-Point Arithmetic Instructions
580def : WriteRes<WriteVSALUV, []>;
581def : WriteRes<WriteVSALUX, []>;
582def : WriteRes<WriteVSALUI, []>;
583def : WriteRes<WriteVAALUV, []>;
584def : WriteRes<WriteVAALUX, []>;
585def : WriteRes<WriteVSMulV, []>;
586def : WriteRes<WriteVSMulX, []>;
587def : WriteRes<WriteVSShiftV, []>;
588def : WriteRes<WriteVSShiftX, []>;
589def : WriteRes<WriteVSShiftI, []>;
590def : WriteRes<WriteVNClipV, []>;
591def : WriteRes<WriteVNClipX, []>;
592def : WriteRes<WriteVNClipI, []>;
593
594// 14. Vector Floating-Point Instructions
595def : WriteRes<WriteVFALUV, []>;
596def : WriteRes<WriteVFALUF, []>;
597def : WriteRes<WriteVFWALUV, []>;
598def : WriteRes<WriteVFWALUF, []>;
599def : WriteRes<WriteVFMulV, []>;
600def : WriteRes<WriteVFMulF, []>;
601def : WriteRes<WriteVFDivV, []>;
602def : WriteRes<WriteVFDivF, []>;
603def : WriteRes<WriteVFWMulV, []>;
604def : WriteRes<WriteVFWMulF, []>;
605def : WriteRes<WriteVFMulAddV, []>;
606def : WriteRes<WriteVFMulAddF, []>;
607def : WriteRes<WriteVFWMulAddV, []>;
608def : WriteRes<WriteVFWMulAddF, []>;
609def : WriteRes<WriteVFSqrtV, []>;
610def : WriteRes<WriteVFRecpV, []>;
611def : WriteRes<WriteVFCmpV, []>;
612def : WriteRes<WriteVFCmpF, []>;
613def : WriteRes<WriteVFSgnjV, []>;
614def : WriteRes<WriteVFSgnjF, []>;
615def : WriteRes<WriteVFClassV, []>;
616def : WriteRes<WriteVFMergeV, []>;
617def : WriteRes<WriteVFMovV, []>;
618def : WriteRes<WriteVFCvtIToFV, []>;
619def : WriteRes<WriteVFCvtFToIV, []>;
620def : WriteRes<WriteVFCvtFToFV, []>;
621def : WriteRes<WriteVFWCvtIToFV, []>;
622def : WriteRes<WriteVFWCvtFToIV, []>;
623def : WriteRes<WriteVFWCvtFToFV, []>;
624def : WriteRes<WriteVFNCvtIToFV, []>;
625def : WriteRes<WriteVFNCvtFToIV, []>;
626def : WriteRes<WriteVFNCvtFToFV, []>;
627
628// 15. Vector Reduction Operations
629def : WriteRes<WriteVIRedV, []>;
630def : WriteRes<WriteVIWRedV, []>;
631def : WriteRes<WriteVFRedV, []>;
632def : WriteRes<WriteVFRedOV, []>;
633def : WriteRes<WriteVFWRedV, []>;
634def : WriteRes<WriteVFWRedOV, []>;
635
636// 16. Vector Mask Instructions
637def : WriteRes<WriteVMALUV, []>;
638def : WriteRes<WriteVMPopV, []>;
639def : WriteRes<WriteVMFFSV, []>;
640def : WriteRes<WriteVMSFSV, []>;
641def : WriteRes<WriteVMIotV, []>;
642def : WriteRes<WriteVMIdxV, []>;
643
644// 17. Vector Permutation Instructions
645def : WriteRes<WriteVIMovVX, []>;
646def : WriteRes<WriteVIMovXV, []>;
647def : WriteRes<WriteVFMovVF, []>;
648def : WriteRes<WriteVFMovFV, []>;
649def : WriteRes<WriteVISlideX, []>;
650def : WriteRes<WriteVISlideI, []>;
651def : WriteRes<WriteVISlide1X, []>;
652def : WriteRes<WriteVFSlide1F, []>;
653def : WriteRes<WriteVGatherV, []>;
654def : WriteRes<WriteVGatherX, []>;
655def : WriteRes<WriteVGatherI, []>;
656def : WriteRes<WriteVCompressV, []>;
657def : WriteRes<WriteVMov1V, []>;
658def : WriteRes<WriteVMov2V, []>;
659def : WriteRes<WriteVMov4V, []>;
660def : WriteRes<WriteVMov8V, []>;
661
662// 7. Vector Loads and Stores
663def : ReadAdvance<ReadVLDX, 0>;
664def : ReadAdvance<ReadVSTX, 0>;
665def : ReadAdvance<ReadVSTE8V, 0>;
666def : ReadAdvance<ReadVSTE16V, 0>;
667def : ReadAdvance<ReadVSTE32V, 0>;
668def : ReadAdvance<ReadVSTE64V, 0>;
669def : ReadAdvance<ReadVSTM, 0>;
670def : ReadAdvance<ReadVLDSX, 0>;
671def : ReadAdvance<ReadVSTSX, 0>;
672def : ReadAdvance<ReadVSTS8V, 0>;
673def : ReadAdvance<ReadVSTS16V, 0>;
674def : ReadAdvance<ReadVSTS32V, 0>;
675def : ReadAdvance<ReadVSTS64V, 0>;
676def : ReadAdvance<ReadVLDUXV, 0>;
677def : ReadAdvance<ReadVLDOXV, 0>;
678def : ReadAdvance<ReadVSTUXV, 0>;
679def : ReadAdvance<ReadVSTUX8, 0>;
680def : ReadAdvance<ReadVSTUX16, 0>;
681def : ReadAdvance<ReadVSTUX32, 0>;
682def : ReadAdvance<ReadVSTUX64, 0>;
683def : ReadAdvance<ReadVSTUX8V, 0>;
684def : ReadAdvance<ReadVSTUX16V, 0>;
685def : ReadAdvance<ReadVSTUX32V, 0>;
686def : ReadAdvance<ReadVSTUX64V, 0>;
687def : ReadAdvance<ReadVSTOX8, 0>;
688def : ReadAdvance<ReadVSTOX16, 0>;
689def : ReadAdvance<ReadVSTOX32, 0>;
690def : ReadAdvance<ReadVSTOX64, 0>;
691def : ReadAdvance<ReadVSTOXV, 0>;
692def : ReadAdvance<ReadVSTOX8V, 0>;
693def : ReadAdvance<ReadVSTOX16V, 0>;
694def : ReadAdvance<ReadVSTOX32V, 0>;
695def : ReadAdvance<ReadVSTOX64V, 0>;
696def : ReadAdvance<ReadVST1R, 0>;
697def : ReadAdvance<ReadVST2R, 0>;
698def : ReadAdvance<ReadVST4R, 0>;
699def : ReadAdvance<ReadVST8R, 0>;
700
701// 12. Vector Integer Arithmetic Instructions
702def : ReadAdvance<ReadVIALUV, 0>;
703def : ReadAdvance<ReadVIALUX, 0>;
704def : ReadAdvance<ReadVIWALUV, 0>;
705def : ReadAdvance<ReadVIWALUX, 0>;
706def : ReadAdvance<ReadVExtV, 0>;
707def : ReadAdvance<ReadVIALUCV, 0>;
708def : ReadAdvance<ReadVIALUCX, 0>;
709def : ReadAdvance<ReadVShiftV, 0>;
710def : ReadAdvance<ReadVShiftX, 0>;
711def : ReadAdvance<ReadVNShiftV, 0>;
712def : ReadAdvance<ReadVNShiftX, 0>;
713def : ReadAdvance<ReadVICmpV, 0>;
714def : ReadAdvance<ReadVICmpX, 0>;
715def : ReadAdvance<ReadVIMulV, 0>;
716def : ReadAdvance<ReadVIMulX, 0>;
717def : ReadAdvance<ReadVIDivV, 0>;
718def : ReadAdvance<ReadVIDivX, 0>;
719def : ReadAdvance<ReadVIWMulV, 0>;
720def : ReadAdvance<ReadVIWMulX, 0>;
721def : ReadAdvance<ReadVIMulAddV, 0>;
722def : ReadAdvance<ReadVIMulAddX, 0>;
723def : ReadAdvance<ReadVIWMulAddV, 0>;
724def : ReadAdvance<ReadVIWMulAddX, 0>;
725def : ReadAdvance<ReadVIMergeV, 0>;
726def : ReadAdvance<ReadVIMergeX, 0>;
727def : ReadAdvance<ReadVIMovV, 0>;
728def : ReadAdvance<ReadVIMovX, 0>;
729
730// 13. Vector Fixed-Point Arithmetic Instructions
731def : ReadAdvance<ReadVSALUV, 0>;
732def : ReadAdvance<ReadVSALUX, 0>;
733def : ReadAdvance<ReadVAALUV, 0>;
734def : ReadAdvance<ReadVAALUX, 0>;
735def : ReadAdvance<ReadVSMulV, 0>;
736def : ReadAdvance<ReadVSMulX, 0>;
737def : ReadAdvance<ReadVSShiftV, 0>;
738def : ReadAdvance<ReadVSShiftX, 0>;
739def : ReadAdvance<ReadVNClipV, 0>;
740def : ReadAdvance<ReadVNClipX, 0>;
741
742// 14. Vector Floating-Point Instructions
743def : ReadAdvance<ReadVFALUV, 0>;
744def : ReadAdvance<ReadVFALUF, 0>;
745def : ReadAdvance<ReadVFWALUV, 0>;
746def : ReadAdvance<ReadVFWALUF, 0>;
747def : ReadAdvance<ReadVFMulV, 0>;
748def : ReadAdvance<ReadVFMulF, 0>;
749def : ReadAdvance<ReadVFDivV, 0>;
750def : ReadAdvance<ReadVFDivF, 0>;
751def : ReadAdvance<ReadVFWMulV, 0>;
752def : ReadAdvance<ReadVFWMulF, 0>;
753def : ReadAdvance<ReadVFMulAddV, 0>;
754def : ReadAdvance<ReadVFMulAddF, 0>;
755def : ReadAdvance<ReadVFWMulAddV, 0>;
756def : ReadAdvance<ReadVFWMulAddF, 0>;
757def : ReadAdvance<ReadVFSqrtV, 0>;
758def : ReadAdvance<ReadVFRecpV, 0>;
759def : ReadAdvance<ReadVFCmpV, 0>;
760def : ReadAdvance<ReadVFCmpF, 0>;
761def : ReadAdvance<ReadVFSgnjV, 0>;
762def : ReadAdvance<ReadVFSgnjF, 0>;
763def : ReadAdvance<ReadVFClassV, 0>;
764def : ReadAdvance<ReadVFMergeV, 0>;
765def : ReadAdvance<ReadVFMergeF, 0>;
766def : ReadAdvance<ReadVFMovF, 0>;
767def : ReadAdvance<ReadVFCvtIToFV, 0>;
768def : ReadAdvance<ReadVFCvtFToIV, 0>;
769def : ReadAdvance<ReadVFWCvtIToFV, 0>;
770def : ReadAdvance<ReadVFWCvtFToIV, 0>;
771def : ReadAdvance<ReadVFWCvtFToFV, 0>;
772def : ReadAdvance<ReadVFNCvtIToFV, 0>;
773def : ReadAdvance<ReadVFNCvtFToIV, 0>;
774def : ReadAdvance<ReadVFNCvtFToFV, 0>;
775
776// 15. Vector Reduction Operations
777def : ReadAdvance<ReadVIRedV, 0>;
778def : ReadAdvance<ReadVIRedV0, 0>;
779def : ReadAdvance<ReadVIWRedV, 0>;
780def : ReadAdvance<ReadVIWRedV0, 0>;
781def : ReadAdvance<ReadVFRedV, 0>;
782def : ReadAdvance<ReadVFRedV0, 0>;
783def : ReadAdvance<ReadVFRedOV, 0>;
784def : ReadAdvance<ReadVFRedOV0, 0>;
785def : ReadAdvance<ReadVFWRedV, 0>;
786def : ReadAdvance<ReadVFWRedV0, 0>;
787def : ReadAdvance<ReadVFWRedOV, 0>;
788def : ReadAdvance<ReadVFWRedOV0, 0>;
789
790// 16. Vector Mask Instructions
791def : ReadAdvance<ReadVMALUV, 0>;
792def : ReadAdvance<ReadVMPopV, 0>;
793def : ReadAdvance<ReadVMFFSV, 0>;
794def : ReadAdvance<ReadVMSFSV, 0>;
795def : ReadAdvance<ReadVMIotV, 0>;
796
797// 17. Vector Permutation Instructions
798def : ReadAdvance<ReadVIMovVX, 0>;
799def : ReadAdvance<ReadVIMovXV, 0>;
800def : ReadAdvance<ReadVIMovXX, 0>;
801def : ReadAdvance<ReadVFMovVF, 0>;
802def : ReadAdvance<ReadVFMovFV, 0>;
803def : ReadAdvance<ReadVFMovFX, 0>;
804def : ReadAdvance<ReadVISlideV, 0>;
805def : ReadAdvance<ReadVISlideX, 0>;
806def : ReadAdvance<ReadVFSlideV, 0>;
807def : ReadAdvance<ReadVFSlideF, 0>;
808def : ReadAdvance<ReadVGatherV, 0>;
809def : ReadAdvance<ReadVGatherX, 0>;
810def : ReadAdvance<ReadVCompressV, 0>;
811def : ReadAdvance<ReadVMov1V, 0>;
812def : ReadAdvance<ReadVMov2V, 0>;
813def : ReadAdvance<ReadVMov4V, 0>;
814def : ReadAdvance<ReadVMov8V, 0>;
815
816// Others
817def : ReadAdvance<ReadVMask, 0>;
818
819} // Unsupported
820} // UnsupportedSchedV
821