1*0b57cec5SDimitry Andric //===-- RISCVRegisterInfo.h - RISCV Register Information Impl ---*- C++ -*-===// 2*0b57cec5SDimitry Andric // 3*0b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*0b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5*0b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*0b57cec5SDimitry Andric // 7*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 8*0b57cec5SDimitry Andric // 9*0b57cec5SDimitry Andric // This file contains the RISCV implementation of the TargetRegisterInfo class. 10*0b57cec5SDimitry Andric // 11*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 12*0b57cec5SDimitry Andric 13*0b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_RISCV_RISCVREGISTERINFO_H 14*0b57cec5SDimitry Andric #define LLVM_LIB_TARGET_RISCV_RISCVREGISTERINFO_H 15*0b57cec5SDimitry Andric 16*0b57cec5SDimitry Andric #include "llvm/CodeGen/TargetRegisterInfo.h" 17*0b57cec5SDimitry Andric 18*0b57cec5SDimitry Andric #define GET_REGINFO_HEADER 19*0b57cec5SDimitry Andric #include "RISCVGenRegisterInfo.inc" 20*0b57cec5SDimitry Andric 21*0b57cec5SDimitry Andric namespace llvm { 22*0b57cec5SDimitry Andric 23*0b57cec5SDimitry Andric struct RISCVRegisterInfo : public RISCVGenRegisterInfo { 24*0b57cec5SDimitry Andric 25*0b57cec5SDimitry Andric RISCVRegisterInfo(unsigned HwMode); 26*0b57cec5SDimitry Andric 27*0b57cec5SDimitry Andric const uint32_t *getCallPreservedMask(const MachineFunction &MF, 28*0b57cec5SDimitry Andric CallingConv::ID) const override; 29*0b57cec5SDimitry Andric 30*0b57cec5SDimitry Andric const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override; 31*0b57cec5SDimitry Andric 32*0b57cec5SDimitry Andric BitVector getReservedRegs(const MachineFunction &MF) const override; 33*0b57cec5SDimitry Andric 34*0b57cec5SDimitry Andric bool isConstantPhysReg(unsigned PhysReg) const override; 35*0b57cec5SDimitry Andric 36*0b57cec5SDimitry Andric const uint32_t *getNoPreservedMask() const override; 37*0b57cec5SDimitry Andric 38*0b57cec5SDimitry Andric void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, 39*0b57cec5SDimitry Andric unsigned FIOperandNum, 40*0b57cec5SDimitry Andric RegScavenger *RS = nullptr) const override; 41*0b57cec5SDimitry Andric 42*0b57cec5SDimitry Andric Register getFrameRegister(const MachineFunction &MF) const override; 43*0b57cec5SDimitry Andric 44*0b57cec5SDimitry Andric bool requiresRegisterScavenging(const MachineFunction &MF) const override { 45*0b57cec5SDimitry Andric return true; 46*0b57cec5SDimitry Andric } 47*0b57cec5SDimitry Andric 48*0b57cec5SDimitry Andric bool requiresFrameIndexScavenging(const MachineFunction &MF) const override { 49*0b57cec5SDimitry Andric return true; 50*0b57cec5SDimitry Andric } 51*0b57cec5SDimitry Andric 52*0b57cec5SDimitry Andric bool trackLivenessAfterRegAlloc(const MachineFunction &) const override { 53*0b57cec5SDimitry Andric return true; 54*0b57cec5SDimitry Andric } 55*0b57cec5SDimitry Andric }; 56*0b57cec5SDimitry Andric } 57*0b57cec5SDimitry Andric 58*0b57cec5SDimitry Andric #endif 59