1*700637cbSDimitry Andric//===---- RISCVPfmCounters.td - RISC-V Hardware Counters ---*- tablegen -*-===// 2*700637cbSDimitry Andric// 3*700637cbSDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*700637cbSDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 5*700637cbSDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*700637cbSDimitry Andric// 7*700637cbSDimitry Andric//===----------------------------------------------------------------------===// 8*700637cbSDimitry Andric// 9*700637cbSDimitry Andric// This describes the available hardware counters for RISC-V. 10*700637cbSDimitry Andric// 11*700637cbSDimitry Andric//===----------------------------------------------------------------------===// 12*700637cbSDimitry Andric 13*700637cbSDimitry Andricdef CpuCyclesPfmCounter : PfmCounter<"CYCLES">; 14*700637cbSDimitry Andric 15*700637cbSDimitry Andricdef DefaultPfmCounters : ProcPfmCounters { 16*700637cbSDimitry Andric let CycleCounter = CpuCyclesPfmCounter; 17*700637cbSDimitry Andric} 18*700637cbSDimitry Andricdef : PfmCountersDefaultBinding<DefaultPfmCounters>; 19