1 //=- RISCVMachineFunctionInfo.h - RISCV machine function info -----*- C++ -*-=// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file declares RISCV-specific per-machine-function information. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_RISCV_RISCVMACHINEFUNCTIONINFO_H 14 #define LLVM_LIB_TARGET_RISCV_RISCVMACHINEFUNCTIONINFO_H 15 16 #include "RISCVSubtarget.h" 17 #include "llvm/CodeGen/MIRYamlMapping.h" 18 #include "llvm/CodeGen/MachineFrameInfo.h" 19 #include "llvm/CodeGen/MachineFunction.h" 20 21 namespace llvm { 22 23 class RISCVMachineFunctionInfo; 24 25 namespace yaml { 26 struct RISCVMachineFunctionInfo final : public yaml::MachineFunctionInfo { 27 int VarArgsFrameIndex; 28 int VarArgsSaveSize; 29 30 RISCVMachineFunctionInfo() = default; 31 RISCVMachineFunctionInfo(const llvm::RISCVMachineFunctionInfo &MFI); 32 33 void mappingImpl(yaml::IO &YamlIO) override; 34 ~RISCVMachineFunctionInfo() = default; 35 }; 36 37 template <> struct MappingTraits<RISCVMachineFunctionInfo> { 38 static void mapping(IO &YamlIO, RISCVMachineFunctionInfo &MFI) { 39 YamlIO.mapOptional("varArgsFrameIndex", MFI.VarArgsFrameIndex); 40 YamlIO.mapOptional("varArgsSaveSize", MFI.VarArgsSaveSize); 41 } 42 }; 43 } // end namespace yaml 44 45 /// RISCVMachineFunctionInfo - This class is derived from MachineFunctionInfo 46 /// and contains private RISCV-specific information for each MachineFunction. 47 class RISCVMachineFunctionInfo : public MachineFunctionInfo { 48 private: 49 /// FrameIndex for start of varargs area 50 int VarArgsFrameIndex = 0; 51 /// Size of the save area used for varargs 52 int VarArgsSaveSize = 0; 53 /// FrameIndex used for transferring values between 64-bit FPRs and a pair 54 /// of 32-bit GPRs via the stack. 55 int MoveF64FrameIndex = -1; 56 /// Size of any opaque stack adjustment due to save/restore libcalls. 57 unsigned LibCallStackSize = 0; 58 /// Size of RVV stack. 59 uint64_t RVVStackSize = 0; 60 /// Padding required to keep RVV stack aligned within the main stack. 61 uint64_t RVVPadding = 0; 62 /// Size of stack frame to save callee saved registers 63 unsigned CalleeSavedStackSize = 0; 64 65 public: 66 RISCVMachineFunctionInfo(const MachineFunction &MF) {} 67 68 int getVarArgsFrameIndex() const { return VarArgsFrameIndex; } 69 void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; } 70 71 unsigned getVarArgsSaveSize() const { return VarArgsSaveSize; } 72 void setVarArgsSaveSize(int Size) { VarArgsSaveSize = Size; } 73 74 int getMoveF64FrameIndex(MachineFunction &MF) { 75 if (MoveF64FrameIndex == -1) 76 MoveF64FrameIndex = 77 MF.getFrameInfo().CreateStackObject(8, Align(8), false); 78 return MoveF64FrameIndex; 79 } 80 81 unsigned getLibCallStackSize() const { return LibCallStackSize; } 82 void setLibCallStackSize(unsigned Size) { LibCallStackSize = Size; } 83 84 bool useSaveRestoreLibCalls(const MachineFunction &MF) const { 85 // We cannot use fixed locations for the callee saved spill slots if the 86 // function uses a varargs save area, or is an interrupt handler. 87 return MF.getSubtarget<RISCVSubtarget>().enableSaveRestore() && 88 VarArgsSaveSize == 0 && !MF.getFrameInfo().hasTailCall() && 89 !MF.getFunction().hasFnAttribute("interrupt"); 90 } 91 92 uint64_t getRVVStackSize() const { return RVVStackSize; } 93 void setRVVStackSize(uint64_t Size) { RVVStackSize = Size; } 94 95 uint64_t getRVVPadding() const { return RVVPadding; } 96 void setRVVPadding(uint64_t Padding) { RVVPadding = Padding; } 97 98 unsigned getCalleeSavedStackSize() const { return CalleeSavedStackSize; } 99 void setCalleeSavedStackSize(unsigned Size) { CalleeSavedStackSize = Size; } 100 101 void initializeBaseYamlFields(const yaml::RISCVMachineFunctionInfo &YamlMFI); 102 }; 103 104 } // end namespace llvm 105 106 #endif // LLVM_LIB_TARGET_RISCV_RISCVMACHINEFUNCTIONINFO_H 107