1//===-- RISCVInstrInfoZcmop.td -----------------------------*- tablegen -*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file describes the RISC-V instructions from the standard Compressed 10// May-Be-Operations Extension (Zcmop). 11// This version is still experimental as the 'Zcmop' extension hasn't been 12// ratified yet. It is based on v0.2 of the specification. 13// 14//===----------------------------------------------------------------------===// 15 16let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 17class CMOPInst<bits<3> imm3, string opcodestr> 18 : RVInst16CI<0b011, 0b01, (outs), (ins), opcodestr, ""> { 19 let Inst{6-2} = 0; 20 let Inst{7} = 1; 21 let Inst{10-8} = imm3; 22 let Inst{12-11} = 0; 23} 24 25// CMOP1, CMOP5 is used by Zicfiss. 26let Predicates = [HasStdExtZcmop, NoHasStdExtZicfiss] in { 27 def CMOP1 : CMOPInst<0, "cmop.1">, Sched<[]>; 28 def CMOP5 : CMOPInst<2, "cmop.5">, Sched<[]>; 29} 30 31foreach n = [3, 7, 9, 11, 13, 15] in { 32 let Predicates = [HasStdExtZcmop] in 33 def CMOP # n : CMOPInst<!srl(n, 1), "cmop." # n>, Sched<[]>; 34} 35