xref: /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVInstrGISel.td (revision b64c5a0ace59af62eff52bfe110a521dc73c937b)
1//===-- RISCVInstrGISel.td - RISC-V GISel target pseudos ----*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10// RISC-V GlobalISel target pseudo instruction definitions. This is kept
11// separately from the other tablegen files for organizational purposes, but
12// share the same infrastructure.
13//
14//===----------------------------------------------------------------------===//
15
16class RISCVGenericInstruction : GenericInstruction {
17  let Namespace = "RISCV";
18}
19
20// Pseudo equivalent to a RISCVISD::FCLASS.
21def G_FCLASS : RISCVGenericInstruction {
22  let OutOperandList = (outs type0:$dst);
23  let InOperandList = (ins type1:$src);
24  let hasSideEffects = false;
25}
26def : GINodeEquiv<G_FCLASS, riscv_fclass>;
27
28// Pseudo equivalent to a RISCVISD::READ_VLENB.
29def G_READ_VLENB : RISCVGenericInstruction {
30  let OutOperandList = (outs type0:$dst);
31  let InOperandList = (ins);
32  let hasSideEffects = false;
33}
34def : GINodeEquiv<G_READ_VLENB, riscv_read_vlenb>;
35
36// Pseudo equivalent to a RISCVISD::VMCLR_VL
37def G_VMCLR_VL : RISCVGenericInstruction {
38  let OutOperandList = (outs type0:$dst);
39  let InOperandList = (ins type1:$vl);
40  let hasSideEffects = false;
41}
42def : GINodeEquiv<G_VMCLR_VL, riscv_vmclr_vl>;
43
44// Pseudo equivalent to a RISCVISD::VMSET_VL
45def G_VMSET_VL : RISCVGenericInstruction {
46  let OutOperandList = (outs type0:$dst);
47  let InOperandList = (ins type1:$vl);
48  let hasSideEffects = false;
49}
50def : GINodeEquiv<G_VMSET_VL, riscv_vmset_vl>;
51
52// Pseudo equivalent to a RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL. There is no
53// record to mark as equivalent to using GINodeEquiv because it gets lowered
54// before instruction selection.
55def G_SPLAT_VECTOR_SPLIT_I64_VL : RISCVGenericInstruction {
56  let OutOperandList = (outs type0:$dst);
57  let InOperandList = (ins type0:$passthru, type1:$hi, type1:$lo, type2:$vl);
58  let hasSideEffects = false;
59}
60