xref: /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVCallingConv.td (revision af23369a6deaaeb612ab266eb88b8bb8d560c322) 
1//===-- RISCVCallingConv.td - Calling Conventions RISCV ----*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This describes the calling conventions for the RISCV architecture.
10//
11//===----------------------------------------------------------------------===//
12
13// The RISC-V calling convention is handled with custom code in
14// RISCVISelLowering.cpp (CC_RISCV).
15
16def CSR_ILP32_LP64
17    : CalleeSavedRegs<(add X1, X3, X4, X8, X9, (sequence "X%u", 18, 27))>;
18
19def CSR_ILP32F_LP64F
20    : CalleeSavedRegs<(add CSR_ILP32_LP64,
21                       F8_F, F9_F, (sequence "F%u_F", 18, 27))>;
22
23def CSR_ILP32D_LP64D
24    : CalleeSavedRegs<(add CSR_ILP32_LP64,
25                       F8_D, F9_D, (sequence "F%u_D", 18, 27))>;
26
27// Needed for implementation of RISCVRegisterInfo::getNoPreservedMask()
28def CSR_NoRegs : CalleeSavedRegs<(add)>;
29
30// Interrupt handler needs to save/restore all registers that are used,
31// both Caller and Callee saved registers.
32def CSR_Interrupt : CalleeSavedRegs<(add X1,
33    (sequence "X%u", 3, 9),
34    (sequence "X%u", 10, 11),
35    (sequence "X%u", 12, 17),
36    (sequence "X%u", 18, 27),
37    (sequence "X%u", 28, 31))>;
38
39// Same as CSR_Interrupt, but including all 32-bit FP registers.
40def CSR_XLEN_F32_Interrupt: CalleeSavedRegs<(add X1,
41    (sequence "X%u", 3, 9),
42    (sequence "X%u", 10, 11),
43    (sequence "X%u", 12, 17),
44    (sequence "X%u", 18, 27),
45    (sequence "X%u", 28, 31),
46    (sequence "F%u_F", 0, 7),
47    (sequence "F%u_F", 10, 11),
48    (sequence "F%u_F", 12, 17),
49    (sequence "F%u_F", 28, 31),
50    (sequence "F%u_F", 8, 9),
51    (sequence "F%u_F", 18, 27))>;
52
53// Same as CSR_Interrupt, but including all 64-bit FP registers.
54def CSR_XLEN_F64_Interrupt: CalleeSavedRegs<(add X1,
55    (sequence "X%u", 3, 9),
56    (sequence "X%u", 10, 11),
57    (sequence "X%u", 12, 17),
58    (sequence "X%u", 18, 27),
59    (sequence "X%u", 28, 31),
60    (sequence "F%u_D", 0, 7),
61    (sequence "F%u_D", 10, 11),
62    (sequence "F%u_D", 12, 17),
63    (sequence "F%u_D", 28, 31),
64    (sequence "F%u_D", 8, 9),
65    (sequence "F%u_D", 18, 27))>;
66