1//===-- RISCVCallingConv.td - Calling Conventions RISC-V ---*- tablegen -*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This describes the calling conventions for the RISC-V architecture. 10// 11//===----------------------------------------------------------------------===// 12 13// The RISC-V calling convention is handled with custom code in 14// RISCVISelLowering.cpp (CC_RISCV). 15 16def CSR_ILP32E_LP64E : CalleeSavedRegs<(add X1, X8, X9)>; 17 18def CSR_ILP32_LP64 19 : CalleeSavedRegs<(add CSR_ILP32E_LP64E, (sequence "X%u", 18, 27))>; 20 21def CSR_ILP32F_LP64F 22 : CalleeSavedRegs<(add CSR_ILP32_LP64, 23 F8_F, F9_F, (sequence "F%u_F", 18, 27))>; 24 25def CSR_ILP32D_LP64D 26 : CalleeSavedRegs<(add CSR_ILP32_LP64, 27 F8_D, F9_D, (sequence "F%u_D", 18, 27))>; 28 29defvar CSR_V = (add (sequence "V%u", 1, 7), (sequence "V%u", 24, 31), 30 V2M2, V4M2, V6M2, V24M2, V26M2, V28M2, V30M2, 31 V4M4, V24M4, V28M4, V24M8); 32 33def CSR_ILP32_LP64_V 34 : CalleeSavedRegs<(add CSR_ILP32_LP64, CSR_V)>; 35 36def CSR_ILP32F_LP64F_V 37 : CalleeSavedRegs<(add CSR_ILP32F_LP64F, CSR_V)>; 38 39def CSR_ILP32D_LP64D_V 40 : CalleeSavedRegs<(add CSR_ILP32D_LP64D, CSR_V)>; 41 42// Needed for implementation of RISCVRegisterInfo::getNoPreservedMask() 43def CSR_NoRegs : CalleeSavedRegs<(add)>; 44 45// Interrupt handler needs to save/restore all registers that are used, 46// both Caller and Callee saved registers. 47def CSR_Interrupt : CalleeSavedRegs<(add X1, (sequence "X%u", 5, 31))>; 48 49// Same as CSR_Interrupt, but including all 32-bit FP registers. 50def CSR_XLEN_F32_Interrupt: CalleeSavedRegs<(add CSR_Interrupt, 51 (sequence "F%u_F", 0, 31))>; 52 53// Same as CSR_Interrupt, but including all 64-bit FP registers. 54def CSR_XLEN_F64_Interrupt: CalleeSavedRegs<(add CSR_Interrupt, 55 (sequence "F%u_D", 0, 31))>; 56 57// Same as CSR_Interrupt, but excluding X16-X31. 58def CSR_Interrupt_RVE : CalleeSavedRegs<(sub CSR_Interrupt, 59 (sequence "X%u", 16, 31))>; 60 61// Same as CSR_XLEN_F32_Interrupt, but excluding X16-X31. 62def CSR_XLEN_F32_Interrupt_RVE: CalleeSavedRegs<(sub CSR_XLEN_F32_Interrupt, 63 (sequence "X%u", 16, 31))>; 64 65// Same as CSR_XLEN_F64_Interrupt, but excluding X16-X31. 66def CSR_XLEN_F64_Interrupt_RVE: CalleeSavedRegs<(sub CSR_XLEN_F64_Interrupt, 67 (sequence "X%u", 16, 31))>; 68