1 //===-- RISCVTargetStreamer.cpp - RISCV Target Streamer Methods -----------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file provides RISCV specific target streamer methods. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "RISCVTargetStreamer.h" 14 #include "RISCVBaseInfo.h" 15 #include "RISCVMCTargetDesc.h" 16 #include "llvm/Support/FormattedStream.h" 17 #include "llvm/Support/RISCVAttributes.h" 18 #include "llvm/Support/RISCVISAInfo.h" 19 20 using namespace llvm; 21 22 RISCVTargetStreamer::RISCVTargetStreamer(MCStreamer &S) : MCTargetStreamer(S) {} 23 24 void RISCVTargetStreamer::finish() { finishAttributeSection(); } 25 void RISCVTargetStreamer::reset() {} 26 27 void RISCVTargetStreamer::emitDirectiveOptionPush() {} 28 void RISCVTargetStreamer::emitDirectiveOptionPop() {} 29 void RISCVTargetStreamer::emitDirectiveOptionPIC() {} 30 void RISCVTargetStreamer::emitDirectiveOptionNoPIC() {} 31 void RISCVTargetStreamer::emitDirectiveOptionRVC() {} 32 void RISCVTargetStreamer::emitDirectiveOptionNoRVC() {} 33 void RISCVTargetStreamer::emitDirectiveOptionRelax() {} 34 void RISCVTargetStreamer::emitDirectiveOptionNoRelax() {} 35 void RISCVTargetStreamer::emitAttribute(unsigned Attribute, unsigned Value) {} 36 void RISCVTargetStreamer::finishAttributeSection() {} 37 void RISCVTargetStreamer::emitTextAttribute(unsigned Attribute, 38 StringRef String) {} 39 void RISCVTargetStreamer::emitIntTextAttribute(unsigned Attribute, 40 unsigned IntValue, 41 StringRef StringValue) {} 42 void RISCVTargetStreamer::setTargetABI(RISCVABI::ABI ABI) { 43 assert(ABI != RISCVABI::ABI_Unknown && "Improperly initialized target ABI"); 44 TargetABI = ABI; 45 } 46 47 void RISCVTargetStreamer::emitTargetAttributes(const MCSubtargetInfo &STI) { 48 if (STI.hasFeature(RISCV::FeatureRV32E)) 49 emitAttribute(RISCVAttrs::STACK_ALIGN, RISCVAttrs::ALIGN_4); 50 else 51 emitAttribute(RISCVAttrs::STACK_ALIGN, RISCVAttrs::ALIGN_16); 52 53 auto ParseResult = RISCVFeatures::parseFeatureBits( 54 STI.hasFeature(RISCV::Feature64Bit), STI.getFeatureBits()); 55 if (!ParseResult) { 56 report_fatal_error(ParseResult.takeError()); 57 } else { 58 auto &ISAInfo = *ParseResult; 59 emitTextAttribute(RISCVAttrs::ARCH, ISAInfo->toString()); 60 } 61 } 62 63 // This part is for ascii assembly output 64 RISCVTargetAsmStreamer::RISCVTargetAsmStreamer(MCStreamer &S, 65 formatted_raw_ostream &OS) 66 : RISCVTargetStreamer(S), OS(OS) {} 67 68 void RISCVTargetAsmStreamer::emitDirectiveOptionPush() { 69 OS << "\t.option\tpush\n"; 70 } 71 72 void RISCVTargetAsmStreamer::emitDirectiveOptionPop() { 73 OS << "\t.option\tpop\n"; 74 } 75 76 void RISCVTargetAsmStreamer::emitDirectiveOptionPIC() { 77 OS << "\t.option\tpic\n"; 78 } 79 80 void RISCVTargetAsmStreamer::emitDirectiveOptionNoPIC() { 81 OS << "\t.option\tnopic\n"; 82 } 83 84 void RISCVTargetAsmStreamer::emitDirectiveOptionRVC() { 85 OS << "\t.option\trvc\n"; 86 } 87 88 void RISCVTargetAsmStreamer::emitDirectiveOptionNoRVC() { 89 OS << "\t.option\tnorvc\n"; 90 } 91 92 void RISCVTargetAsmStreamer::emitDirectiveOptionRelax() { 93 OS << "\t.option\trelax\n"; 94 } 95 96 void RISCVTargetAsmStreamer::emitDirectiveOptionNoRelax() { 97 OS << "\t.option\tnorelax\n"; 98 } 99 100 void RISCVTargetAsmStreamer::emitAttribute(unsigned Attribute, unsigned Value) { 101 OS << "\t.attribute\t" << Attribute << ", " << Twine(Value) << "\n"; 102 } 103 104 void RISCVTargetAsmStreamer::emitTextAttribute(unsigned Attribute, 105 StringRef String) { 106 OS << "\t.attribute\t" << Attribute << ", \"" << String << "\"\n"; 107 } 108 109 void RISCVTargetAsmStreamer::emitIntTextAttribute(unsigned Attribute, 110 unsigned IntValue, 111 StringRef StringValue) {} 112 113 void RISCVTargetAsmStreamer::finishAttributeSection() {} 114