1 //===-- RISCVFixupKinds.h - RISCV Specific Fixup Entries --------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H 10 #define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H 11 12 #include "llvm/MC/MCFixup.h" 13 14 #undef RISCV 15 16 namespace llvm { 17 namespace RISCV { 18 enum Fixups { 19 // 20-bit fixup corresponding to %hi(foo) for instructions like lui 20 fixup_riscv_hi20 = FirstTargetFixupKind, 21 // 12-bit fixup corresponding to %lo(foo) for instructions like addi 22 fixup_riscv_lo12_i, 23 // 12-bit fixup corresponding to %lo(foo) for the S-type store instructions 24 fixup_riscv_lo12_s, 25 // 20-bit fixup corresponding to %pcrel_hi(foo) for instructions like auipc 26 fixup_riscv_pcrel_hi20, 27 // 12-bit fixup corresponding to %pcrel_lo(foo) for instructions like addi 28 fixup_riscv_pcrel_lo12_i, 29 // 12-bit fixup corresponding to %pcrel_lo(foo) for the S-type store 30 // instructions 31 fixup_riscv_pcrel_lo12_s, 32 // 20-bit fixup corresponding to %got_pcrel_hi(foo) for instructions like 33 // auipc 34 fixup_riscv_got_hi20, 35 // 20-bit fixup corresponding to %tprel_hi(foo) for instructions like lui 36 fixup_riscv_tprel_hi20, 37 // 12-bit fixup corresponding to %tprel_lo(foo) for instructions like addi 38 fixup_riscv_tprel_lo12_i, 39 // 12-bit fixup corresponding to %tprel_lo(foo) for the S-type store 40 // instructions 41 fixup_riscv_tprel_lo12_s, 42 // Fixup corresponding to %tprel_add(foo) for PseudoAddTPRel, used as a linker 43 // hint 44 fixup_riscv_tprel_add, 45 // 20-bit fixup corresponding to %tls_ie_pcrel_hi(foo) for instructions like 46 // auipc 47 fixup_riscv_tls_got_hi20, 48 // 20-bit fixup corresponding to %tls_gd_pcrel_hi(foo) for instructions like 49 // auipc 50 fixup_riscv_tls_gd_hi20, 51 // 20-bit fixup for symbol references in the jal instruction 52 fixup_riscv_jal, 53 // 12-bit fixup for symbol references in the branch instructions 54 fixup_riscv_branch, 55 // 11-bit fixup for symbol references in the compressed jump instruction 56 fixup_riscv_rvc_jump, 57 // 8-bit fixup for symbol references in the compressed branch instruction 58 fixup_riscv_rvc_branch, 59 // Fixup representing a legacy no-pic function call attached to the auipc 60 // instruction in a pair composed of adjacent auipc+jalr instructions. 61 fixup_riscv_call, 62 // Fixup representing a function call attached to the auipc instruction in a 63 // pair composed of adjacent auipc+jalr instructions. 64 fixup_riscv_call_plt, 65 // Used to generate an R_RISCV_RELAX relocation, which indicates the linker 66 // may relax the instruction pair. 67 fixup_riscv_relax, 68 // Used to generate an R_RISCV_ALIGN relocation, which indicates the linker 69 // should fixup the alignment after linker relaxation. 70 fixup_riscv_align, 71 // 8-bit fixup corresponding to R_RISCV_SET8 for local label assignment. 72 fixup_riscv_set_8, 73 // 8-bit fixup corresponding to R_RISCV_ADD8 for 8-bit symbolic difference 74 // paired relocations. 75 fixup_riscv_add_8, 76 // 8-bit fixup corresponding to R_RISCV_SUB8 for 8-bit symbolic difference 77 // paired relocations. 78 fixup_riscv_sub_8, 79 // 16-bit fixup corresponding to R_RISCV_SET16 for local label assignment. 80 fixup_riscv_set_16, 81 // 16-bit fixup corresponding to R_RISCV_ADD16 for 16-bit symbolic difference 82 // paired reloctions. 83 fixup_riscv_add_16, 84 // 16-bit fixup corresponding to R_RISCV_SUB16 for 16-bit symbolic difference 85 // paired reloctions. 86 fixup_riscv_sub_16, 87 // 32-bit fixup corresponding to R_RISCV_SET32 for local label assignment. 88 fixup_riscv_set_32, 89 // 32-bit fixup corresponding to R_RISCV_ADD32 for 32-bit symbolic difference 90 // paired relocations. 91 fixup_riscv_add_32, 92 // 32-bit fixup corresponding to R_RISCV_SUB32 for 32-bit symbolic difference 93 // paired relocations. 94 fixup_riscv_sub_32, 95 // 64-bit fixup corresponding to R_RISCV_ADD64 for 64-bit symbolic difference 96 // paired relocations. 97 fixup_riscv_add_64, 98 // 64-bit fixup corresponding to R_RISCV_SUB64 for 64-bit symbolic difference 99 // paired relocations. 100 fixup_riscv_sub_64, 101 // 6-bit fixup corresponding to R_RISCV_SET6 for local label assignment in 102 // DWARF CFA. 103 fixup_riscv_set_6b, 104 // 6-bit fixup corresponding to R_RISCV_SUB6 for local label assignment in 105 // DWARF CFA. 106 fixup_riscv_sub_6b, 107 108 // Used as a sentinel, must be the last 109 fixup_riscv_invalid, 110 NumTargetFixupKinds = fixup_riscv_invalid - FirstTargetFixupKind 111 }; 112 } // end namespace RISCV 113 } // end namespace llvm 114 115 #endif 116