xref: /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/RISCVFixupKinds.h (revision 7ef62cebc2f965b0f640263e179276928885e33d)
1 //===-- RISCVFixupKinds.h - RISCV Specific Fixup Entries --------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H
10 #define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H
11 
12 #include "llvm/MC/MCFixup.h"
13 
14 #undef RISCV
15 
16 namespace llvm::RISCV {
17 enum Fixups {
18   // 20-bit fixup corresponding to %hi(foo) for instructions like lui
19   fixup_riscv_hi20 = FirstTargetFixupKind,
20   // 12-bit fixup corresponding to %lo(foo) for instructions like addi
21   fixup_riscv_lo12_i,
22   // 12-bit fixup corresponding to %lo(foo) for the S-type store instructions
23   fixup_riscv_lo12_s,
24   // 20-bit fixup corresponding to %pcrel_hi(foo) for instructions like auipc
25   fixup_riscv_pcrel_hi20,
26   // 12-bit fixup corresponding to %pcrel_lo(foo) for instructions like addi
27   fixup_riscv_pcrel_lo12_i,
28   // 12-bit fixup corresponding to %pcrel_lo(foo) for the S-type store
29   // instructions
30   fixup_riscv_pcrel_lo12_s,
31   // 20-bit fixup corresponding to %got_pcrel_hi(foo) for instructions like
32   // auipc
33   fixup_riscv_got_hi20,
34   // 20-bit fixup corresponding to %tprel_hi(foo) for instructions like lui
35   fixup_riscv_tprel_hi20,
36   // 12-bit fixup corresponding to %tprel_lo(foo) for instructions like addi
37   fixup_riscv_tprel_lo12_i,
38   // 12-bit fixup corresponding to %tprel_lo(foo) for the S-type store
39   // instructions
40   fixup_riscv_tprel_lo12_s,
41   // Fixup corresponding to %tprel_add(foo) for PseudoAddTPRel, used as a linker
42   // hint
43   fixup_riscv_tprel_add,
44   // 20-bit fixup corresponding to %tls_ie_pcrel_hi(foo) for instructions like
45   // auipc
46   fixup_riscv_tls_got_hi20,
47   // 20-bit fixup corresponding to %tls_gd_pcrel_hi(foo) for instructions like
48   // auipc
49   fixup_riscv_tls_gd_hi20,
50   // 20-bit fixup for symbol references in the jal instruction
51   fixup_riscv_jal,
52   // 12-bit fixup for symbol references in the branch instructions
53   fixup_riscv_branch,
54   // 11-bit fixup for symbol references in the compressed jump instruction
55   fixup_riscv_rvc_jump,
56   // 8-bit fixup for symbol references in the compressed branch instruction
57   fixup_riscv_rvc_branch,
58   // Fixup representing a legacy no-pic function call attached to the auipc
59   // instruction in a pair composed of adjacent auipc+jalr instructions.
60   fixup_riscv_call,
61   // Fixup representing a function call attached to the auipc instruction in a
62   // pair composed of adjacent auipc+jalr instructions.
63   fixup_riscv_call_plt,
64   // Used to generate an R_RISCV_RELAX relocation, which indicates the linker
65   // may relax the instruction pair.
66   fixup_riscv_relax,
67   // Used to generate an R_RISCV_ALIGN relocation, which indicates the linker
68   // should fixup the alignment after linker relaxation.
69   fixup_riscv_align,
70   // 8-bit fixup corresponding to R_RISCV_SET8 for local label assignment.
71   fixup_riscv_set_8,
72   // 8-bit fixup corresponding to R_RISCV_ADD8 for 8-bit symbolic difference
73   // paired relocations.
74   fixup_riscv_add_8,
75   // 8-bit fixup corresponding to R_RISCV_SUB8 for 8-bit symbolic difference
76   // paired relocations.
77   fixup_riscv_sub_8,
78   // 16-bit fixup corresponding to R_RISCV_SET16 for local label assignment.
79   fixup_riscv_set_16,
80   // 16-bit fixup corresponding to R_RISCV_ADD16 for 16-bit symbolic difference
81   // paired reloctions.
82   fixup_riscv_add_16,
83   // 16-bit fixup corresponding to R_RISCV_SUB16 for 16-bit symbolic difference
84   // paired reloctions.
85   fixup_riscv_sub_16,
86   // 32-bit fixup corresponding to R_RISCV_SET32 for local label assignment.
87   fixup_riscv_set_32,
88   // 32-bit fixup corresponding to R_RISCV_ADD32 for 32-bit symbolic difference
89   // paired relocations.
90   fixup_riscv_add_32,
91   // 32-bit fixup corresponding to R_RISCV_SUB32 for 32-bit symbolic difference
92   // paired relocations.
93   fixup_riscv_sub_32,
94   // 64-bit fixup corresponding to R_RISCV_ADD64 for 64-bit symbolic difference
95   // paired relocations.
96   fixup_riscv_add_64,
97   // 64-bit fixup corresponding to R_RISCV_SUB64 for 64-bit symbolic difference
98   // paired relocations.
99   fixup_riscv_sub_64,
100   // 6-bit fixup corresponding to R_RISCV_SET6 for local label assignment in
101   // DWARF CFA.
102   fixup_riscv_set_6b,
103   // 6-bit fixup corresponding to R_RISCV_SUB6 for local label assignment in
104   // DWARF CFA.
105   fixup_riscv_sub_6b,
106 
107   // Used as a sentinel, must be the last
108   fixup_riscv_invalid,
109   NumTargetFixupKinds = fixup_riscv_invalid - FirstTargetFixupKind
110 };
111 } // end namespace llvm::RISCV
112 
113 #endif
114