1 //===-- PPCTargetTransformInfo.h - PPC specific TTI -------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 /// \file 9 /// This file a TargetTransformInfo::Concept conforming object specific to the 10 /// PPC target machine. It uses the target's detailed information to 11 /// provide more precise answers to certain TTI queries, while letting the 12 /// target independent and default TTI implementations handle the rest. 13 /// 14 //===----------------------------------------------------------------------===// 15 16 #ifndef LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H 17 #define LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H 18 19 #include "PPCTargetMachine.h" 20 #include "llvm/Analysis/TargetTransformInfo.h" 21 #include "llvm/CodeGen/BasicTTIImpl.h" 22 #include "llvm/CodeGen/TargetLowering.h" 23 24 namespace llvm { 25 26 class PPCTTIImpl : public BasicTTIImplBase<PPCTTIImpl> { 27 typedef BasicTTIImplBase<PPCTTIImpl> BaseT; 28 typedef TargetTransformInfo TTI; 29 friend BaseT; 30 31 const PPCSubtarget *ST; 32 const PPCTargetLowering *TLI; 33 34 const PPCSubtarget *getST() const { return ST; } 35 const PPCTargetLowering *getTLI() const { return TLI; } 36 bool mightUseCTR(BasicBlock *BB, TargetLibraryInfo *LibInfo, 37 SmallPtrSetImpl<const Value *> &Visited); 38 39 public: 40 explicit PPCTTIImpl(const PPCTargetMachine *TM, const Function &F) 41 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), 42 TLI(ST->getTargetLowering()) {} 43 44 /// \name Scalar TTI Implementations 45 /// @{ 46 47 using BaseT::getIntImmCost; 48 int getIntImmCost(const APInt &Imm, Type *Ty, 49 TTI::TargetCostKind CostKind); 50 51 int getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm, 52 Type *Ty, TTI::TargetCostKind CostKind); 53 int getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, 54 Type *Ty, TTI::TargetCostKind CostKind); 55 56 unsigned getUserCost(const User *U, ArrayRef<const Value *> Operands, 57 TTI::TargetCostKind CostKind); 58 59 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth); 60 bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, 61 AssumptionCache &AC, 62 TargetLibraryInfo *LibInfo, 63 HardwareLoopInfo &HWLoopInfo); 64 bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI, 65 DominatorTree *DT, AssumptionCache *AC, 66 TargetLibraryInfo *LibInfo); 67 void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, 68 TTI::UnrollingPreferences &UP); 69 void getPeelingPreferences(Loop *L, ScalarEvolution &SE, 70 TTI::PeelingPreferences &PP); 71 bool isLSRCostLess(TargetTransformInfo::LSRCost &C1, 72 TargetTransformInfo::LSRCost &C2); 73 74 /// @} 75 76 /// \name Vector TTI Implementations 77 /// @{ 78 bool useColdCCForColdCall(Function &F); 79 bool enableAggressiveInterleaving(bool LoopHasReductions); 80 TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, 81 bool IsZeroCmp) const; 82 bool enableInterleavedAccessVectorization(); 83 84 enum PPCRegisterClass { 85 GPRRC, FPRRC, VRRC, VSXRC 86 }; 87 unsigned getNumberOfRegisters(unsigned ClassID) const; 88 unsigned getRegisterClassForType(bool Vector, Type *Ty = nullptr) const; 89 const char* getRegisterClassName(unsigned ClassID) const; 90 unsigned getRegisterBitWidth(bool Vector) const; 91 unsigned getCacheLineSize() const override; 92 unsigned getPrefetchDistance() const override; 93 unsigned getMaxInterleaveFactor(unsigned VF); 94 int vectorCostAdjustment(int Cost, unsigned Opcode, Type *Ty1, Type *Ty2); 95 int getArithmeticInstrCost( 96 unsigned Opcode, Type *Ty, 97 TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput, 98 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue, 99 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue, 100 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, 101 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None, 102 ArrayRef<const Value *> Args = ArrayRef<const Value *>(), 103 const Instruction *CxtI = nullptr); 104 int getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp); 105 int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, 106 TTI::TargetCostKind CostKind, 107 const Instruction *I = nullptr); 108 int getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind); 109 int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, 110 TTI::TargetCostKind CostKind, 111 const Instruction *I = nullptr); 112 int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); 113 int getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, 114 unsigned AddressSpace, 115 TTI::TargetCostKind CostKind, 116 const Instruction *I = nullptr); 117 int getInterleavedMemoryOpCost( 118 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices, 119 Align Alignment, unsigned AddressSpace, 120 TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency, 121 bool UseMaskForCond = false, bool UseMaskForGaps = false); 122 unsigned getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, 123 TTI::TargetCostKind CostKind); 124 125 /// @} 126 }; 127 128 } // end namespace llvm 129 130 #endif 131