1 //===-- PPCTargetTransformInfo.h - PPC specific TTI -------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 /// \file 9 /// This file a TargetTransformInfo::Concept conforming object specific to the 10 /// PPC target machine. It uses the target's detailed information to 11 /// provide more precise answers to certain TTI queries, while letting the 12 /// target independent and default TTI implementations handle the rest. 13 /// 14 //===----------------------------------------------------------------------===// 15 16 #ifndef LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H 17 #define LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H 18 19 #include "PPCTargetMachine.h" 20 #include "llvm/Analysis/TargetTransformInfo.h" 21 #include "llvm/CodeGen/BasicTTIImpl.h" 22 #include "llvm/CodeGen/TargetLowering.h" 23 24 namespace llvm { 25 26 class PPCTTIImpl : public BasicTTIImplBase<PPCTTIImpl> { 27 typedef BasicTTIImplBase<PPCTTIImpl> BaseT; 28 typedef TargetTransformInfo TTI; 29 friend BaseT; 30 31 const PPCSubtarget *ST; 32 const PPCTargetLowering *TLI; 33 34 const PPCSubtarget *getST() const { return ST; } 35 const PPCTargetLowering *getTLI() const { return TLI; } 36 bool mightUseCTR(BasicBlock *BB, TargetLibraryInfo *LibInfo); 37 38 public: 39 explicit PPCTTIImpl(const PPCTargetMachine *TM, const Function &F) 40 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), 41 TLI(ST->getTargetLowering()) {} 42 43 /// \name Scalar TTI Implementations 44 /// @{ 45 46 using BaseT::getIntImmCost; 47 int getIntImmCost(const APInt &Imm, Type *Ty); 48 49 int getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm, 50 Type *Ty); 51 int getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, 52 Type *Ty); 53 54 unsigned getUserCost(const User *U, ArrayRef<const Value *> Operands); 55 56 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth); 57 bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, 58 AssumptionCache &AC, 59 TargetLibraryInfo *LibInfo, 60 HardwareLoopInfo &HWLoopInfo); 61 bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI, 62 DominatorTree *DT, AssumptionCache *AC, 63 TargetLibraryInfo *LibInfo); 64 void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, 65 TTI::UnrollingPreferences &UP); 66 67 /// @} 68 69 /// \name Vector TTI Implementations 70 /// @{ 71 bool useColdCCForColdCall(Function &F); 72 bool enableAggressiveInterleaving(bool LoopHasReductions); 73 TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, 74 bool IsZeroCmp) const; 75 bool enableInterleavedAccessVectorization(); 76 77 enum PPCRegisterClass { 78 GPRRC, FPRRC, VRRC, VSXRC 79 }; 80 unsigned getNumberOfRegisters(unsigned ClassID) const; 81 unsigned getRegisterClassForType(bool Vector, Type *Ty = nullptr) const; 82 const char* getRegisterClassName(unsigned ClassID) const; 83 unsigned getRegisterBitWidth(bool Vector) const; 84 unsigned getCacheLineSize() const override; 85 unsigned getPrefetchDistance() const override; 86 unsigned getMaxInterleaveFactor(unsigned VF); 87 int vectorCostAdjustment(int Cost, unsigned Opcode, Type *Ty1, Type *Ty2); 88 int getArithmeticInstrCost( 89 unsigned Opcode, Type *Ty, 90 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue, 91 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue, 92 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, 93 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None, 94 ArrayRef<const Value *> Args = ArrayRef<const Value *>(), 95 const Instruction *CxtI = nullptr); 96 int getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp); 97 int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, 98 const Instruction *I = nullptr); 99 int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, 100 const Instruction *I = nullptr); 101 int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); 102 int getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, 103 unsigned AddressSpace, const Instruction *I = nullptr); 104 int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, 105 unsigned Factor, 106 ArrayRef<unsigned> Indices, 107 unsigned Alignment, 108 unsigned AddressSpace, 109 bool UseMaskForCond = false, 110 bool UseMaskForGaps = false); 111 unsigned getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy, 112 ArrayRef<Value*> Args, FastMathFlags FMF, unsigned VF); 113 unsigned getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy, 114 ArrayRef<Type*> Tys, FastMathFlags FMF, 115 unsigned ScalarizationCostPassed = UINT_MAX); 116 117 /// @} 118 }; 119 120 } // end namespace llvm 121 122 #endif 123