1//===--- PPCSchedPredicates.td - PowerPC Scheduling Preds -*- tablegen -*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// Automatically generated file, do not edit! 9// 10// This file defines scheduling predicate definitions that are used by the 11// PowerPC subtargets. 12//===----------------------------------------------------------------------===// 13// Identify instructions that write BF pipelines with 7 cycles. 14def P10W_BF_7C_Pred : MCSchedPredicate< 15 CheckOpcode<[FADD, 16 FADDS, 17 FADDS_rec, 18 FADD_rec, 19 FCFID, 20 FCFIDS, 21 FCFIDS_rec, 22 FCFIDU, 23 FCFIDUS, 24 FCFIDUS_rec, 25 FCFIDU_rec, 26 FCFID_rec, 27 FCTID, 28 FCTIDU, 29 FCTIDUZ, 30 FCTIDUZ_rec, 31 FCTIDU_rec, 32 FCTIDZ, 33 FCTIDZ_rec, 34 FCTID_rec, 35 FCTIW, 36 FCTIWU, 37 FCTIWUZ, 38 FCTIWUZ_rec, 39 FCTIWU_rec, 40 FCTIWZ, 41 FCTIWZ_rec, 42 FCTIW_rec, 43 FMADD, 44 FMADDS, 45 FMADDS_rec, 46 FMADD_rec, 47 FMSUB, 48 FMSUBS, 49 FMSUBS_rec, 50 FMSUB_rec, 51 FMUL, 52 FMULS, 53 FMULS_rec, 54 FMUL_rec, 55 FNMADD, 56 FNMADDS, 57 FNMADDS_rec, 58 FNMADD_rec, 59 FNMSUB, 60 FNMSUBS, 61 FNMSUBS_rec, 62 FNMSUB_rec, 63 FRE, 64 FRES, 65 FRES_rec, 66 FRE_rec, 67 FRIMD, FRIMS, 68 FRIMD_rec, FRIMS_rec, 69 FRIND, FRINS, 70 FRIND_rec, FRINS_rec, 71 FRIPD, FRIPS, 72 FRIPD_rec, FRIPS_rec, 73 FRIZD, FRIZS, 74 FRIZD_rec, FRIZS_rec, 75 FRSP, 76 FRSP_rec, 77 FRSQRTE, 78 FRSQRTES, 79 FRSQRTES_rec, 80 FRSQRTE_rec, 81 FSELD, FSELS, 82 FSELD_rec, FSELS_rec, 83 FSUB, 84 FSUBS, 85 FSUBS_rec, 86 FSUB_rec, 87 VADDFP, 88 VCFSX, VCFSX_0, 89 VCFUX, VCFUX_0, 90 VCTSXS, VCTSXS_0, 91 VCTUXS, VCTUXS_0, 92 VEXPTEFP, 93 VEXPTEFP, 94 VLOGEFP, 95 VMADDFP, 96 VNMSUBFP, 97 VREFP, 98 VRFIM, 99 VRFIN, 100 VRFIP, 101 VRFIZ, 102 VRSQRTEFP, 103 VSUBFP, 104 XSADDDP, 105 XSADDSP, 106 XSCVDPHP, 107 XSCVDPSP, 108 XSCVDPSPN, 109 XSCVDPSXDS, XSCVDPSXDSs, 110 XSCVDPSXWS, XSCVDPSXWSs, 111 XSCVDPUXDS, XSCVDPUXDSs, 112 XSCVDPUXWS, XSCVDPUXWSs, 113 XSCVSPDP, 114 XSCVSXDDP, 115 XSCVSXDSP, 116 XSCVUXDDP, 117 XSCVUXDSP, 118 XSMADDADP, 119 XSMADDASP, 120 XSMADDMDP, 121 XSMADDMSP, 122 XSMSUBADP, 123 XSMSUBASP, 124 XSMSUBMDP, 125 XSMSUBMSP, 126 XSMULDP, 127 XSMULSP, 128 XSNMADDADP, 129 XSNMADDASP, 130 XSNMADDMDP, 131 XSNMADDMSP, 132 XSNMSUBADP, 133 XSNMSUBASP, 134 XSNMSUBMDP, 135 XSNMSUBMSP, 136 XSRDPI, 137 XSRDPIC, 138 XSRDPIM, 139 XSRDPIP, 140 XSRDPIZ, 141 XSREDP, 142 XSRESP, 143 XSRSP, 144 XSRSQRTEDP, 145 XSRSQRTESP, 146 XSSUBDP, 147 XSSUBSP, 148 XVADDDP, 149 XVADDSP, 150 XVCVDPSP, 151 XVCVDPSXDS, 152 XVCVDPSXWS, 153 XVCVDPUXDS, 154 XVCVDPUXWS, 155 XVCVSPBF16, 156 XVCVSPDP, 157 XVCVSPHP, 158 XVCVSPSXDS, 159 XVCVSPSXWS, 160 XVCVSPUXDS, 161 XVCVSPUXWS, 162 XVCVSXDDP, 163 XVCVSXDSP, 164 XVCVSXWDP, 165 XVCVSXWSP, 166 XVCVUXDDP, 167 XVCVUXDSP, 168 XVCVUXWDP, 169 XVCVUXWSP, 170 XVMADDADP, 171 XVMADDASP, 172 XVMADDMDP, 173 XVMADDMSP, 174 XVMSUBADP, 175 XVMSUBASP, 176 XVMSUBMDP, 177 XVMSUBMSP, 178 XVMULDP, 179 XVMULSP, 180 XVNMADDADP, 181 XVNMADDASP, 182 XVNMADDMDP, 183 XVNMADDMSP, 184 XVNMSUBADP, 185 XVNMSUBASP, 186 XVNMSUBMDP, 187 XVNMSUBMSP, 188 XVRDPI, 189 XVRDPIC, 190 XVRDPIM, 191 XVRDPIP, 192 XVRDPIZ, 193 XVREDP, 194 XVRESP, 195 XVRSPI, 196 XVRSPIC, 197 XVRSPIM, 198 XVRSPIP, 199 XVRSPIZ, 200 XVRSQRTEDP, 201 XVRSQRTESP, 202 XVSUBDP, 203 XVSUBSP]> 204>; 205 206// Identify instructions that write CY pipelines with 7 cycles. 207def P10W_CY_7C_Pred : MCSchedPredicate< 208 CheckOpcode<[CFUGED, 209 CNTLZDM, 210 CNTTZDM, 211 PDEPD, 212 PEXTD, 213 VCFUGED, 214 VCIPHER, 215 VCIPHERLAST, 216 VCLZDM, 217 VCTZDM, 218 VGNB, 219 VNCIPHER, 220 VNCIPHERLAST, 221 VPDEPD, 222 VPEXTD, 223 VPMSUMB, 224 VPMSUMD, 225 VPMSUMH, 226 VPMSUMW, 227 VSBOX]> 228>; 229 230// Identify instructions that write MM pipelines with 10 cycles. 231def P10W_MM_10C_Pred : MCSchedPredicate< 232 CheckOpcode<[PMXVBF16GER2, 233 PMXVBF16GER2NN, 234 PMXVBF16GER2NP, 235 PMXVBF16GER2PN, 236 PMXVBF16GER2PP, 237 PMXVF16GER2, 238 PMXVF16GER2NN, 239 PMXVF16GER2NP, 240 PMXVF16GER2PN, 241 PMXVF16GER2PP, 242 PMXVF32GER, 243 PMXVF32GERNN, 244 PMXVF32GERNP, 245 PMXVF32GERPN, 246 PMXVF32GERPP, 247 PMXVF64GER, 248 PMXVF64GERNN, 249 PMXVF64GERNP, 250 PMXVF64GERPN, 251 PMXVF64GERPP, 252 PMXVI16GER2, 253 PMXVI16GER2PP, 254 PMXVI16GER2S, 255 PMXVI16GER2SPP, 256 PMXVI4GER8, 257 PMXVI4GER8PP, 258 PMXVI8GER4, 259 PMXVI8GER4PP, 260 PMXVI8GER4SPP, 261 XVBF16GER2, 262 XVBF16GER2NN, 263 XVBF16GER2NP, 264 XVBF16GER2PN, 265 XVBF16GER2PP, 266 XVF16GER2, 267 XVF16GER2NN, 268 XVF16GER2NP, 269 XVF16GER2PN, 270 XVF16GER2PP, 271 XVF32GER, 272 XVF32GERNN, 273 XVF32GERNP, 274 XVF32GERPN, 275 XVF32GERPP, 276 XVF64GER, 277 XVF64GERNN, 278 XVF64GERNP, 279 XVF64GERPN, 280 XVF64GERPP, 281 XVI16GER2, 282 XVI16GER2PP, 283 XVI16GER2S, 284 XVI16GER2SPP, 285 XVI4GER8, 286 XVI4GER8PP, 287 XVI8GER4, 288 XVI8GER4PP, 289 XVI8GER4SPP, 290 XXMFACC, 291 XXMFACC, 292 XXMTACC, 293 XXSETACCZ]> 294>; 295 296