1//=== ---- PPCMacroFusion.def - PowerPC MacroFuson Candidates -v-*- C++ -*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https)//llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier) Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file contains descriptions of the macro-fusion pair for PowerPC. 10// 11//===----------------------------------------------------------------------===// 12 13// NOTE: NO INCLUDE GUARD DESIRED! 14 15#ifndef FUSION_FEATURE 16 17// Each FUSION_FEATURE is assigned with one TYPE, and can be enabled/disabled 18// by HAS_FEATURE. The instructions pair is fusable only when the opcode 19// of the first instruction is in OPSET1, and the second instruction opcode is 20// in OPSET2. And if DEP_OP_IDX >=0, we will check the result of first OP is 21// the operand of the second op with DEP_OP_IDX as its operand index. We assume 22// that the result of the first op is its operand zero. 23#define FUSION_FEATURE(TYPE, HAS_FEATURE, DEP_OP_IDX, OPSET1, OPSET2) 24 25#endif 26 27#ifndef FUSION_OP_SET 28#define FUSION_OP_SET(...) __VA_ARGS__ 29#endif 30 31// Power8 User Manual Section 10.1.12, Instruction Fusion 32// {addi} followed by one of these {lxvd2x, lxvw4x, lxvdsx, lvebx, lvehx, 33// lvewx, lvx, lxsdx} 34FUSION_FEATURE(AddiLoad, hasAddiLoadFusion, 2, \ 35 FUSION_OP_SET(ADDI, ADDI8, ADDItocL), \ 36 FUSION_OP_SET(LXVD2X, LXVW4X, LXVDSX, LVEBX, LVEHX, LVEWX, \ 37 LVX, LXSDX)) 38 39// {addis) followed by one of these {ld, lbz, lhz, lwz} 40FUSION_FEATURE(AddisLoad, hasAddisLoadFusion, 2, \ 41 FUSION_OP_SET(ADDIS, ADDIS8, ADDIStocHA8), \ 42 FUSION_OP_SET(LD, LBZ, LBZ8, LHZ, LHZ8, LWZ, LWZ8)) 43 44// Power10 User Manual Section 19.1.5.4, Fusion 45// {add, mulld} - add 46FUSION_FEATURE(ArithAdd, hasArithAddFusion, -1, 47 FUSION_OP_SET(ADD4, ADD8, MULLD), FUSION_OP_SET(ADD4, ADD8)) 48 49// {add, subf} - {and, nand, nor, or} 50FUSION_FEATURE(ArithLogical, hasAddLogicalFusion, -1, 51 FUSION_OP_SET(ADD4, ADD8, SUBF, SUBF8), 52 FUSION_OP_SET(AND, AND8, OR, OR8, NAND, NAND8, NOR, NOR8)) 53 54// {and, andc, eqv, nand, nor, or, orc, xor} - {add, subf} 55FUSION_FEATURE(LogicalArith, hasLogicalAddFusion, -1, 56 FUSION_OP_SET(AND, ANDC, EQV, NAND, NOR, OR, ORC, XOR, AND8, 57 ANDC8, EQV8, NAND8, NOR8, OR8, ORC8, XOR8), 58 FUSION_OP_SET(ADD4, ADD8, SUBF, SUBF8)) 59 60// Either of {and, andc, eqv, nand, nor, or, orc, xor} 61FUSION_FEATURE(Logical, hasLogicalFusion, -1, 62 FUSION_OP_SET(AND, ANDC, EQV, NAND, NOR, OR, ORC, XOR, AND8, 63 ANDC8, EQV8, NAND8, NOR8, OR8, ORC8, XOR8), 64 FUSION_OP_SET(AND, ANDC, EQV, NAND, NOR, OR, ORC, XOR, AND8, 65 ANDC8, EQV8, NAND8, NOR8, OR8, ORC8, XOR8)) 66 67// vaddudm - vaddudm 68FUSION_FEATURE(VecAdd, hasArithAddFusion, -1, FUSION_OP_SET(VADDUDM), 69 FUSION_OP_SET(VADDUDM)) 70 71// Either of {vand, vandc, veqv, vnand, vnor, vor, vorc, vxor} 72FUSION_FEATURE(VecLogical, hasLogicalFusion, -1, 73 FUSION_OP_SET(VAND, VANDC, VEQV, VNAND, VNOR, VOR, VORC, VXOR), 74 FUSION_OP_SET(VAND, VANDC, VEQV, VNAND, VNOR, VOR, VORC, VXOR)) 75 76// sldi rx, ra, {3, 6} - {add, subf} 77// sldi rx, ra n is alias of rldicr rx, ra, n, 63-n 78FUSION_FEATURE(SldiAdd, hasArithAddFusion, -1, FUSION_OP_SET(RLDICR, RLDICR_32), 79 FUSION_OP_SET(ADD4, ADD8, SUBF, SUBF8)) 80 81#undef FUSION_FEATURE 82#undef FUSION_OP_SET 83