1*0b57cec5SDimitry Andric //===- PPCMachineScheduler.h - Custom PowerPC MI scheduler --*- C++ -*-===// 2*0b57cec5SDimitry Andric // 3*0b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*0b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 5*0b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*0b57cec5SDimitry Andric // 7*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 8*0b57cec5SDimitry Andric // 9*0b57cec5SDimitry Andric // Custom PowerPC MI scheduler. 10*0b57cec5SDimitry Andric // 11*0b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 12*0b57cec5SDimitry Andric 13*0b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_POWERPC_POWERPCMACHINESCHEDULER_H 14*0b57cec5SDimitry Andric #define LLVM_LIB_TARGET_POWERPC_POWERPCMACHINESCHEDULER_H 15*0b57cec5SDimitry Andric 16*0b57cec5SDimitry Andric #include "llvm/CodeGen/MachineScheduler.h" 17*0b57cec5SDimitry Andric 18*0b57cec5SDimitry Andric namespace llvm { 19*0b57cec5SDimitry Andric 20*0b57cec5SDimitry Andric /// A MachineSchedStrategy implementation for PowerPC pre RA scheduling. 21*0b57cec5SDimitry Andric class PPCPreRASchedStrategy : public GenericScheduler { 22*0b57cec5SDimitry Andric public: 23*0b57cec5SDimitry Andric PPCPreRASchedStrategy(const MachineSchedContext *C) : 24*0b57cec5SDimitry Andric GenericScheduler(C) {} 25*0b57cec5SDimitry Andric protected: 26*0b57cec5SDimitry Andric void tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand, 27*0b57cec5SDimitry Andric SchedBoundary *Zone) const override; 28*0b57cec5SDimitry Andric private: 29*0b57cec5SDimitry Andric bool biasAddiLoadCandidate(SchedCandidate &Cand, 30*0b57cec5SDimitry Andric SchedCandidate &TryCand, 31*0b57cec5SDimitry Andric SchedBoundary &Zone) const; 32*0b57cec5SDimitry Andric }; 33*0b57cec5SDimitry Andric 34*0b57cec5SDimitry Andric /// A MachineSchedStrategy implementation for PowerPC post RA scheduling. 35*0b57cec5SDimitry Andric class PPCPostRASchedStrategy : public PostGenericScheduler { 36*0b57cec5SDimitry Andric public: 37*0b57cec5SDimitry Andric PPCPostRASchedStrategy(const MachineSchedContext *C) : 38*0b57cec5SDimitry Andric PostGenericScheduler(C) {} 39*0b57cec5SDimitry Andric 40*0b57cec5SDimitry Andric protected: 41*0b57cec5SDimitry Andric void initialize(ScheduleDAGMI *Dag) override; 42*0b57cec5SDimitry Andric SUnit *pickNode(bool &IsTopNode) override; 43*0b57cec5SDimitry Andric void enterMBB(MachineBasicBlock *MBB) override; 44*0b57cec5SDimitry Andric void leaveMBB() override; 45*0b57cec5SDimitry Andric }; 46*0b57cec5SDimitry Andric 47*0b57cec5SDimitry Andric } // end namespace llvm 48*0b57cec5SDimitry Andric 49*0b57cec5SDimitry Andric #endif // LLVM_LIB_TARGET_POWERPC_POWERPCMACHINESCHEDULER_H 50