1//===-- PPCInstrFutureMMA.td - Future Instruction Set ------*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes the instructions introduced for the Future CPU for MMA. 11// 12//===----------------------------------------------------------------------===// 13 14class XX3Form_AT3_XABp5_P1<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, 15 string asmstr, list<dag> pattern> 16 : I<opcode, OOL, IOL, asmstr, NoItinerary> { 17 bits<3> AT; 18 bits<5> XAp; 19 bits<5> XBp; 20 bits<1> P; 21 22 let Pattern = pattern; 23 24 let Inst{6-8} = AT{2-0}; 25 let Inst{9-10} = 0; 26 let Inst{11-14} = XAp{3-0}; 27 let Inst{15} = P; 28 let Inst{16-19} = XBp{3-0}; 29 let Inst{20} = 0; 30 let Inst{21-28} = xo; 31 let Inst{29} = XAp{4}; 32 let Inst{30} = XBp{4}; 33 let Inst{31} = 0; 34} 35 36class XX2Form_AT3_XBp5_P2<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, 37 string asmstr, list<dag> pattern> 38 : I<opcode, OOL, IOL, asmstr, NoItinerary> { 39 bits<3> AT; 40 bits<5> XBp; 41 bits<2> P; 42 43 let Pattern = pattern; 44 45 let Inst{6-8} = AT{2-0}; 46 let Inst{9-14} = 0; 47 let Inst{15} = P{0}; 48 let Inst{16-19} = XBp{3-0}; 49 let Inst{20} = P{1}; 50 let Inst{21-29} = xo; 51 let Inst{30} = XBp{4}; 52 let Inst{31} = 0; 53} 54 55class XForm_ATB3<bits<6> opcode, bits<5> o, bits<10> xo, dag OOL, dag IOL, 56 string asmstr, list<dag> pattern> 57 : I <opcode, OOL, IOL, asmstr, NoItinerary> { 58 bits<3> AT; 59 bits<3> AB; 60 61 let Pattern = pattern; 62 63 let Inst{6-8} = AT{2-0}; 64 let Inst{9-10} = 0; 65 let Inst{11-15} = o; 66 let Inst{16-18} = AB{2-0}; 67 let Inst{19-20} = 0; 68 let Inst{21-30} = xo; 69 let Inst{31} = 0; 70} 71 72let Predicates = [IsISAFuture] in { 73 def DMXXEXTFDMR512 : XX3Form_AT3_XABp5_P1<60, 226, 74 (outs vsrprc:$XAp, vsrprc:$XBp), 75 (ins wacc:$AT), 76 "dmxxextfdmr512 $AT, $XAp, $XBp, 0", []> { 77 let P = 0; 78 } 79 80 def DMXXEXTFDMR512_HI : XX3Form_AT3_XABp5_P1<60, 226, 81 (outs vsrprc:$XAp, vsrprc:$XBp), 82 (ins wacc_hi:$AT), 83 "dmxxextfdmr512 $AT, $XAp, $XBp, 1", []> { 84 let P = 1; 85 } 86 87 def DMXXINSTFDMR512 : XX3Form_AT3_XABp5_P1<60, 234, (outs wacc:$AT), 88 (ins vsrprc:$XAp, vsrprc:$XBp), 89 "dmxxinstfdmr512 $AT, $XAp, $XBp, 0", []> { 90 let P = 0; 91 } 92 93 def DMXXINSTFDMR512_HI : XX3Form_AT3_XABp5_P1<60, 234, (outs wacc_hi:$AT), 94 (ins vsrprc:$XAp, vsrprc:$XBp), 95 "dmxxinstfdmr512 $AT, $XAp, $XBp, 1", []> { 96 let P = 1; 97 } 98 99 def DMXXEXTFDMR256 : XX2Form_AT3_XBp5_P2<60, 484, (outs vsrprc:$XBp), 100 (ins dmrrowp:$AT, u2imm:$P), 101 "dmxxextfdmr256 $AT, $XBp, $P", []>; 102 103 def DMXXINSTFDMR256 : XX2Form_AT3_XBp5_P2<60, 485, (outs dmrrowp:$AT), 104 (ins vsrprc:$XBp, u2imm:$P), 105 "dmxxinstfdmr256 $AT, $XBp, $P", []>; 106 107 def DMMR : XForm_ATB3<31, 6, 177, (outs dmr:$AT), (ins dmr:$AB), 108 "dmmr $AT, $AB", []>; 109 110 def DMXOR : XForm_ATB3<31, 7, 177, (outs dmr:$AT), (ins dmr:$ATi, dmr:$AB), 111 "dmxor $AT, $AB", []>, 112 RegConstraint<"$ATi = $AT">, NoEncode<"$ATi">; 113 114 def DMSETDMRZ : XForm_AT3<31, 2, 177, (outs dmr:$AT), (ins), 115 "dmsetdmrz $AT", NoItinerary, []>; 116} 117