1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains a printer that converts from our internal representation 10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 11 // the output mechanism used by `llc'. 12 // 13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "MCTargetDesc/PPCInstPrinter.h" 19 #include "MCTargetDesc/PPCMCExpr.h" 20 #include "MCTargetDesc/PPCMCTargetDesc.h" 21 #include "MCTargetDesc/PPCPredicates.h" 22 #include "PPC.h" 23 #include "PPCInstrInfo.h" 24 #include "PPCMachineFunctionInfo.h" 25 #include "PPCSubtarget.h" 26 #include "PPCTargetMachine.h" 27 #include "PPCTargetStreamer.h" 28 #include "TargetInfo/PowerPCTargetInfo.h" 29 #include "llvm/ADT/MapVector.h" 30 #include "llvm/ADT/StringRef.h" 31 #include "llvm/ADT/Triple.h" 32 #include "llvm/ADT/Twine.h" 33 #include "llvm/BinaryFormat/ELF.h" 34 #include "llvm/BinaryFormat/MachO.h" 35 #include "llvm/CodeGen/AsmPrinter.h" 36 #include "llvm/CodeGen/MachineBasicBlock.h" 37 #include "llvm/CodeGen/MachineFunction.h" 38 #include "llvm/CodeGen/MachineInstr.h" 39 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 40 #include "llvm/CodeGen/MachineOperand.h" 41 #include "llvm/CodeGen/MachineRegisterInfo.h" 42 #include "llvm/CodeGen/StackMaps.h" 43 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 44 #include "llvm/IR/DataLayout.h" 45 #include "llvm/IR/GlobalValue.h" 46 #include "llvm/IR/GlobalVariable.h" 47 #include "llvm/IR/Module.h" 48 #include "llvm/MC/MCAsmInfo.h" 49 #include "llvm/MC/MCContext.h" 50 #include "llvm/MC/MCExpr.h" 51 #include "llvm/MC/MCInst.h" 52 #include "llvm/MC/MCInstBuilder.h" 53 #include "llvm/MC/MCSectionELF.h" 54 #include "llvm/MC/MCSectionMachO.h" 55 #include "llvm/MC/MCSectionXCOFF.h" 56 #include "llvm/MC/MCStreamer.h" 57 #include "llvm/MC/MCSymbol.h" 58 #include "llvm/MC/MCSymbolELF.h" 59 #include "llvm/MC/MCSymbolXCOFF.h" 60 #include "llvm/MC/SectionKind.h" 61 #include "llvm/Support/Casting.h" 62 #include "llvm/Support/CodeGen.h" 63 #include "llvm/Support/Debug.h" 64 #include "llvm/Support/ErrorHandling.h" 65 #include "llvm/Support/TargetRegistry.h" 66 #include "llvm/Support/raw_ostream.h" 67 #include "llvm/Target/TargetMachine.h" 68 #include <algorithm> 69 #include <cassert> 70 #include <cstdint> 71 #include <memory> 72 #include <new> 73 74 using namespace llvm; 75 76 #define DEBUG_TYPE "asmprinter" 77 78 namespace { 79 80 class PPCAsmPrinter : public AsmPrinter { 81 protected: 82 MapVector<const MCSymbol *, MCSymbol *> TOC; 83 const PPCSubtarget *Subtarget = nullptr; 84 StackMaps SM; 85 86 virtual MCSymbol *getMCSymbolForTOCPseudoMO(const MachineOperand &MO); 87 88 public: 89 explicit PPCAsmPrinter(TargetMachine &TM, 90 std::unique_ptr<MCStreamer> Streamer) 91 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 92 93 StringRef getPassName() const override { return "PowerPC Assembly Printer"; } 94 95 MCSymbol *lookUpOrCreateTOCEntry(const MCSymbol *Sym); 96 97 bool doInitialization(Module &M) override { 98 if (!TOC.empty()) 99 TOC.clear(); 100 return AsmPrinter::doInitialization(M); 101 } 102 103 void EmitInstruction(const MachineInstr *MI) override; 104 105 /// This function is for PrintAsmOperand and PrintAsmMemoryOperand, 106 /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only. 107 /// The \p MI would be INLINEASM ONLY. 108 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 109 110 void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) override; 111 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 112 const char *ExtraCode, raw_ostream &O) override; 113 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 114 const char *ExtraCode, raw_ostream &O) override; 115 116 void EmitEndOfAsmFile(Module &M) override; 117 118 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 119 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 120 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 121 bool runOnMachineFunction(MachineFunction &MF) override { 122 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 123 bool Changed = AsmPrinter::runOnMachineFunction(MF); 124 emitXRayTable(); 125 return Changed; 126 } 127 }; 128 129 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 130 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 131 public: 132 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 133 std::unique_ptr<MCStreamer> Streamer) 134 : PPCAsmPrinter(TM, std::move(Streamer)) {} 135 136 StringRef getPassName() const override { 137 return "Linux PPC Assembly Printer"; 138 } 139 140 bool doFinalization(Module &M) override; 141 void EmitStartOfAsmFile(Module &M) override; 142 143 void EmitFunctionEntryLabel() override; 144 145 void EmitFunctionBodyStart() override; 146 void EmitFunctionBodyEnd() override; 147 void EmitInstruction(const MachineInstr *MI) override; 148 }; 149 150 class PPCAIXAsmPrinter : public PPCAsmPrinter { 151 private: 152 static void ValidateGV(const GlobalVariable *GV); 153 protected: 154 MCSymbol *getMCSymbolForTOCPseudoMO(const MachineOperand &MO) override; 155 156 public: 157 PPCAIXAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer) 158 : PPCAsmPrinter(TM, std::move(Streamer)) {} 159 160 StringRef getPassName() const override { return "AIX PPC Assembly Printer"; } 161 162 void SetupMachineFunction(MachineFunction &MF) override; 163 164 const MCExpr *lowerConstant(const Constant *CV) override; 165 166 void EmitGlobalVariable(const GlobalVariable *GV) override; 167 168 void EmitFunctionDescriptor() override; 169 170 void EmitEndOfAsmFile(Module &) override; 171 }; 172 173 } // end anonymous namespace 174 175 void PPCAsmPrinter::PrintSymbolOperand(const MachineOperand &MO, 176 raw_ostream &O) { 177 // Computing the address of a global symbol, not calling it. 178 const GlobalValue *GV = MO.getGlobal(); 179 MCSymbol *SymToPrint; 180 181 // External or weakly linked global variables need non-lazily-resolved stubs 182 if (Subtarget->hasLazyResolverStub(GV)) { 183 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 184 MachineModuleInfoImpl::StubValueTy &StubSym = 185 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 186 SymToPrint); 187 if (!StubSym.getPointer()) 188 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 189 !GV->hasInternalLinkage()); 190 } else { 191 SymToPrint = getSymbol(GV); 192 } 193 194 SymToPrint->print(O, MAI); 195 196 printOffset(MO.getOffset(), O); 197 } 198 199 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 200 raw_ostream &O) { 201 const DataLayout &DL = getDataLayout(); 202 const MachineOperand &MO = MI->getOperand(OpNo); 203 204 switch (MO.getType()) { 205 case MachineOperand::MO_Register: { 206 // The MI is INLINEASM ONLY and UseVSXReg is always false. 207 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); 208 209 // Linux assembler (Others?) does not take register mnemonics. 210 // FIXME - What about special registers used in mfspr/mtspr? 211 if (!Subtarget->isDarwin()) 212 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 213 O << RegName; 214 return; 215 } 216 case MachineOperand::MO_Immediate: 217 O << MO.getImm(); 218 return; 219 220 case MachineOperand::MO_MachineBasicBlock: 221 MO.getMBB()->getSymbol()->print(O, MAI); 222 return; 223 case MachineOperand::MO_ConstantPoolIndex: 224 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 225 << MO.getIndex(); 226 return; 227 case MachineOperand::MO_BlockAddress: 228 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 229 return; 230 case MachineOperand::MO_GlobalAddress: { 231 PrintSymbolOperand(MO, O); 232 return; 233 } 234 235 default: 236 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 237 return; 238 } 239 } 240 241 /// PrintAsmOperand - Print out an operand for an inline asm expression. 242 /// 243 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 244 const char *ExtraCode, raw_ostream &O) { 245 // Does this asm operand have a single letter operand modifier? 246 if (ExtraCode && ExtraCode[0]) { 247 if (ExtraCode[1] != 0) return true; // Unknown modifier. 248 249 switch (ExtraCode[0]) { 250 default: 251 // See if this is a generic print operand 252 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O); 253 case 'L': // Write second word of DImode reference. 254 // Verify that this operand has two consecutive registers. 255 if (!MI->getOperand(OpNo).isReg() || 256 OpNo+1 == MI->getNumOperands() || 257 !MI->getOperand(OpNo+1).isReg()) 258 return true; 259 ++OpNo; // Return the high-part. 260 break; 261 case 'I': 262 // Write 'i' if an integer constant, otherwise nothing. Used to print 263 // addi vs add, etc. 264 if (MI->getOperand(OpNo).isImm()) 265 O << "i"; 266 return false; 267 case 'x': 268 if(!MI->getOperand(OpNo).isReg()) 269 return true; 270 // This operand uses VSX numbering. 271 // If the operand is a VMX register, convert it to a VSX register. 272 Register Reg = MI->getOperand(OpNo).getReg(); 273 if (PPCInstrInfo::isVRRegister(Reg)) 274 Reg = PPC::VSX32 + (Reg - PPC::V0); 275 else if (PPCInstrInfo::isVFRegister(Reg)) 276 Reg = PPC::VSX32 + (Reg - PPC::VF0); 277 const char *RegName; 278 RegName = PPCInstPrinter::getRegisterName(Reg); 279 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 280 O << RegName; 281 return false; 282 } 283 } 284 285 printOperand(MI, OpNo, O); 286 return false; 287 } 288 289 // At the moment, all inline asm memory operands are a single register. 290 // In any case, the output of this routine should always be just one 291 // assembler operand. 292 293 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 294 const char *ExtraCode, 295 raw_ostream &O) { 296 if (ExtraCode && ExtraCode[0]) { 297 if (ExtraCode[1] != 0) return true; // Unknown modifier. 298 299 switch (ExtraCode[0]) { 300 default: return true; // Unknown modifier. 301 case 'y': // A memory reference for an X-form instruction 302 { 303 const char *RegName = "r0"; 304 if (!Subtarget->isDarwin()) 305 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 306 O << RegName << ", "; 307 printOperand(MI, OpNo, O); 308 return false; 309 } 310 case 'U': // Print 'u' for update form. 311 case 'X': // Print 'x' for indexed form. 312 { 313 // FIXME: Currently for PowerPC memory operands are always loaded 314 // into a register, so we never get an update or indexed form. 315 // This is bad even for offset forms, since even if we know we 316 // have a value in -16(r1), we will generate a load into r<n> 317 // and then load from 0(r<n>). Until that issue is fixed, 318 // tolerate 'U' and 'X' but don't output anything. 319 assert(MI->getOperand(OpNo).isReg()); 320 return false; 321 } 322 } 323 } 324 325 assert(MI->getOperand(OpNo).isReg()); 326 O << "0("; 327 printOperand(MI, OpNo, O); 328 O << ")"; 329 return false; 330 } 331 332 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 333 /// exists for it. If not, create one. Then return a symbol that references 334 /// the TOC entry. 335 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(const MCSymbol *Sym) { 336 MCSymbol *&TOCEntry = TOC[Sym]; 337 if (!TOCEntry) 338 TOCEntry = createTempSymbol("C"); 339 return TOCEntry; 340 } 341 342 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 343 emitStackMaps(SM); 344 } 345 346 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 347 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 348 349 auto &Ctx = OutStreamer->getContext(); 350 MCSymbol *MILabel = Ctx.createTempSymbol(); 351 OutStreamer->EmitLabel(MILabel); 352 353 SM.recordStackMap(*MILabel, MI); 354 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 355 356 // Scan ahead to trim the shadow. 357 const MachineBasicBlock &MBB = *MI.getParent(); 358 MachineBasicBlock::const_iterator MII(MI); 359 ++MII; 360 while (NumNOPBytes > 0) { 361 if (MII == MBB.end() || MII->isCall() || 362 MII->getOpcode() == PPC::DBG_VALUE || 363 MII->getOpcode() == TargetOpcode::PATCHPOINT || 364 MII->getOpcode() == TargetOpcode::STACKMAP) 365 break; 366 ++MII; 367 NumNOPBytes -= 4; 368 } 369 370 // Emit nops. 371 for (unsigned i = 0; i < NumNOPBytes; i += 4) 372 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 373 } 374 375 // Lower a patchpoint of the form: 376 // [<def>], <id>, <numBytes>, <target>, <numArgs> 377 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 378 auto &Ctx = OutStreamer->getContext(); 379 MCSymbol *MILabel = Ctx.createTempSymbol(); 380 OutStreamer->EmitLabel(MILabel); 381 382 SM.recordPatchPoint(*MILabel, MI); 383 PatchPointOpers Opers(&MI); 384 385 unsigned EncodedBytes = 0; 386 const MachineOperand &CalleeMO = Opers.getCallTarget(); 387 388 if (CalleeMO.isImm()) { 389 int64_t CallTarget = CalleeMO.getImm(); 390 if (CallTarget) { 391 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 392 "High 16 bits of call target should be zero."); 393 Register ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 394 EncodedBytes = 0; 395 // Materialize the jump address: 396 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 397 .addReg(ScratchReg) 398 .addImm((CallTarget >> 32) & 0xFFFF)); 399 ++EncodedBytes; 400 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 401 .addReg(ScratchReg) 402 .addReg(ScratchReg) 403 .addImm(32).addImm(16)); 404 ++EncodedBytes; 405 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 406 .addReg(ScratchReg) 407 .addReg(ScratchReg) 408 .addImm((CallTarget >> 16) & 0xFFFF)); 409 ++EncodedBytes; 410 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 411 .addReg(ScratchReg) 412 .addReg(ScratchReg) 413 .addImm(CallTarget & 0xFFFF)); 414 415 // Save the current TOC pointer before the remote call. 416 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset(); 417 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 418 .addReg(PPC::X2) 419 .addImm(TOCSaveOffset) 420 .addReg(PPC::X1)); 421 ++EncodedBytes; 422 423 // If we're on ELFv1, then we need to load the actual function pointer 424 // from the function descriptor. 425 if (!Subtarget->isELFv2ABI()) { 426 // Load the new TOC pointer and the function address, but not r11 427 // (needing this is rare, and loading it here would prevent passing it 428 // via a 'nest' parameter. 429 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 430 .addReg(PPC::X2) 431 .addImm(8) 432 .addReg(ScratchReg)); 433 ++EncodedBytes; 434 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 435 .addReg(ScratchReg) 436 .addImm(0) 437 .addReg(ScratchReg)); 438 ++EncodedBytes; 439 } 440 441 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 442 .addReg(ScratchReg)); 443 ++EncodedBytes; 444 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 445 ++EncodedBytes; 446 447 // Restore the TOC pointer after the call. 448 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 449 .addReg(PPC::X2) 450 .addImm(TOCSaveOffset) 451 .addReg(PPC::X1)); 452 ++EncodedBytes; 453 } 454 } else if (CalleeMO.isGlobal()) { 455 const GlobalValue *GValue = CalleeMO.getGlobal(); 456 MCSymbol *MOSymbol = getSymbol(GValue); 457 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 458 459 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 460 .addExpr(SymVar)); 461 EncodedBytes += 2; 462 } 463 464 // Each instruction is 4 bytes. 465 EncodedBytes *= 4; 466 467 // Emit padding. 468 unsigned NumBytes = Opers.getNumPatchBytes(); 469 assert(NumBytes >= EncodedBytes && 470 "Patchpoint can't request size less than the length of a call."); 471 assert((NumBytes - EncodedBytes) % 4 == 0 && 472 "Invalid number of NOP bytes requested!"); 473 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 474 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 475 } 476 477 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 478 /// call to __tls_get_addr to the current output stream. 479 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 480 MCSymbolRefExpr::VariantKind VK) { 481 StringRef Name = "__tls_get_addr"; 482 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 483 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 484 const Module *M = MF->getFunction().getParent(); 485 486 assert(MI->getOperand(0).isReg() && 487 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 488 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 489 "GETtls[ld]ADDR[32] must define GPR3"); 490 assert(MI->getOperand(1).isReg() && 491 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 492 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 493 "GETtls[ld]ADDR[32] must read GPR3"); 494 495 if (Subtarget->is32BitELFABI() && isPositionIndependent()) 496 Kind = MCSymbolRefExpr::VK_PLT; 497 498 const MCExpr *TlsRef = 499 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 500 501 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI. 502 if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt() && 503 M->getPICLevel() == PICLevel::BigPIC) 504 TlsRef = MCBinaryExpr::createAdd( 505 TlsRef, MCConstantExpr::create(32768, OutContext), OutContext); 506 const MachineOperand &MO = MI->getOperand(2); 507 const GlobalValue *GValue = MO.getGlobal(); 508 MCSymbol *MOSymbol = getSymbol(GValue); 509 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 510 EmitToStreamer(*OutStreamer, 511 MCInstBuilder(Subtarget->isPPC64() ? 512 PPC::BL8_NOP_TLS : PPC::BL_TLS) 513 .addExpr(TlsRef) 514 .addExpr(SymVar)); 515 } 516 517 /// Map a machine operand for a TOC pseudo-machine instruction to its 518 /// corresponding MCSymbol. 519 MCSymbol *PPCAsmPrinter::getMCSymbolForTOCPseudoMO(const MachineOperand &MO) { 520 switch (MO.getType()) { 521 case MachineOperand::MO_GlobalAddress: 522 return getSymbol(MO.getGlobal()); 523 case MachineOperand::MO_ConstantPoolIndex: 524 return GetCPISymbol(MO.getIndex()); 525 case MachineOperand::MO_JumpTableIndex: 526 return GetJTISymbol(MO.getIndex()); 527 case MachineOperand::MO_BlockAddress: 528 return GetBlockAddressSymbol(MO.getBlockAddress()); 529 default: 530 llvm_unreachable("Unexpected operand type to get symbol."); 531 } 532 } 533 534 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 535 /// the current output stream. 536 /// 537 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 538 MCInst TmpInst; 539 const bool IsDarwin = TM.getTargetTriple().isOSDarwin(); 540 const bool IsPPC64 = Subtarget->isPPC64(); 541 const bool IsAIX = Subtarget->isAIXABI(); 542 const Module *M = MF->getFunction().getParent(); 543 PICLevel::Level PL = M->getPICLevel(); 544 545 #ifndef NDEBUG 546 // Validate that SPE and FPU are mutually exclusive in codegen 547 if (!MI->isInlineAsm()) { 548 for (const MachineOperand &MO: MI->operands()) { 549 if (MO.isReg()) { 550 Register Reg = MO.getReg(); 551 if (Subtarget->hasSPE()) { 552 if (PPC::F4RCRegClass.contains(Reg) || 553 PPC::F8RCRegClass.contains(Reg) || 554 PPC::QBRCRegClass.contains(Reg) || 555 PPC::QFRCRegClass.contains(Reg) || 556 PPC::QSRCRegClass.contains(Reg) || 557 PPC::VFRCRegClass.contains(Reg) || 558 PPC::VRRCRegClass.contains(Reg) || 559 PPC::VSFRCRegClass.contains(Reg) || 560 PPC::VSSRCRegClass.contains(Reg) 561 ) 562 llvm_unreachable("SPE targets cannot have FPRegs!"); 563 } else { 564 if (PPC::SPERCRegClass.contains(Reg)) 565 llvm_unreachable("SPE register found in FPU-targeted code!"); 566 } 567 } 568 } 569 } 570 #endif 571 // Lower multi-instruction pseudo operations. 572 switch (MI->getOpcode()) { 573 default: break; 574 case TargetOpcode::DBG_VALUE: 575 llvm_unreachable("Should be handled target independently"); 576 case TargetOpcode::STACKMAP: 577 return LowerSTACKMAP(SM, *MI); 578 case TargetOpcode::PATCHPOINT: 579 return LowerPATCHPOINT(SM, *MI); 580 581 case PPC::MoveGOTtoLR: { 582 // Transform %lr = MoveGOTtoLR 583 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 584 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 585 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 586 // blrl 587 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 588 MCSymbol *GOTSymbol = 589 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 590 const MCExpr *OffsExpr = 591 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 592 MCSymbolRefExpr::VK_PPC_LOCAL, 593 OutContext), 594 MCConstantExpr::create(4, OutContext), 595 OutContext); 596 597 // Emit the 'bl'. 598 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 599 return; 600 } 601 case PPC::MovePCtoLR: 602 case PPC::MovePCtoLR8: { 603 // Transform %lr = MovePCtoLR 604 // Into this, where the label is the PIC base: 605 // bl L1$pb 606 // L1$pb: 607 MCSymbol *PICBase = MF->getPICBaseSymbol(); 608 609 // Emit the 'bl'. 610 EmitToStreamer(*OutStreamer, 611 MCInstBuilder(PPC::BL) 612 // FIXME: We would like an efficient form for this, so we 613 // don't have to do a lot of extra uniquing. 614 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 615 616 // Emit the label. 617 OutStreamer->EmitLabel(PICBase); 618 return; 619 } 620 case PPC::UpdateGBR: { 621 // Transform %rd = UpdateGBR(%rt, %ri) 622 // Into: lwz %rt, .L0$poff - .L0$pb(%ri) 623 // add %rd, %rt, %ri 624 // or into (if secure plt mode is on): 625 // addis r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@ha 626 // addi r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@l 627 // Get the offset from the GOT Base Register to the GOT 628 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 629 if (Subtarget->isSecurePlt() && isPositionIndependent() ) { 630 unsigned PICR = TmpInst.getOperand(0).getReg(); 631 MCSymbol *BaseSymbol = OutContext.getOrCreateSymbol( 632 M->getPICLevel() == PICLevel::SmallPIC ? "_GLOBAL_OFFSET_TABLE_" 633 : ".LTOC"); 634 const MCExpr *PB = 635 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), OutContext); 636 637 const MCExpr *DeltaExpr = MCBinaryExpr::createSub( 638 MCSymbolRefExpr::create(BaseSymbol, OutContext), PB, OutContext); 639 640 const MCExpr *DeltaHi = PPCMCExpr::createHa(DeltaExpr, false, OutContext); 641 EmitToStreamer( 642 *OutStreamer, 643 MCInstBuilder(PPC::ADDIS).addReg(PICR).addReg(PICR).addExpr(DeltaHi)); 644 645 const MCExpr *DeltaLo = PPCMCExpr::createLo(DeltaExpr, false, OutContext); 646 EmitToStreamer( 647 *OutStreamer, 648 MCInstBuilder(PPC::ADDI).addReg(PICR).addReg(PICR).addExpr(DeltaLo)); 649 return; 650 } else { 651 MCSymbol *PICOffset = 652 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 653 TmpInst.setOpcode(PPC::LWZ); 654 const MCExpr *Exp = 655 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 656 const MCExpr *PB = 657 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 658 MCSymbolRefExpr::VK_None, 659 OutContext); 660 const MCOperand TR = TmpInst.getOperand(1); 661 const MCOperand PICR = TmpInst.getOperand(0); 662 663 // Step 1: lwz %rt, .L$poff - .L$pb(%ri) 664 TmpInst.getOperand(1) = 665 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 666 TmpInst.getOperand(0) = TR; 667 TmpInst.getOperand(2) = PICR; 668 EmitToStreamer(*OutStreamer, TmpInst); 669 670 TmpInst.setOpcode(PPC::ADD4); 671 TmpInst.getOperand(0) = PICR; 672 TmpInst.getOperand(1) = TR; 673 TmpInst.getOperand(2) = PICR; 674 EmitToStreamer(*OutStreamer, TmpInst); 675 return; 676 } 677 } 678 case PPC::LWZtoc: { 679 assert(!IsDarwin && "TOC is an ELF/XCOFF construct."); 680 681 // Transform %rN = LWZtoc @op1, %r2 682 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 683 684 // Change the opcode to LWZ. 685 TmpInst.setOpcode(PPC::LWZ); 686 687 const MachineOperand &MO = MI->getOperand(1); 688 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 689 "Invalid operand for LWZtoc."); 690 691 // Map the operand to its corresponding MCSymbol. 692 const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO); 693 694 // Create a reference to the GOT entry for the symbol. The GOT entry will be 695 // synthesized later. 696 if (PL == PICLevel::SmallPIC && !IsAIX) { 697 const MCExpr *Exp = 698 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 699 OutContext); 700 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 701 EmitToStreamer(*OutStreamer, TmpInst); 702 return; 703 } 704 705 // Otherwise, use the TOC. 'TOCEntry' is a label used to reference the 706 // storage allocated in the TOC which contains the address of 707 // 'MOSymbol'. Said TOC entry will be synthesized later. 708 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 709 const MCExpr *Exp = 710 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, OutContext); 711 712 // AIX uses the label directly as the lwz displacement operand for 713 // references into the toc section. The displacement value will be generated 714 // relative to the toc-base. 715 if (IsAIX) { 716 assert( 717 TM.getCodeModel() == CodeModel::Small && 718 "This pseudo should only be selected for 32-bit small code model."); 719 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 720 EmitToStreamer(*OutStreamer, TmpInst); 721 return; 722 } 723 724 // Create an explicit subtract expression between the local symbol and 725 // '.LTOC' to manifest the toc-relative offset. 726 const MCExpr *PB = MCSymbolRefExpr::create( 727 OutContext.getOrCreateSymbol(Twine(".LTOC")), OutContext); 728 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 729 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 730 EmitToStreamer(*OutStreamer, TmpInst); 731 return; 732 } 733 case PPC::LDtocJTI: 734 case PPC::LDtocCPT: 735 case PPC::LDtocBA: 736 case PPC::LDtoc: { 737 assert(!IsDarwin && "TOC is an ELF/XCOFF construct"); 738 739 // Transform %x3 = LDtoc @min1, %x2 740 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 741 742 // Change the opcode to LD. 743 TmpInst.setOpcode(PPC::LD); 744 745 const MachineOperand &MO = MI->getOperand(1); 746 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 747 "Invalid operand!"); 748 749 // Map the machine operand to its corresponding MCSymbol, then map the 750 // global address operand to be a reference to the TOC entry we will 751 // synthesize later. 752 MCSymbol *TOCEntry = 753 lookUpOrCreateTOCEntry(getMCSymbolForTOCPseudoMO(MO)); 754 755 const MCSymbolRefExpr::VariantKind VK = 756 IsAIX ? MCSymbolRefExpr::VK_None : MCSymbolRefExpr::VK_PPC_TOC; 757 const MCExpr *Exp = 758 MCSymbolRefExpr::create(TOCEntry, VK, OutContext); 759 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 760 EmitToStreamer(*OutStreamer, TmpInst); 761 return; 762 } 763 case PPC::ADDIStocHA: { 764 assert((IsAIX && !IsPPC64 && TM.getCodeModel() == CodeModel::Large) && 765 "This pseudo should only be selected for 32-bit large code model on" 766 " AIX."); 767 768 // Transform %rd = ADDIStocHA %rA, @sym(%r2) 769 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 770 771 // Change the opcode to ADDIS. 772 TmpInst.setOpcode(PPC::ADDIS); 773 774 const MachineOperand &MO = MI->getOperand(2); 775 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 776 "Invalid operand for ADDIStocHA."); 777 778 // Map the machine operand to its corresponding MCSymbol. 779 MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO); 780 781 // Always use TOC on AIX. Map the global address operand to be a reference 782 // to the TOC entry we will synthesize later. 'TOCEntry' is a label used to 783 // reference the storage allocated in the TOC which contains the address of 784 // 'MOSymbol'. 785 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 786 const MCExpr *Exp = MCSymbolRefExpr::create(TOCEntry, 787 MCSymbolRefExpr::VK_PPC_U, 788 OutContext); 789 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 790 EmitToStreamer(*OutStreamer, TmpInst); 791 return; 792 } 793 case PPC::LWZtocL: { 794 assert(IsAIX && !IsPPC64 && TM.getCodeModel() == CodeModel::Large && 795 "This pseudo should only be selected for 32-bit large code model on" 796 " AIX."); 797 798 // Transform %rd = LWZtocL @sym, %rs. 799 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 800 801 // Change the opcode to lwz. 802 TmpInst.setOpcode(PPC::LWZ); 803 804 const MachineOperand &MO = MI->getOperand(1); 805 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 806 "Invalid operand for LWZtocL."); 807 808 // Map the machine operand to its corresponding MCSymbol. 809 MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO); 810 811 // Always use TOC on AIX. Map the global address operand to be a reference 812 // to the TOC entry we will synthesize later. 'TOCEntry' is a label used to 813 // reference the storage allocated in the TOC which contains the address of 814 // 'MOSymbol'. 815 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 816 const MCExpr *Exp = MCSymbolRefExpr::create(TOCEntry, 817 MCSymbolRefExpr::VK_PPC_L, 818 OutContext); 819 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 820 EmitToStreamer(*OutStreamer, TmpInst); 821 return; 822 } 823 case PPC::ADDIStocHA8: { 824 assert(!IsDarwin && "TOC is an ELF/XCOFF construct"); 825 826 // Transform %xd = ADDIStocHA8 %x2, @sym 827 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 828 829 // Change the opcode to ADDIS8. If the global address is the address of 830 // an external symbol, is a jump table address, is a block address, or is a 831 // constant pool index with large code model enabled, then generate a TOC 832 // entry and reference that. Otherwise, reference the symbol directly. 833 TmpInst.setOpcode(PPC::ADDIS8); 834 835 const MachineOperand &MO = MI->getOperand(2); 836 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 837 "Invalid operand for ADDIStocHA8!"); 838 839 const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO); 840 841 const bool GlobalToc = 842 MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal()); 843 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 844 (MO.isCPI() && TM.getCodeModel() == CodeModel::Large)) 845 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 846 847 const MCSymbolRefExpr::VariantKind VK = 848 IsAIX ? MCSymbolRefExpr::VK_PPC_U : MCSymbolRefExpr::VK_PPC_TOC_HA; 849 850 const MCExpr *Exp = 851 MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 852 853 if (!MO.isJTI() && MO.getOffset()) 854 Exp = MCBinaryExpr::createAdd(Exp, 855 MCConstantExpr::create(MO.getOffset(), 856 OutContext), 857 OutContext); 858 859 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 860 EmitToStreamer(*OutStreamer, TmpInst); 861 return; 862 } 863 case PPC::LDtocL: { 864 assert(!IsDarwin && "TOC is an ELF/XCOFF construct"); 865 866 // Transform %xd = LDtocL @sym, %xs 867 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 868 869 // Change the opcode to LD. If the global address is the address of 870 // an external symbol, is a jump table address, is a block address, or is 871 // a constant pool index with large code model enabled, then generate a 872 // TOC entry and reference that. Otherwise, reference the symbol directly. 873 TmpInst.setOpcode(PPC::LD); 874 875 const MachineOperand &MO = MI->getOperand(1); 876 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 877 MO.isBlockAddress()) && 878 "Invalid operand for LDtocL!"); 879 880 LLVM_DEBUG(assert( 881 (!MO.isGlobal() || Subtarget->isGVIndirectSymbol(MO.getGlobal())) && 882 "LDtocL used on symbol that could be accessed directly is " 883 "invalid. Must match ADDIStocHA8.")); 884 885 const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO); 886 887 if (!MO.isCPI() || TM.getCodeModel() == CodeModel::Large) 888 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 889 890 const MCSymbolRefExpr::VariantKind VK = 891 IsAIX ? MCSymbolRefExpr::VK_PPC_L : MCSymbolRefExpr::VK_PPC_TOC_LO; 892 const MCExpr *Exp = 893 MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 894 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 895 EmitToStreamer(*OutStreamer, TmpInst); 896 return; 897 } 898 case PPC::ADDItocL: { 899 // Transform %xd = ADDItocL %xs, @sym 900 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 901 902 // Change the opcode to ADDI8. If the global address is external, then 903 // generate a TOC entry and reference that. Otherwise, reference the 904 // symbol directly. 905 TmpInst.setOpcode(PPC::ADDI8); 906 907 const MachineOperand &MO = MI->getOperand(2); 908 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL."); 909 910 LLVM_DEBUG(assert( 911 !(MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal())) && 912 "Interposable definitions must use indirect access.")); 913 914 const MCExpr *Exp = 915 MCSymbolRefExpr::create(getMCSymbolForTOCPseudoMO(MO), 916 MCSymbolRefExpr::VK_PPC_TOC_LO, OutContext); 917 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 918 EmitToStreamer(*OutStreamer, TmpInst); 919 return; 920 } 921 case PPC::ADDISgotTprelHA: { 922 // Transform: %xd = ADDISgotTprelHA %x2, @sym 923 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 924 assert(IsPPC64 && "Not supported for 32-bit PowerPC"); 925 const MachineOperand &MO = MI->getOperand(2); 926 const GlobalValue *GValue = MO.getGlobal(); 927 MCSymbol *MOSymbol = getSymbol(GValue); 928 const MCExpr *SymGotTprel = 929 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 930 OutContext); 931 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 932 .addReg(MI->getOperand(0).getReg()) 933 .addReg(MI->getOperand(1).getReg()) 934 .addExpr(SymGotTprel)); 935 return; 936 } 937 case PPC::LDgotTprelL: 938 case PPC::LDgotTprelL32: { 939 // Transform %xd = LDgotTprelL @sym, %xs 940 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 941 942 // Change the opcode to LD. 943 TmpInst.setOpcode(IsPPC64 ? PPC::LD : PPC::LWZ); 944 const MachineOperand &MO = MI->getOperand(1); 945 const GlobalValue *GValue = MO.getGlobal(); 946 MCSymbol *MOSymbol = getSymbol(GValue); 947 const MCExpr *Exp = MCSymbolRefExpr::create( 948 MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO 949 : MCSymbolRefExpr::VK_PPC_GOT_TPREL, 950 OutContext); 951 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 952 EmitToStreamer(*OutStreamer, TmpInst); 953 return; 954 } 955 956 case PPC::PPC32PICGOT: { 957 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 958 MCSymbol *GOTRef = OutContext.createTempSymbol(); 959 MCSymbol *NextInstr = OutContext.createTempSymbol(); 960 961 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 962 // FIXME: We would like an efficient form for this, so we don't have to do 963 // a lot of extra uniquing. 964 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 965 const MCExpr *OffsExpr = 966 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 967 MCSymbolRefExpr::create(GOTRef, OutContext), 968 OutContext); 969 OutStreamer->EmitLabel(GOTRef); 970 OutStreamer->EmitValue(OffsExpr, 4); 971 OutStreamer->EmitLabel(NextInstr); 972 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 973 .addReg(MI->getOperand(0).getReg())); 974 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 975 .addReg(MI->getOperand(1).getReg()) 976 .addImm(0) 977 .addReg(MI->getOperand(0).getReg())); 978 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 979 .addReg(MI->getOperand(0).getReg()) 980 .addReg(MI->getOperand(1).getReg()) 981 .addReg(MI->getOperand(0).getReg())); 982 return; 983 } 984 case PPC::PPC32GOT: { 985 MCSymbol *GOTSymbol = 986 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 987 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 988 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 989 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 990 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 991 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 992 .addReg(MI->getOperand(0).getReg()) 993 .addExpr(SymGotTlsL)); 994 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 995 .addReg(MI->getOperand(0).getReg()) 996 .addReg(MI->getOperand(0).getReg()) 997 .addExpr(SymGotTlsHA)); 998 return; 999 } 1000 case PPC::ADDIStlsgdHA: { 1001 // Transform: %xd = ADDIStlsgdHA %x2, @sym 1002 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 1003 assert(IsPPC64 && "Not supported for 32-bit PowerPC"); 1004 const MachineOperand &MO = MI->getOperand(2); 1005 const GlobalValue *GValue = MO.getGlobal(); 1006 MCSymbol *MOSymbol = getSymbol(GValue); 1007 const MCExpr *SymGotTlsGD = 1008 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 1009 OutContext); 1010 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 1011 .addReg(MI->getOperand(0).getReg()) 1012 .addReg(MI->getOperand(1).getReg()) 1013 .addExpr(SymGotTlsGD)); 1014 return; 1015 } 1016 case PPC::ADDItlsgdL: 1017 // Transform: %xd = ADDItlsgdL %xs, @sym 1018 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l 1019 case PPC::ADDItlsgdL32: { 1020 // Transform: %rd = ADDItlsgdL32 %rs, @sym 1021 // Into: %rd = ADDI %rs, sym@got@tlsgd 1022 const MachineOperand &MO = MI->getOperand(2); 1023 const GlobalValue *GValue = MO.getGlobal(); 1024 MCSymbol *MOSymbol = getSymbol(GValue); 1025 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 1026 MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 1027 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 1028 OutContext); 1029 EmitToStreamer(*OutStreamer, 1030 MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI) 1031 .addReg(MI->getOperand(0).getReg()) 1032 .addReg(MI->getOperand(1).getReg()) 1033 .addExpr(SymGotTlsGD)); 1034 return; 1035 } 1036 case PPC::GETtlsADDR: 1037 // Transform: %x3 = GETtlsADDR %x3, @sym 1038 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 1039 case PPC::GETtlsADDR32: { 1040 // Transform: %r3 = GETtlsADDR32 %r3, @sym 1041 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 1042 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 1043 return; 1044 } 1045 case PPC::ADDIStlsldHA: { 1046 // Transform: %xd = ADDIStlsldHA %x2, @sym 1047 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha 1048 assert(IsPPC64 && "Not supported for 32-bit PowerPC"); 1049 const MachineOperand &MO = MI->getOperand(2); 1050 const GlobalValue *GValue = MO.getGlobal(); 1051 MCSymbol *MOSymbol = getSymbol(GValue); 1052 const MCExpr *SymGotTlsLD = 1053 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 1054 OutContext); 1055 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 1056 .addReg(MI->getOperand(0).getReg()) 1057 .addReg(MI->getOperand(1).getReg()) 1058 .addExpr(SymGotTlsLD)); 1059 return; 1060 } 1061 case PPC::ADDItlsldL: 1062 // Transform: %xd = ADDItlsldL %xs, @sym 1063 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l 1064 case PPC::ADDItlsldL32: { 1065 // Transform: %rd = ADDItlsldL32 %rs, @sym 1066 // Into: %rd = ADDI %rs, sym@got@tlsld 1067 const MachineOperand &MO = MI->getOperand(2); 1068 const GlobalValue *GValue = MO.getGlobal(); 1069 MCSymbol *MOSymbol = getSymbol(GValue); 1070 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 1071 MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 1072 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 1073 OutContext); 1074 EmitToStreamer(*OutStreamer, 1075 MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI) 1076 .addReg(MI->getOperand(0).getReg()) 1077 .addReg(MI->getOperand(1).getReg()) 1078 .addExpr(SymGotTlsLD)); 1079 return; 1080 } 1081 case PPC::GETtlsldADDR: 1082 // Transform: %x3 = GETtlsldADDR %x3, @sym 1083 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 1084 case PPC::GETtlsldADDR32: { 1085 // Transform: %r3 = GETtlsldADDR32 %r3, @sym 1086 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 1087 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 1088 return; 1089 } 1090 case PPC::ADDISdtprelHA: 1091 // Transform: %xd = ADDISdtprelHA %xs, @sym 1092 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha 1093 case PPC::ADDISdtprelHA32: { 1094 // Transform: %rd = ADDISdtprelHA32 %rs, @sym 1095 // Into: %rd = ADDIS %rs, sym@dtprel@ha 1096 const MachineOperand &MO = MI->getOperand(2); 1097 const GlobalValue *GValue = MO.getGlobal(); 1098 MCSymbol *MOSymbol = getSymbol(GValue); 1099 const MCExpr *SymDtprel = 1100 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 1101 OutContext); 1102 EmitToStreamer( 1103 *OutStreamer, 1104 MCInstBuilder(IsPPC64 ? PPC::ADDIS8 : PPC::ADDIS) 1105 .addReg(MI->getOperand(0).getReg()) 1106 .addReg(MI->getOperand(1).getReg()) 1107 .addExpr(SymDtprel)); 1108 return; 1109 } 1110 case PPC::ADDIdtprelL: 1111 // Transform: %xd = ADDIdtprelL %xs, @sym 1112 // Into: %xd = ADDI8 %xs, sym@dtprel@l 1113 case PPC::ADDIdtprelL32: { 1114 // Transform: %rd = ADDIdtprelL32 %rs, @sym 1115 // Into: %rd = ADDI %rs, sym@dtprel@l 1116 const MachineOperand &MO = MI->getOperand(2); 1117 const GlobalValue *GValue = MO.getGlobal(); 1118 MCSymbol *MOSymbol = getSymbol(GValue); 1119 const MCExpr *SymDtprel = 1120 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 1121 OutContext); 1122 EmitToStreamer(*OutStreamer, 1123 MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI) 1124 .addReg(MI->getOperand(0).getReg()) 1125 .addReg(MI->getOperand(1).getReg()) 1126 .addExpr(SymDtprel)); 1127 return; 1128 } 1129 case PPC::MFOCRF: 1130 case PPC::MFOCRF8: 1131 if (!Subtarget->hasMFOCRF()) { 1132 // Transform: %r3 = MFOCRF %cr7 1133 // Into: %r3 = MFCR ;; cr7 1134 unsigned NewOpcode = 1135 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 1136 OutStreamer->AddComment(PPCInstPrinter:: 1137 getRegisterName(MI->getOperand(1).getReg())); 1138 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1139 .addReg(MI->getOperand(0).getReg())); 1140 return; 1141 } 1142 break; 1143 case PPC::MTOCRF: 1144 case PPC::MTOCRF8: 1145 if (!Subtarget->hasMFOCRF()) { 1146 // Transform: %cr7 = MTOCRF %r3 1147 // Into: MTCRF mask, %r3 ;; cr7 1148 unsigned NewOpcode = 1149 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 1150 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 1151 ->getEncodingValue(MI->getOperand(0).getReg()); 1152 OutStreamer->AddComment(PPCInstPrinter:: 1153 getRegisterName(MI->getOperand(0).getReg())); 1154 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1155 .addImm(Mask) 1156 .addReg(MI->getOperand(1).getReg())); 1157 return; 1158 } 1159 break; 1160 case PPC::LD: 1161 case PPC::STD: 1162 case PPC::LWA_32: 1163 case PPC::LWA: { 1164 // Verify alignment is legal, so we don't create relocations 1165 // that can't be supported. 1166 // FIXME: This test is currently disabled for Darwin. The test 1167 // suite shows a handful of test cases that fail this check for 1168 // Darwin. Those need to be investigated before this sanity test 1169 // can be enabled for those subtargets. 1170 if (!IsDarwin) { 1171 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1172 const MachineOperand &MO = MI->getOperand(OpNum); 1173 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1174 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1175 } 1176 // Now process the instruction normally. 1177 break; 1178 } 1179 } 1180 1181 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin); 1182 EmitToStreamer(*OutStreamer, TmpInst); 1183 } 1184 1185 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) { 1186 if (!Subtarget->isPPC64()) 1187 return PPCAsmPrinter::EmitInstruction(MI); 1188 1189 switch (MI->getOpcode()) { 1190 default: 1191 return PPCAsmPrinter::EmitInstruction(MI); 1192 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: { 1193 // .begin: 1194 // b .end # lis 0, FuncId[16..32] 1195 // nop # li 0, FuncId[0..15] 1196 // std 0, -8(1) 1197 // mflr 0 1198 // bl __xray_FunctionEntry 1199 // mtlr 0 1200 // .end: 1201 // 1202 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1203 // of instructions change. 1204 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1205 MCSymbol *EndOfSled = OutContext.createTempSymbol(); 1206 OutStreamer->EmitLabel(BeginOfSled); 1207 EmitToStreamer(*OutStreamer, 1208 MCInstBuilder(PPC::B).addExpr( 1209 MCSymbolRefExpr::create(EndOfSled, OutContext))); 1210 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1211 EmitToStreamer( 1212 *OutStreamer, 1213 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1214 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1215 EmitToStreamer(*OutStreamer, 1216 MCInstBuilder(PPC::BL8_NOP) 1217 .addExpr(MCSymbolRefExpr::create( 1218 OutContext.getOrCreateSymbol("__xray_FunctionEntry"), 1219 OutContext))); 1220 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1221 OutStreamer->EmitLabel(EndOfSled); 1222 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER); 1223 break; 1224 } 1225 case TargetOpcode::PATCHABLE_RET: { 1226 unsigned RetOpcode = MI->getOperand(0).getImm(); 1227 MCInst RetInst; 1228 RetInst.setOpcode(RetOpcode); 1229 for (const auto &MO : 1230 make_range(std::next(MI->operands_begin()), MI->operands_end())) { 1231 MCOperand MCOp; 1232 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false)) 1233 RetInst.addOperand(MCOp); 1234 } 1235 1236 bool IsConditional; 1237 if (RetOpcode == PPC::BCCLR) { 1238 IsConditional = true; 1239 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 || 1240 RetOpcode == PPC::TCRETURNai8) { 1241 break; 1242 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) { 1243 IsConditional = false; 1244 } else { 1245 EmitToStreamer(*OutStreamer, RetInst); 1246 break; 1247 } 1248 1249 MCSymbol *FallthroughLabel; 1250 if (IsConditional) { 1251 // Before: 1252 // bgtlr cr0 1253 // 1254 // After: 1255 // ble cr0, .end 1256 // .p2align 3 1257 // .begin: 1258 // blr # lis 0, FuncId[16..32] 1259 // nop # li 0, FuncId[0..15] 1260 // std 0, -8(1) 1261 // mflr 0 1262 // bl __xray_FunctionExit 1263 // mtlr 0 1264 // blr 1265 // .end: 1266 // 1267 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1268 // of instructions change. 1269 FallthroughLabel = OutContext.createTempSymbol(); 1270 EmitToStreamer( 1271 *OutStreamer, 1272 MCInstBuilder(PPC::BCC) 1273 .addImm(PPC::InvertPredicate( 1274 static_cast<PPC::Predicate>(MI->getOperand(1).getImm()))) 1275 .addReg(MI->getOperand(2).getReg()) 1276 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext))); 1277 RetInst = MCInst(); 1278 RetInst.setOpcode(PPC::BLR8); 1279 } 1280 // .p2align 3 1281 // .begin: 1282 // b(lr)? # lis 0, FuncId[16..32] 1283 // nop # li 0, FuncId[0..15] 1284 // std 0, -8(1) 1285 // mflr 0 1286 // bl __xray_FunctionExit 1287 // mtlr 0 1288 // b(lr)? 1289 // 1290 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1291 // of instructions change. 1292 OutStreamer->EmitCodeAlignment(8); 1293 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1294 OutStreamer->EmitLabel(BeginOfSled); 1295 EmitToStreamer(*OutStreamer, RetInst); 1296 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1297 EmitToStreamer( 1298 *OutStreamer, 1299 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1300 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1301 EmitToStreamer(*OutStreamer, 1302 MCInstBuilder(PPC::BL8_NOP) 1303 .addExpr(MCSymbolRefExpr::create( 1304 OutContext.getOrCreateSymbol("__xray_FunctionExit"), 1305 OutContext))); 1306 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1307 EmitToStreamer(*OutStreamer, RetInst); 1308 if (IsConditional) 1309 OutStreamer->EmitLabel(FallthroughLabel); 1310 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT); 1311 break; 1312 } 1313 case TargetOpcode::PATCHABLE_FUNCTION_EXIT: 1314 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted"); 1315 case TargetOpcode::PATCHABLE_TAIL_CALL: 1316 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a 1317 // normal function exit from a tail exit. 1318 llvm_unreachable("Tail call is handled in the normal case. See comments " 1319 "around this assert."); 1320 } 1321 } 1322 1323 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1324 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1325 PPCTargetStreamer *TS = 1326 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1327 1328 if (TS) 1329 TS->emitAbiVersion(2); 1330 } 1331 1332 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1333 !isPositionIndependent()) 1334 return AsmPrinter::EmitStartOfAsmFile(M); 1335 1336 if (M.getPICLevel() == PICLevel::SmallPIC) 1337 return AsmPrinter::EmitStartOfAsmFile(M); 1338 1339 OutStreamer->SwitchSection(OutContext.getELFSection( 1340 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1341 1342 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1343 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1344 1345 OutStreamer->EmitLabel(CurrentPos); 1346 1347 // The GOT pointer points to the middle of the GOT, in order to reference the 1348 // entire 64kB range. 0x8000 is the midpoint. 1349 const MCExpr *tocExpr = 1350 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1351 MCConstantExpr::create(0x8000, OutContext), 1352 OutContext); 1353 1354 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1355 1356 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1357 } 1358 1359 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1360 // linux/ppc32 - Normal entry label. 1361 if (!Subtarget->isPPC64() && 1362 (!isPositionIndependent() || 1363 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC)) 1364 return AsmPrinter::EmitFunctionEntryLabel(); 1365 1366 if (!Subtarget->isPPC64()) { 1367 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1368 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { 1369 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1370 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1371 OutStreamer->EmitLabel(RelocSymbol); 1372 1373 const MCExpr *OffsExpr = 1374 MCBinaryExpr::createSub( 1375 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1376 OutContext), 1377 MCSymbolRefExpr::create(PICBase, OutContext), 1378 OutContext); 1379 OutStreamer->EmitValue(OffsExpr, 4); 1380 OutStreamer->EmitLabel(CurrentFnSym); 1381 return; 1382 } else 1383 return AsmPrinter::EmitFunctionEntryLabel(); 1384 } 1385 1386 // ELFv2 ABI - Normal entry label. 1387 if (Subtarget->isELFv2ABI()) { 1388 // In the Large code model, we allow arbitrary displacements between 1389 // the text section and its associated TOC section. We place the 1390 // full 8-byte offset to the TOC in memory immediately preceding 1391 // the function global entry point. 1392 if (TM.getCodeModel() == CodeModel::Large 1393 && !MF->getRegInfo().use_empty(PPC::X2)) { 1394 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1395 1396 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1397 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1398 const MCExpr *TOCDeltaExpr = 1399 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1400 MCSymbolRefExpr::create(GlobalEPSymbol, 1401 OutContext), 1402 OutContext); 1403 1404 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1405 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1406 } 1407 return AsmPrinter::EmitFunctionEntryLabel(); 1408 } 1409 1410 // Emit an official procedure descriptor. 1411 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1412 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1413 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1414 OutStreamer->SwitchSection(Section); 1415 OutStreamer->EmitLabel(CurrentFnSym); 1416 OutStreamer->EmitValueToAlignment(8); 1417 MCSymbol *Symbol1 = CurrentFnSymForSize; 1418 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1419 // entry point. 1420 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1421 8 /*size*/); 1422 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1423 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1424 OutStreamer->EmitValue( 1425 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1426 8/*size*/); 1427 // Emit a null environment pointer. 1428 OutStreamer->EmitIntValue(0, 8 /* size */); 1429 OutStreamer->SwitchSection(Current.first, Current.second); 1430 } 1431 1432 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1433 const DataLayout &DL = getDataLayout(); 1434 1435 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1436 1437 PPCTargetStreamer &TS = 1438 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1439 1440 if (!TOC.empty()) { 1441 MCSectionELF *Section; 1442 1443 if (isPPC64) 1444 Section = OutStreamer->getContext().getELFSection( 1445 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1446 else 1447 Section = OutStreamer->getContext().getELFSection( 1448 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1449 OutStreamer->SwitchSection(Section); 1450 1451 for (const auto &TOCMapPair : TOC) { 1452 const MCSymbol *const TOCEntryTarget = TOCMapPair.first; 1453 MCSymbol *const TOCEntryLabel = TOCMapPair.second; 1454 1455 OutStreamer->EmitLabel(TOCEntryLabel); 1456 if (isPPC64) { 1457 TS.emitTCEntry(*TOCEntryTarget); 1458 } else { 1459 OutStreamer->EmitValueToAlignment(4); 1460 OutStreamer->EmitSymbolValue(TOCEntryTarget, 4); 1461 } 1462 } 1463 } 1464 1465 return AsmPrinter::doFinalization(M); 1466 } 1467 1468 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1469 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1470 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1471 // provide two entry points. The ABI guarantees that when calling the 1472 // local entry point, r2 is set up by the caller to contain the TOC base 1473 // for this function, and when calling the global entry point, r12 is set 1474 // up by the caller to hold the address of the global entry point. We 1475 // thus emit a prefix sequence along the following lines: 1476 // 1477 // func: 1478 // .Lfunc_gepNN: 1479 // # global entry point 1480 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1481 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1482 // .Lfunc_lepNN: 1483 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1484 // # local entry point, followed by function body 1485 // 1486 // For the Large code model, we create 1487 // 1488 // .Lfunc_tocNN: 1489 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1490 // func: 1491 // .Lfunc_gepNN: 1492 // # global entry point 1493 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1494 // add r2,r2,r12 1495 // .Lfunc_lepNN: 1496 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1497 // # local entry point, followed by function body 1498 // 1499 // This ensures we have r2 set up correctly while executing the function 1500 // body, no matter which entry point is called. 1501 if (Subtarget->isELFv2ABI() 1502 // Only do all that if the function uses r2 in the first place. 1503 && !MF->getRegInfo().use_empty(PPC::X2)) { 1504 // Note: The logic here must be synchronized with the code in the 1505 // branch-selection pass which sets the offset of the first block in the 1506 // function. This matters because it affects the alignment. 1507 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1508 1509 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1510 OutStreamer->EmitLabel(GlobalEntryLabel); 1511 const MCSymbolRefExpr *GlobalEntryLabelExp = 1512 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1513 1514 if (TM.getCodeModel() != CodeModel::Large) { 1515 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1516 const MCExpr *TOCDeltaExpr = 1517 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1518 GlobalEntryLabelExp, OutContext); 1519 1520 const MCExpr *TOCDeltaHi = 1521 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1522 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1523 .addReg(PPC::X2) 1524 .addReg(PPC::X12) 1525 .addExpr(TOCDeltaHi)); 1526 1527 const MCExpr *TOCDeltaLo = 1528 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1529 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1530 .addReg(PPC::X2) 1531 .addReg(PPC::X2) 1532 .addExpr(TOCDeltaLo)); 1533 } else { 1534 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1535 const MCExpr *TOCOffsetDeltaExpr = 1536 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1537 GlobalEntryLabelExp, OutContext); 1538 1539 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1540 .addReg(PPC::X2) 1541 .addExpr(TOCOffsetDeltaExpr) 1542 .addReg(PPC::X12)); 1543 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1544 .addReg(PPC::X2) 1545 .addReg(PPC::X2) 1546 .addReg(PPC::X12)); 1547 } 1548 1549 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1550 OutStreamer->EmitLabel(LocalEntryLabel); 1551 const MCSymbolRefExpr *LocalEntryLabelExp = 1552 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1553 const MCExpr *LocalOffsetExp = 1554 MCBinaryExpr::createSub(LocalEntryLabelExp, 1555 GlobalEntryLabelExp, OutContext); 1556 1557 PPCTargetStreamer *TS = 1558 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1559 1560 if (TS) 1561 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1562 } 1563 } 1564 1565 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1566 /// directive. 1567 /// 1568 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1569 // Only the 64-bit target requires a traceback table. For now, 1570 // we only emit the word of zeroes that GDB requires to find 1571 // the end of the function, and zeroes for the eight-byte 1572 // mandatory fields. 1573 // FIXME: We should fill in the eight-byte mandatory fields as described in 1574 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1575 // currently make use of these fields). 1576 if (Subtarget->isPPC64()) { 1577 OutStreamer->EmitIntValue(0, 4/*size*/); 1578 OutStreamer->EmitIntValue(0, 8/*size*/); 1579 } 1580 } 1581 1582 void PPCAIXAsmPrinter::SetupMachineFunction(MachineFunction &MF) { 1583 // Get the function descriptor symbol. 1584 CurrentFnDescSym = getSymbol(&MF.getFunction()); 1585 // Set the containing csect. 1586 MCSectionXCOFF *FnDescSec = OutStreamer->getContext().getXCOFFSection( 1587 CurrentFnDescSym->getName(), XCOFF::XMC_DS, XCOFF::XTY_SD, 1588 XCOFF::C_HIDEXT, SectionKind::getData()); 1589 cast<MCSymbolXCOFF>(CurrentFnDescSym)->setContainingCsect(FnDescSec); 1590 1591 return AsmPrinter::SetupMachineFunction(MF); 1592 } 1593 1594 void PPCAIXAsmPrinter::ValidateGV(const GlobalVariable *GV) { 1595 // Early error checking limiting what is supported. 1596 if (GV->isThreadLocal()) 1597 report_fatal_error("Thread local not yet supported on AIX."); 1598 1599 if (GV->hasSection()) 1600 report_fatal_error("Custom section for Data not yet supported."); 1601 1602 if (GV->hasComdat()) 1603 report_fatal_error("COMDAT not yet supported by AIX."); 1604 } 1605 1606 const MCExpr *PPCAIXAsmPrinter::lowerConstant(const Constant *CV) { 1607 if (const Function *F = dyn_cast<Function>(CV)) { 1608 MCSymbolXCOFF *FSym = cast<MCSymbolXCOFF>(getSymbol(F)); 1609 if (!FSym->hasContainingCsect()) { 1610 const XCOFF::StorageClass SC = 1611 F->isDeclaration() 1612 ? TargetLoweringObjectFileXCOFF::getStorageClassForGlobal(F) 1613 : XCOFF::C_HIDEXT; 1614 MCSectionXCOFF *Csect = OutStreamer->getContext().getXCOFFSection( 1615 FSym->getName(), XCOFF::XMC_DS, 1616 F->isDeclaration() ? XCOFF::XTY_ER : XCOFF::XTY_SD, SC, 1617 SectionKind::getData()); 1618 FSym->setContainingCsect(Csect); 1619 } 1620 return MCSymbolRefExpr::create( 1621 FSym->getContainingCsect()->getQualNameSymbol(), OutContext); 1622 } 1623 return PPCAsmPrinter::lowerConstant(CV); 1624 } 1625 1626 void PPCAIXAsmPrinter::EmitGlobalVariable(const GlobalVariable *GV) { 1627 ValidateGV(GV); 1628 1629 // External global variables are already handled. 1630 if (!GV->hasInitializer()) 1631 return; 1632 1633 // Create the symbol, set its storage class. 1634 MCSymbolXCOFF *GVSym = cast<MCSymbolXCOFF>(getSymbol(GV)); 1635 GVSym->setStorageClass( 1636 TargetLoweringObjectFileXCOFF::getStorageClassForGlobal(GV)); 1637 1638 SectionKind GVKind = getObjFileLowering().getKindForGlobal(GV, TM); 1639 if ((!GVKind.isGlobalWriteableData() && !GVKind.isReadOnly()) || 1640 GVKind.isMergeable2ByteCString() || GVKind.isMergeable4ByteCString()) 1641 report_fatal_error("Encountered a global variable kind that is " 1642 "not supported yet."); 1643 1644 // Create the containing csect and switch to it. 1645 MCSectionXCOFF *Csect = cast<MCSectionXCOFF>( 1646 getObjFileLowering().SectionForGlobal(GV, GVKind, TM)); 1647 OutStreamer->SwitchSection(Csect); 1648 GVSym->setContainingCsect(Csect); 1649 1650 const DataLayout &DL = GV->getParent()->getDataLayout(); 1651 1652 // Handle common symbols. 1653 if (GVKind.isCommon() || GVKind.isBSSLocal()) { 1654 unsigned Align = 1655 GV->getAlignment() ? GV->getAlignment() : DL.getPreferredAlignment(GV); 1656 uint64_t Size = DL.getTypeAllocSize(GV->getType()->getElementType()); 1657 1658 if (GVKind.isBSSLocal()) 1659 OutStreamer->EmitXCOFFLocalCommonSymbol( 1660 GVSym, Size, Csect->getQualNameSymbol(), Align); 1661 else 1662 OutStreamer->EmitCommonSymbol(Csect->getQualNameSymbol(), Size, Align); 1663 return; 1664 } 1665 1666 MCSymbol *EmittedInitSym = GVSym; 1667 EmitLinkage(GV, EmittedInitSym); 1668 EmitAlignment(getGVAlignment(GV, DL), GV); 1669 OutStreamer->EmitLabel(EmittedInitSym); 1670 EmitGlobalConstant(GV->getParent()->getDataLayout(), GV->getInitializer()); 1671 } 1672 1673 void PPCAIXAsmPrinter::EmitFunctionDescriptor() { 1674 const DataLayout &DL = getDataLayout(); 1675 const unsigned PointerSize = DL.getPointerSizeInBits() == 64 ? 8 : 4; 1676 1677 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1678 // Emit function descriptor. 1679 OutStreamer->SwitchSection( 1680 cast<MCSymbolXCOFF>(CurrentFnDescSym)->getContainingCsect()); 1681 OutStreamer->EmitLabel(CurrentFnDescSym); 1682 // Emit function entry point address. 1683 OutStreamer->EmitValue(MCSymbolRefExpr::create(CurrentFnSym, OutContext), 1684 PointerSize); 1685 // Emit TOC base address. 1686 const MCSectionXCOFF *TOCBaseSec = OutStreamer->getContext().getXCOFFSection( 1687 StringRef("TOC"), XCOFF::XMC_TC0, XCOFF::XTY_SD, XCOFF::C_HIDEXT, 1688 SectionKind::getData()); 1689 const MCSymbol *TOCBaseSym = TOCBaseSec->getQualNameSymbol(); 1690 OutStreamer->EmitValue(MCSymbolRefExpr::create(TOCBaseSym, OutContext), 1691 PointerSize); 1692 // Emit a null environment pointer. 1693 OutStreamer->EmitIntValue(0, PointerSize); 1694 1695 OutStreamer->SwitchSection(Current.first, Current.second); 1696 } 1697 1698 void PPCAIXAsmPrinter::EmitEndOfAsmFile(Module &M) { 1699 // If there are no functions in this module, we will never need to reference 1700 // the TOC base. 1701 if (M.empty()) 1702 return; 1703 1704 // Emit TOC base. 1705 MCSectionXCOFF *TOCBaseSection = OutStreamer->getContext().getXCOFFSection( 1706 StringRef("TOC"), XCOFF::XMC_TC0, XCOFF::XTY_SD, XCOFF::C_HIDEXT, 1707 SectionKind::getData()); 1708 // The TOC-base always has 0 size, but 4 byte alignment. 1709 TOCBaseSection->setAlignment(Align(4)); 1710 // Switch to section to emit TOC base. 1711 OutStreamer->SwitchSection(TOCBaseSection); 1712 1713 PPCTargetStreamer &TS = 1714 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1715 1716 for (auto &I : TOC) { 1717 // Setup the csect for the current TC entry. 1718 MCSectionXCOFF *TCEntry = OutStreamer->getContext().getXCOFFSection( 1719 cast<MCSymbolXCOFF>(I.first)->getUnqualifiedName(), XCOFF::XMC_TC, 1720 XCOFF::XTY_SD, XCOFF::C_HIDEXT, SectionKind::getData()); 1721 cast<MCSymbolXCOFF>(I.second)->setContainingCsect(TCEntry); 1722 OutStreamer->SwitchSection(TCEntry); 1723 1724 OutStreamer->EmitLabel(I.second); 1725 TS.emitTCEntry(*I.first); 1726 } 1727 } 1728 1729 MCSymbol * 1730 PPCAIXAsmPrinter::getMCSymbolForTOCPseudoMO(const MachineOperand &MO) { 1731 const GlobalObject *GO = nullptr; 1732 1733 // If the MO is a function or certain kind of globals, we want to make sure to 1734 // refer to the csect symbol, otherwise we can just do the default handling. 1735 if (MO.getType() != MachineOperand::MO_GlobalAddress || 1736 !(GO = dyn_cast<const GlobalObject>(MO.getGlobal()))) 1737 return PPCAsmPrinter::getMCSymbolForTOCPseudoMO(MO); 1738 1739 // Do an early error check for globals we don't support. This will go away 1740 // eventually. 1741 const auto *GV = dyn_cast<const GlobalVariable>(GO); 1742 if (GV) { 1743 ValidateGV(GV); 1744 } 1745 1746 MCSymbolXCOFF *XSym = cast<MCSymbolXCOFF>(getSymbol(GO)); 1747 1748 // If the global object is a global variable without initializer or is a 1749 // declaration of a function, then XSym is an external referenced symbol. 1750 // Hence we may need to explictly create a MCSectionXCOFF for it so that we 1751 // can return its symbol later. 1752 if (GO->isDeclaration()) { 1753 if (!XSym->hasContainingCsect()) { 1754 // Make sure the storage class is set. 1755 const XCOFF::StorageClass SC = 1756 TargetLoweringObjectFileXCOFF::getStorageClassForGlobal(GO); 1757 XSym->setStorageClass(SC); 1758 1759 MCSectionXCOFF *Csect = OutStreamer->getContext().getXCOFFSection( 1760 XSym->getName(), isa<Function>(GO) ? XCOFF::XMC_DS : XCOFF::XMC_UA, 1761 XCOFF::XTY_ER, SC, SectionKind::getMetadata()); 1762 XSym->setContainingCsect(Csect); 1763 } 1764 1765 return XSym->getContainingCsect()->getQualNameSymbol(); 1766 } 1767 1768 // Handle initialized global variables and defined functions. 1769 SectionKind GOKind = getObjFileLowering().getKindForGlobal(GO, TM); 1770 1771 if (GOKind.isText()) { 1772 // If the MO is a function, we want to make sure to refer to the function 1773 // descriptor csect. 1774 return OutStreamer->getContext() 1775 .getXCOFFSection(XSym->getName(), XCOFF::XMC_DS, XCOFF::XTY_SD, 1776 XCOFF::C_HIDEXT, SectionKind::getData()) 1777 ->getQualNameSymbol(); 1778 } else if (GOKind.isCommon() || GOKind.isBSSLocal()) { 1779 // If the operand is a common then we should refer to the csect symbol. 1780 return cast<MCSectionXCOFF>( 1781 getObjFileLowering().SectionForGlobal(GO, GOKind, TM)) 1782 ->getQualNameSymbol(); 1783 } 1784 1785 // Other global variables are refered to by labels inside of a single csect, 1786 // so refer to the label directly. 1787 return getSymbol(GV); 1788 } 1789 1790 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1791 /// for a MachineFunction to the given output stream, in a format that the 1792 /// Darwin assembler can deal with. 1793 /// 1794 static AsmPrinter * 1795 createPPCAsmPrinterPass(TargetMachine &tm, 1796 std::unique_ptr<MCStreamer> &&Streamer) { 1797 if (tm.getTargetTriple().isOSAIX()) 1798 return new PPCAIXAsmPrinter(tm, std::move(Streamer)); 1799 1800 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1801 } 1802 1803 // Force static initialization. 1804 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCAsmPrinter() { 1805 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), 1806 createPPCAsmPrinterPass); 1807 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), 1808 createPPCAsmPrinterPass); 1809 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), 1810 createPPCAsmPrinterPass); 1811 } 1812