1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains a printer that converts from our internal representation 10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 11 // the output mechanism used by `llc'. 12 // 13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "MCTargetDesc/PPCInstPrinter.h" 19 #include "MCTargetDesc/PPCMCExpr.h" 20 #include "MCTargetDesc/PPCMCTargetDesc.h" 21 #include "MCTargetDesc/PPCPredicates.h" 22 #include "PPC.h" 23 #include "PPCInstrInfo.h" 24 #include "PPCMachineFunctionInfo.h" 25 #include "PPCSubtarget.h" 26 #include "PPCTargetMachine.h" 27 #include "PPCTargetStreamer.h" 28 #include "TargetInfo/PowerPCTargetInfo.h" 29 #include "llvm/ADT/MapVector.h" 30 #include "llvm/ADT/StringRef.h" 31 #include "llvm/ADT/Triple.h" 32 #include "llvm/ADT/Twine.h" 33 #include "llvm/BinaryFormat/ELF.h" 34 #include "llvm/BinaryFormat/MachO.h" 35 #include "llvm/CodeGen/AsmPrinter.h" 36 #include "llvm/CodeGen/MachineBasicBlock.h" 37 #include "llvm/CodeGen/MachineFunction.h" 38 #include "llvm/CodeGen/MachineInstr.h" 39 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 40 #include "llvm/CodeGen/MachineOperand.h" 41 #include "llvm/CodeGen/MachineRegisterInfo.h" 42 #include "llvm/CodeGen/StackMaps.h" 43 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 44 #include "llvm/IR/DataLayout.h" 45 #include "llvm/IR/GlobalValue.h" 46 #include "llvm/IR/Module.h" 47 #include "llvm/MC/MCAsmInfo.h" 48 #include "llvm/MC/MCContext.h" 49 #include "llvm/MC/MCExpr.h" 50 #include "llvm/MC/MCInst.h" 51 #include "llvm/MC/MCInstBuilder.h" 52 #include "llvm/MC/MCSectionELF.h" 53 #include "llvm/MC/MCSectionMachO.h" 54 #include "llvm/MC/MCStreamer.h" 55 #include "llvm/MC/MCSymbol.h" 56 #include "llvm/MC/MCSymbolELF.h" 57 #include "llvm/MC/SectionKind.h" 58 #include "llvm/Support/Casting.h" 59 #include "llvm/Support/CodeGen.h" 60 #include "llvm/Support/Debug.h" 61 #include "llvm/Support/ErrorHandling.h" 62 #include "llvm/Support/TargetRegistry.h" 63 #include "llvm/Support/raw_ostream.h" 64 #include "llvm/Target/TargetMachine.h" 65 #include <algorithm> 66 #include <cassert> 67 #include <cstdint> 68 #include <memory> 69 #include <new> 70 71 using namespace llvm; 72 73 #define DEBUG_TYPE "asmprinter" 74 75 namespace { 76 77 class PPCAsmPrinter : public AsmPrinter { 78 protected: 79 MapVector<MCSymbol *, MCSymbol *> TOC; 80 const PPCSubtarget *Subtarget; 81 StackMaps SM; 82 83 public: 84 explicit PPCAsmPrinter(TargetMachine &TM, 85 std::unique_ptr<MCStreamer> Streamer) 86 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {} 87 88 StringRef getPassName() const override { return "PowerPC Assembly Printer"; } 89 90 MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym); 91 92 bool doInitialization(Module &M) override { 93 if (!TOC.empty()) 94 TOC.clear(); 95 return AsmPrinter::doInitialization(M); 96 } 97 98 void EmitInstruction(const MachineInstr *MI) override; 99 100 /// This function is for PrintAsmOperand and PrintAsmMemoryOperand, 101 /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only. 102 /// The \p MI would be INLINEASM ONLY. 103 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 104 105 void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) override; 106 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 107 const char *ExtraCode, raw_ostream &O) override; 108 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 109 const char *ExtraCode, raw_ostream &O) override; 110 111 void EmitEndOfAsmFile(Module &M) override; 112 113 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 114 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 115 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 116 bool runOnMachineFunction(MachineFunction &MF) override { 117 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 118 bool Changed = AsmPrinter::runOnMachineFunction(MF); 119 emitXRayTable(); 120 return Changed; 121 } 122 }; 123 124 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 125 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 126 public: 127 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 128 std::unique_ptr<MCStreamer> Streamer) 129 : PPCAsmPrinter(TM, std::move(Streamer)) {} 130 131 StringRef getPassName() const override { 132 return "Linux PPC Assembly Printer"; 133 } 134 135 bool doFinalization(Module &M) override; 136 void EmitStartOfAsmFile(Module &M) override; 137 138 void EmitFunctionEntryLabel() override; 139 140 void EmitFunctionBodyStart() override; 141 void EmitFunctionBodyEnd() override; 142 void EmitInstruction(const MachineInstr *MI) override; 143 }; 144 145 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac 146 /// OS X 147 class PPCDarwinAsmPrinter : public PPCAsmPrinter { 148 public: 149 explicit PPCDarwinAsmPrinter(TargetMachine &TM, 150 std::unique_ptr<MCStreamer> Streamer) 151 : PPCAsmPrinter(TM, std::move(Streamer)) {} 152 153 StringRef getPassName() const override { 154 return "Darwin PPC Assembly Printer"; 155 } 156 157 bool doFinalization(Module &M) override; 158 void EmitStartOfAsmFile(Module &M) override; 159 }; 160 161 class PPCAIXAsmPrinter : public PPCAsmPrinter { 162 public: 163 PPCAIXAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer) 164 : PPCAsmPrinter(TM, std::move(Streamer)) {} 165 166 StringRef getPassName() const override { return "AIX PPC Assembly Printer"; } 167 }; 168 169 } // end anonymous namespace 170 171 void PPCAsmPrinter::PrintSymbolOperand(const MachineOperand &MO, 172 raw_ostream &O) { 173 // Computing the address of a global symbol, not calling it. 174 const GlobalValue *GV = MO.getGlobal(); 175 MCSymbol *SymToPrint; 176 177 // External or weakly linked global variables need non-lazily-resolved stubs 178 if (Subtarget->hasLazyResolverStub(GV)) { 179 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr"); 180 MachineModuleInfoImpl::StubValueTy &StubSym = 181 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry( 182 SymToPrint); 183 if (!StubSym.getPointer()) 184 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV), 185 !GV->hasInternalLinkage()); 186 } else { 187 SymToPrint = getSymbol(GV); 188 } 189 190 SymToPrint->print(O, MAI); 191 192 printOffset(MO.getOffset(), O); 193 } 194 195 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 196 raw_ostream &O) { 197 const DataLayout &DL = getDataLayout(); 198 const MachineOperand &MO = MI->getOperand(OpNo); 199 200 switch (MO.getType()) { 201 case MachineOperand::MO_Register: { 202 // The MI is INLINEASM ONLY and UseVSXReg is always false. 203 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); 204 205 // Linux assembler (Others?) does not take register mnemonics. 206 // FIXME - What about special registers used in mfspr/mtspr? 207 if (!Subtarget->isDarwin()) 208 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 209 O << RegName; 210 return; 211 } 212 case MachineOperand::MO_Immediate: 213 O << MO.getImm(); 214 return; 215 216 case MachineOperand::MO_MachineBasicBlock: 217 MO.getMBB()->getSymbol()->print(O, MAI); 218 return; 219 case MachineOperand::MO_ConstantPoolIndex: 220 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 221 << MO.getIndex(); 222 return; 223 case MachineOperand::MO_BlockAddress: 224 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 225 return; 226 case MachineOperand::MO_GlobalAddress: { 227 PrintSymbolOperand(MO, O); 228 return; 229 } 230 231 default: 232 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 233 return; 234 } 235 } 236 237 /// PrintAsmOperand - Print out an operand for an inline asm expression. 238 /// 239 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 240 const char *ExtraCode, raw_ostream &O) { 241 // Does this asm operand have a single letter operand modifier? 242 if (ExtraCode && ExtraCode[0]) { 243 if (ExtraCode[1] != 0) return true; // Unknown modifier. 244 245 switch (ExtraCode[0]) { 246 default: 247 // See if this is a generic print operand 248 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O); 249 case 'L': // Write second word of DImode reference. 250 // Verify that this operand has two consecutive registers. 251 if (!MI->getOperand(OpNo).isReg() || 252 OpNo+1 == MI->getNumOperands() || 253 !MI->getOperand(OpNo+1).isReg()) 254 return true; 255 ++OpNo; // Return the high-part. 256 break; 257 case 'I': 258 // Write 'i' if an integer constant, otherwise nothing. Used to print 259 // addi vs add, etc. 260 if (MI->getOperand(OpNo).isImm()) 261 O << "i"; 262 return false; 263 case 'x': 264 if(!MI->getOperand(OpNo).isReg()) 265 return true; 266 // This operand uses VSX numbering. 267 // If the operand is a VMX register, convert it to a VSX register. 268 unsigned Reg = MI->getOperand(OpNo).getReg(); 269 if (PPCInstrInfo::isVRRegister(Reg)) 270 Reg = PPC::VSX32 + (Reg - PPC::V0); 271 else if (PPCInstrInfo::isVFRegister(Reg)) 272 Reg = PPC::VSX32 + (Reg - PPC::VF0); 273 const char *RegName; 274 RegName = PPCInstPrinter::getRegisterName(Reg); 275 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 276 O << RegName; 277 return false; 278 } 279 } 280 281 printOperand(MI, OpNo, O); 282 return false; 283 } 284 285 // At the moment, all inline asm memory operands are a single register. 286 // In any case, the output of this routine should always be just one 287 // assembler operand. 288 289 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 290 const char *ExtraCode, 291 raw_ostream &O) { 292 if (ExtraCode && ExtraCode[0]) { 293 if (ExtraCode[1] != 0) return true; // Unknown modifier. 294 295 switch (ExtraCode[0]) { 296 default: return true; // Unknown modifier. 297 case 'y': // A memory reference for an X-form instruction 298 { 299 const char *RegName = "r0"; 300 if (!Subtarget->isDarwin()) 301 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName); 302 O << RegName << ", "; 303 printOperand(MI, OpNo, O); 304 return false; 305 } 306 case 'U': // Print 'u' for update form. 307 case 'X': // Print 'x' for indexed form. 308 { 309 // FIXME: Currently for PowerPC memory operands are always loaded 310 // into a register, so we never get an update or indexed form. 311 // This is bad even for offset forms, since even if we know we 312 // have a value in -16(r1), we will generate a load into r<n> 313 // and then load from 0(r<n>). Until that issue is fixed, 314 // tolerate 'U' and 'X' but don't output anything. 315 assert(MI->getOperand(OpNo).isReg()); 316 return false; 317 } 318 } 319 } 320 321 assert(MI->getOperand(OpNo).isReg()); 322 O << "0("; 323 printOperand(MI, OpNo, O); 324 O << ")"; 325 return false; 326 } 327 328 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 329 /// exists for it. If not, create one. Then return a symbol that references 330 /// the TOC entry. 331 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) { 332 MCSymbol *&TOCEntry = TOC[Sym]; 333 if (!TOCEntry) 334 TOCEntry = createTempSymbol("C"); 335 return TOCEntry; 336 } 337 338 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) { 339 emitStackMaps(SM); 340 } 341 342 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 343 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 344 345 SM.recordStackMap(MI); 346 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 347 348 // Scan ahead to trim the shadow. 349 const MachineBasicBlock &MBB = *MI.getParent(); 350 MachineBasicBlock::const_iterator MII(MI); 351 ++MII; 352 while (NumNOPBytes > 0) { 353 if (MII == MBB.end() || MII->isCall() || 354 MII->getOpcode() == PPC::DBG_VALUE || 355 MII->getOpcode() == TargetOpcode::PATCHPOINT || 356 MII->getOpcode() == TargetOpcode::STACKMAP) 357 break; 358 ++MII; 359 NumNOPBytes -= 4; 360 } 361 362 // Emit nops. 363 for (unsigned i = 0; i < NumNOPBytes; i += 4) 364 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 365 } 366 367 // Lower a patchpoint of the form: 368 // [<def>], <id>, <numBytes>, <target>, <numArgs> 369 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 370 SM.recordPatchPoint(MI); 371 PatchPointOpers Opers(&MI); 372 373 unsigned EncodedBytes = 0; 374 const MachineOperand &CalleeMO = Opers.getCallTarget(); 375 376 if (CalleeMO.isImm()) { 377 int64_t CallTarget = CalleeMO.getImm(); 378 if (CallTarget) { 379 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 380 "High 16 bits of call target should be zero."); 381 unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 382 EncodedBytes = 0; 383 // Materialize the jump address: 384 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 385 .addReg(ScratchReg) 386 .addImm((CallTarget >> 32) & 0xFFFF)); 387 ++EncodedBytes; 388 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 389 .addReg(ScratchReg) 390 .addReg(ScratchReg) 391 .addImm(32).addImm(16)); 392 ++EncodedBytes; 393 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 394 .addReg(ScratchReg) 395 .addReg(ScratchReg) 396 .addImm((CallTarget >> 16) & 0xFFFF)); 397 ++EncodedBytes; 398 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 399 .addReg(ScratchReg) 400 .addReg(ScratchReg) 401 .addImm(CallTarget & 0xFFFF)); 402 403 // Save the current TOC pointer before the remote call. 404 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset(); 405 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 406 .addReg(PPC::X2) 407 .addImm(TOCSaveOffset) 408 .addReg(PPC::X1)); 409 ++EncodedBytes; 410 411 // If we're on ELFv1, then we need to load the actual function pointer 412 // from the function descriptor. 413 if (!Subtarget->isELFv2ABI()) { 414 // Load the new TOC pointer and the function address, but not r11 415 // (needing this is rare, and loading it here would prevent passing it 416 // via a 'nest' parameter. 417 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 418 .addReg(PPC::X2) 419 .addImm(8) 420 .addReg(ScratchReg)); 421 ++EncodedBytes; 422 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 423 .addReg(ScratchReg) 424 .addImm(0) 425 .addReg(ScratchReg)); 426 ++EncodedBytes; 427 } 428 429 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 430 .addReg(ScratchReg)); 431 ++EncodedBytes; 432 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 433 ++EncodedBytes; 434 435 // Restore the TOC pointer after the call. 436 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 437 .addReg(PPC::X2) 438 .addImm(TOCSaveOffset) 439 .addReg(PPC::X1)); 440 ++EncodedBytes; 441 } 442 } else if (CalleeMO.isGlobal()) { 443 const GlobalValue *GValue = CalleeMO.getGlobal(); 444 MCSymbol *MOSymbol = getSymbol(GValue); 445 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 446 447 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 448 .addExpr(SymVar)); 449 EncodedBytes += 2; 450 } 451 452 // Each instruction is 4 bytes. 453 EncodedBytes *= 4; 454 455 // Emit padding. 456 unsigned NumBytes = Opers.getNumPatchBytes(); 457 assert(NumBytes >= EncodedBytes && 458 "Patchpoint can't request size less than the length of a call."); 459 assert((NumBytes - EncodedBytes) % 4 == 0 && 460 "Invalid number of NOP bytes requested!"); 461 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 462 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 463 } 464 465 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 466 /// call to __tls_get_addr to the current output stream. 467 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 468 MCSymbolRefExpr::VariantKind VK) { 469 StringRef Name = "__tls_get_addr"; 470 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name); 471 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 472 const Module *M = MF->getFunction().getParent(); 473 474 assert(MI->getOperand(0).isReg() && 475 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 476 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 477 "GETtls[ld]ADDR[32] must define GPR3"); 478 assert(MI->getOperand(1).isReg() && 479 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 480 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 481 "GETtls[ld]ADDR[32] must read GPR3"); 482 483 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && 484 isPositionIndependent()) 485 Kind = MCSymbolRefExpr::VK_PLT; 486 const MCExpr *TlsRef = 487 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 488 489 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI. 490 if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt() && 491 M->getPICLevel() == PICLevel::BigPIC) 492 TlsRef = MCBinaryExpr::createAdd( 493 TlsRef, MCConstantExpr::create(32768, OutContext), OutContext); 494 const MachineOperand &MO = MI->getOperand(2); 495 const GlobalValue *GValue = MO.getGlobal(); 496 MCSymbol *MOSymbol = getSymbol(GValue); 497 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 498 EmitToStreamer(*OutStreamer, 499 MCInstBuilder(Subtarget->isPPC64() ? 500 PPC::BL8_NOP_TLS : PPC::BL_TLS) 501 .addExpr(TlsRef) 502 .addExpr(SymVar)); 503 } 504 505 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 506 /// the current output stream. 507 /// 508 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { 509 MCInst TmpInst; 510 bool isPPC64 = Subtarget->isPPC64(); 511 bool isDarwin = TM.getTargetTriple().isOSDarwin(); 512 const Module *M = MF->getFunction().getParent(); 513 PICLevel::Level PL = M->getPICLevel(); 514 515 #ifndef NDEBUG 516 // Validate that SPE and FPU are mutually exclusive in codegen 517 if (!MI->isInlineAsm()) { 518 for (const MachineOperand &MO: MI->operands()) { 519 if (MO.isReg()) { 520 unsigned Reg = MO.getReg(); 521 if (Subtarget->hasSPE()) { 522 if (PPC::F4RCRegClass.contains(Reg) || 523 PPC::F8RCRegClass.contains(Reg) || 524 PPC::QBRCRegClass.contains(Reg) || 525 PPC::QFRCRegClass.contains(Reg) || 526 PPC::QSRCRegClass.contains(Reg) || 527 PPC::VFRCRegClass.contains(Reg) || 528 PPC::VRRCRegClass.contains(Reg) || 529 PPC::VSFRCRegClass.contains(Reg) || 530 PPC::VSSRCRegClass.contains(Reg) 531 ) 532 llvm_unreachable("SPE targets cannot have FPRegs!"); 533 } else { 534 if (PPC::SPERCRegClass.contains(Reg)) 535 llvm_unreachable("SPE register found in FPU-targeted code!"); 536 } 537 } 538 } 539 } 540 #endif 541 // Lower multi-instruction pseudo operations. 542 switch (MI->getOpcode()) { 543 default: break; 544 case TargetOpcode::DBG_VALUE: 545 llvm_unreachable("Should be handled target independently"); 546 case TargetOpcode::STACKMAP: 547 return LowerSTACKMAP(SM, *MI); 548 case TargetOpcode::PATCHPOINT: 549 return LowerPATCHPOINT(SM, *MI); 550 551 case PPC::MoveGOTtoLR: { 552 // Transform %lr = MoveGOTtoLR 553 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 554 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 555 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 556 // blrl 557 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 558 MCSymbol *GOTSymbol = 559 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 560 const MCExpr *OffsExpr = 561 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 562 MCSymbolRefExpr::VK_PPC_LOCAL, 563 OutContext), 564 MCConstantExpr::create(4, OutContext), 565 OutContext); 566 567 // Emit the 'bl'. 568 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 569 return; 570 } 571 case PPC::MovePCtoLR: 572 case PPC::MovePCtoLR8: { 573 // Transform %lr = MovePCtoLR 574 // Into this, where the label is the PIC base: 575 // bl L1$pb 576 // L1$pb: 577 MCSymbol *PICBase = MF->getPICBaseSymbol(); 578 579 // Emit the 'bl'. 580 EmitToStreamer(*OutStreamer, 581 MCInstBuilder(PPC::BL) 582 // FIXME: We would like an efficient form for this, so we 583 // don't have to do a lot of extra uniquing. 584 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 585 586 // Emit the label. 587 OutStreamer->EmitLabel(PICBase); 588 return; 589 } 590 case PPC::UpdateGBR: { 591 // Transform %rd = UpdateGBR(%rt, %ri) 592 // Into: lwz %rt, .L0$poff - .L0$pb(%ri) 593 // add %rd, %rt, %ri 594 // or into (if secure plt mode is on): 595 // addis r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@ha 596 // addi r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@l 597 // Get the offset from the GOT Base Register to the GOT 598 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 599 if (Subtarget->isSecurePlt() && isPositionIndependent() ) { 600 unsigned PICR = TmpInst.getOperand(0).getReg(); 601 MCSymbol *BaseSymbol = OutContext.getOrCreateSymbol( 602 M->getPICLevel() == PICLevel::SmallPIC ? "_GLOBAL_OFFSET_TABLE_" 603 : ".LTOC"); 604 const MCExpr *PB = 605 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), OutContext); 606 607 const MCExpr *DeltaExpr = MCBinaryExpr::createSub( 608 MCSymbolRefExpr::create(BaseSymbol, OutContext), PB, OutContext); 609 610 const MCExpr *DeltaHi = PPCMCExpr::createHa(DeltaExpr, false, OutContext); 611 EmitToStreamer( 612 *OutStreamer, 613 MCInstBuilder(PPC::ADDIS).addReg(PICR).addReg(PICR).addExpr(DeltaHi)); 614 615 const MCExpr *DeltaLo = PPCMCExpr::createLo(DeltaExpr, false, OutContext); 616 EmitToStreamer( 617 *OutStreamer, 618 MCInstBuilder(PPC::ADDI).addReg(PICR).addReg(PICR).addExpr(DeltaLo)); 619 return; 620 } else { 621 MCSymbol *PICOffset = 622 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(); 623 TmpInst.setOpcode(PPC::LWZ); 624 const MCExpr *Exp = 625 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 626 const MCExpr *PB = 627 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 628 MCSymbolRefExpr::VK_None, 629 OutContext); 630 const MCOperand TR = TmpInst.getOperand(1); 631 const MCOperand PICR = TmpInst.getOperand(0); 632 633 // Step 1: lwz %rt, .L$poff - .L$pb(%ri) 634 TmpInst.getOperand(1) = 635 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 636 TmpInst.getOperand(0) = TR; 637 TmpInst.getOperand(2) = PICR; 638 EmitToStreamer(*OutStreamer, TmpInst); 639 640 TmpInst.setOpcode(PPC::ADD4); 641 TmpInst.getOperand(0) = PICR; 642 TmpInst.getOperand(1) = TR; 643 TmpInst.getOperand(2) = PICR; 644 EmitToStreamer(*OutStreamer, TmpInst); 645 return; 646 } 647 } 648 case PPC::LWZtoc: { 649 // Transform %r3 = LWZtoc @min1, %r2 650 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 651 652 // Change the opcode to LWZ, and the global address operand to be a 653 // reference to the GOT entry we will synthesize later. 654 TmpInst.setOpcode(PPC::LWZ); 655 const MachineOperand &MO = MI->getOperand(1); 656 657 // Map symbol -> label of TOC entry 658 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 659 MCSymbol *MOSymbol = nullptr; 660 if (MO.isGlobal()) 661 MOSymbol = getSymbol(MO.getGlobal()); 662 else if (MO.isCPI()) 663 MOSymbol = GetCPISymbol(MO.getIndex()); 664 else if (MO.isJTI()) 665 MOSymbol = GetJTISymbol(MO.getIndex()); 666 else if (MO.isBlockAddress()) 667 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 668 669 if (PL == PICLevel::SmallPIC) { 670 const MCExpr *Exp = 671 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 672 OutContext); 673 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 674 } else { 675 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 676 677 const MCExpr *Exp = 678 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, 679 OutContext); 680 const MCExpr *PB = 681 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 682 OutContext); 683 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 684 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 685 } 686 EmitToStreamer(*OutStreamer, TmpInst); 687 return; 688 } 689 case PPC::LDtocJTI: 690 case PPC::LDtocCPT: 691 case PPC::LDtocBA: 692 case PPC::LDtoc: { 693 // Transform %x3 = LDtoc @min1, %x2 694 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 695 696 // Change the opcode to LD, and the global address operand to be a 697 // reference to the TOC entry we will synthesize later. 698 TmpInst.setOpcode(PPC::LD); 699 const MachineOperand &MO = MI->getOperand(1); 700 701 // Map symbol -> label of TOC entry 702 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()); 703 MCSymbol *MOSymbol = nullptr; 704 if (MO.isGlobal()) 705 MOSymbol = getSymbol(MO.getGlobal()); 706 else if (MO.isCPI()) 707 MOSymbol = GetCPISymbol(MO.getIndex()); 708 else if (MO.isJTI()) 709 MOSymbol = GetJTISymbol(MO.getIndex()); 710 else if (MO.isBlockAddress()) 711 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 712 713 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol); 714 715 const MCExpr *Exp = 716 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC, 717 OutContext); 718 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 719 EmitToStreamer(*OutStreamer, TmpInst); 720 return; 721 } 722 723 case PPC::ADDIStocHA: { 724 // Transform %xd = ADDIStocHA %x2, @sym 725 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 726 727 // Change the opcode to ADDIS8. If the global address is external, has 728 // common linkage, is a non-local function address, or is a jump table 729 // address, then generate a TOC entry and reference that. Otherwise 730 // reference the symbol directly. 731 TmpInst.setOpcode(PPC::ADDIS8); 732 const MachineOperand &MO = MI->getOperand(2); 733 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 734 MO.isBlockAddress()) && 735 "Invalid operand for ADDIStocHA!"); 736 MCSymbol *MOSymbol = nullptr; 737 bool GlobalToc = false; 738 739 if (MO.isGlobal()) { 740 const GlobalValue *GV = MO.getGlobal(); 741 MOSymbol = getSymbol(GV); 742 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 743 GlobalToc = (GVFlags & PPCII::MO_NLP_FLAG); 744 } else if (MO.isCPI()) { 745 MOSymbol = GetCPISymbol(MO.getIndex()); 746 } else if (MO.isJTI()) { 747 MOSymbol = GetJTISymbol(MO.getIndex()); 748 } else if (MO.isBlockAddress()) { 749 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 750 } 751 752 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 753 TM.getCodeModel() == CodeModel::Large) 754 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 755 756 const MCExpr *Exp = 757 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_HA, 758 OutContext); 759 760 if (!MO.isJTI() && MO.getOffset()) 761 Exp = MCBinaryExpr::createAdd(Exp, 762 MCConstantExpr::create(MO.getOffset(), 763 OutContext), 764 OutContext); 765 766 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 767 EmitToStreamer(*OutStreamer, TmpInst); 768 return; 769 } 770 case PPC::LDtocL: { 771 // Transform %xd = LDtocL @sym, %xs 772 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 773 774 // Change the opcode to LD. If the global address is external, has 775 // common linkage, or is a jump table address, then reference the 776 // associated TOC entry. Otherwise reference the symbol directly. 777 TmpInst.setOpcode(PPC::LD); 778 const MachineOperand &MO = MI->getOperand(1); 779 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 780 MO.isBlockAddress()) && 781 "Invalid operand for LDtocL!"); 782 MCSymbol *MOSymbol = nullptr; 783 784 if (MO.isJTI()) 785 MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex())); 786 else if (MO.isBlockAddress()) { 787 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress()); 788 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 789 } 790 else if (MO.isCPI()) { 791 MOSymbol = GetCPISymbol(MO.getIndex()); 792 if (TM.getCodeModel() == CodeModel::Large) 793 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 794 } 795 else if (MO.isGlobal()) { 796 const GlobalValue *GV = MO.getGlobal(); 797 MOSymbol = getSymbol(GV); 798 LLVM_DEBUG( 799 unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 800 assert((GVFlags & PPCII::MO_NLP_FLAG) && 801 "LDtocL used on symbol that could be accessed directly is " 802 "invalid. Must match ADDIStocHA.")); 803 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol); 804 } 805 806 const MCExpr *Exp = 807 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 808 OutContext); 809 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 810 EmitToStreamer(*OutStreamer, TmpInst); 811 return; 812 } 813 case PPC::ADDItocL: { 814 // Transform %xd = ADDItocL %xs, @sym 815 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 816 817 // Change the opcode to ADDI8. If the global address is external, then 818 // generate a TOC entry and reference that. Otherwise reference the 819 // symbol directly. 820 TmpInst.setOpcode(PPC::ADDI8); 821 const MachineOperand &MO = MI->getOperand(2); 822 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL"); 823 MCSymbol *MOSymbol = nullptr; 824 825 if (MO.isGlobal()) { 826 const GlobalValue *GV = MO.getGlobal(); 827 LLVM_DEBUG(unsigned char GVFlags = Subtarget->classifyGlobalReference(GV); 828 assert(!(GVFlags & PPCII::MO_NLP_FLAG) && 829 "Interposable definitions must use indirect access.")); 830 MOSymbol = getSymbol(GV); 831 } else if (MO.isCPI()) { 832 MOSymbol = GetCPISymbol(MO.getIndex()); 833 } 834 835 const MCExpr *Exp = 836 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO, 837 OutContext); 838 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 839 EmitToStreamer(*OutStreamer, TmpInst); 840 return; 841 } 842 case PPC::ADDISgotTprelHA: { 843 // Transform: %xd = ADDISgotTprelHA %x2, @sym 844 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 845 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 846 const MachineOperand &MO = MI->getOperand(2); 847 const GlobalValue *GValue = MO.getGlobal(); 848 MCSymbol *MOSymbol = getSymbol(GValue); 849 const MCExpr *SymGotTprel = 850 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 851 OutContext); 852 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 853 .addReg(MI->getOperand(0).getReg()) 854 .addReg(MI->getOperand(1).getReg()) 855 .addExpr(SymGotTprel)); 856 return; 857 } 858 case PPC::LDgotTprelL: 859 case PPC::LDgotTprelL32: { 860 // Transform %xd = LDgotTprelL @sym, %xs 861 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 862 863 // Change the opcode to LD. 864 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ); 865 const MachineOperand &MO = MI->getOperand(1); 866 const GlobalValue *GValue = MO.getGlobal(); 867 MCSymbol *MOSymbol = getSymbol(GValue); 868 const MCExpr *Exp = 869 MCSymbolRefExpr::create(MOSymbol, 870 isPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO 871 : MCSymbolRefExpr::VK_PPC_GOT_TPREL, 872 OutContext); 873 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 874 EmitToStreamer(*OutStreamer, TmpInst); 875 return; 876 } 877 878 case PPC::PPC32PICGOT: { 879 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 880 MCSymbol *GOTRef = OutContext.createTempSymbol(); 881 MCSymbol *NextInstr = OutContext.createTempSymbol(); 882 883 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 884 // FIXME: We would like an efficient form for this, so we don't have to do 885 // a lot of extra uniquing. 886 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 887 const MCExpr *OffsExpr = 888 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 889 MCSymbolRefExpr::create(GOTRef, OutContext), 890 OutContext); 891 OutStreamer->EmitLabel(GOTRef); 892 OutStreamer->EmitValue(OffsExpr, 4); 893 OutStreamer->EmitLabel(NextInstr); 894 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 895 .addReg(MI->getOperand(0).getReg())); 896 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 897 .addReg(MI->getOperand(1).getReg()) 898 .addImm(0) 899 .addReg(MI->getOperand(0).getReg())); 900 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 901 .addReg(MI->getOperand(0).getReg()) 902 .addReg(MI->getOperand(1).getReg()) 903 .addReg(MI->getOperand(0).getReg())); 904 return; 905 } 906 case PPC::PPC32GOT: { 907 MCSymbol *GOTSymbol = 908 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 909 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 910 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 911 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 912 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 913 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 914 .addReg(MI->getOperand(0).getReg()) 915 .addExpr(SymGotTlsL)); 916 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 917 .addReg(MI->getOperand(0).getReg()) 918 .addReg(MI->getOperand(0).getReg()) 919 .addExpr(SymGotTlsHA)); 920 return; 921 } 922 case PPC::ADDIStlsgdHA: { 923 // Transform: %xd = ADDIStlsgdHA %x2, @sym 924 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 925 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 926 const MachineOperand &MO = MI->getOperand(2); 927 const GlobalValue *GValue = MO.getGlobal(); 928 MCSymbol *MOSymbol = getSymbol(GValue); 929 const MCExpr *SymGotTlsGD = 930 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 931 OutContext); 932 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 933 .addReg(MI->getOperand(0).getReg()) 934 .addReg(MI->getOperand(1).getReg()) 935 .addExpr(SymGotTlsGD)); 936 return; 937 } 938 case PPC::ADDItlsgdL: 939 // Transform: %xd = ADDItlsgdL %xs, @sym 940 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l 941 case PPC::ADDItlsgdL32: { 942 // Transform: %rd = ADDItlsgdL32 %rs, @sym 943 // Into: %rd = ADDI %rs, sym@got@tlsgd 944 const MachineOperand &MO = MI->getOperand(2); 945 const GlobalValue *GValue = MO.getGlobal(); 946 MCSymbol *MOSymbol = getSymbol(GValue); 947 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 948 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 949 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 950 OutContext); 951 EmitToStreamer(*OutStreamer, 952 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 953 .addReg(MI->getOperand(0).getReg()) 954 .addReg(MI->getOperand(1).getReg()) 955 .addExpr(SymGotTlsGD)); 956 return; 957 } 958 case PPC::GETtlsADDR: 959 // Transform: %x3 = GETtlsADDR %x3, @sym 960 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 961 case PPC::GETtlsADDR32: { 962 // Transform: %r3 = GETtlsADDR32 %r3, @sym 963 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 964 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 965 return; 966 } 967 case PPC::ADDIStlsldHA: { 968 // Transform: %xd = ADDIStlsldHA %x2, @sym 969 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha 970 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); 971 const MachineOperand &MO = MI->getOperand(2); 972 const GlobalValue *GValue = MO.getGlobal(); 973 MCSymbol *MOSymbol = getSymbol(GValue); 974 const MCExpr *SymGotTlsLD = 975 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 976 OutContext); 977 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 978 .addReg(MI->getOperand(0).getReg()) 979 .addReg(MI->getOperand(1).getReg()) 980 .addExpr(SymGotTlsLD)); 981 return; 982 } 983 case PPC::ADDItlsldL: 984 // Transform: %xd = ADDItlsldL %xs, @sym 985 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l 986 case PPC::ADDItlsldL32: { 987 // Transform: %rd = ADDItlsldL32 %rs, @sym 988 // Into: %rd = ADDI %rs, sym@got@tlsld 989 const MachineOperand &MO = MI->getOperand(2); 990 const GlobalValue *GValue = MO.getGlobal(); 991 MCSymbol *MOSymbol = getSymbol(GValue); 992 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 993 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 994 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 995 OutContext); 996 EmitToStreamer(*OutStreamer, 997 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 998 .addReg(MI->getOperand(0).getReg()) 999 .addReg(MI->getOperand(1).getReg()) 1000 .addExpr(SymGotTlsLD)); 1001 return; 1002 } 1003 case PPC::GETtlsldADDR: 1004 // Transform: %x3 = GETtlsldADDR %x3, @sym 1005 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 1006 case PPC::GETtlsldADDR32: { 1007 // Transform: %r3 = GETtlsldADDR32 %r3, @sym 1008 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 1009 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 1010 return; 1011 } 1012 case PPC::ADDISdtprelHA: 1013 // Transform: %xd = ADDISdtprelHA %xs, @sym 1014 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha 1015 case PPC::ADDISdtprelHA32: { 1016 // Transform: %rd = ADDISdtprelHA32 %rs, @sym 1017 // Into: %rd = ADDIS %rs, sym@dtprel@ha 1018 const MachineOperand &MO = MI->getOperand(2); 1019 const GlobalValue *GValue = MO.getGlobal(); 1020 MCSymbol *MOSymbol = getSymbol(GValue); 1021 const MCExpr *SymDtprel = 1022 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 1023 OutContext); 1024 EmitToStreamer( 1025 *OutStreamer, 1026 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS) 1027 .addReg(MI->getOperand(0).getReg()) 1028 .addReg(MI->getOperand(1).getReg()) 1029 .addExpr(SymDtprel)); 1030 return; 1031 } 1032 case PPC::ADDIdtprelL: 1033 // Transform: %xd = ADDIdtprelL %xs, @sym 1034 // Into: %xd = ADDI8 %xs, sym@dtprel@l 1035 case PPC::ADDIdtprelL32: { 1036 // Transform: %rd = ADDIdtprelL32 %rs, @sym 1037 // Into: %rd = ADDI %rs, sym@dtprel@l 1038 const MachineOperand &MO = MI->getOperand(2); 1039 const GlobalValue *GValue = MO.getGlobal(); 1040 MCSymbol *MOSymbol = getSymbol(GValue); 1041 const MCExpr *SymDtprel = 1042 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 1043 OutContext); 1044 EmitToStreamer(*OutStreamer, 1045 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI) 1046 .addReg(MI->getOperand(0).getReg()) 1047 .addReg(MI->getOperand(1).getReg()) 1048 .addExpr(SymDtprel)); 1049 return; 1050 } 1051 case PPC::MFOCRF: 1052 case PPC::MFOCRF8: 1053 if (!Subtarget->hasMFOCRF()) { 1054 // Transform: %r3 = MFOCRF %cr7 1055 // Into: %r3 = MFCR ;; cr7 1056 unsigned NewOpcode = 1057 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 1058 OutStreamer->AddComment(PPCInstPrinter:: 1059 getRegisterName(MI->getOperand(1).getReg())); 1060 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1061 .addReg(MI->getOperand(0).getReg())); 1062 return; 1063 } 1064 break; 1065 case PPC::MTOCRF: 1066 case PPC::MTOCRF8: 1067 if (!Subtarget->hasMFOCRF()) { 1068 // Transform: %cr7 = MTOCRF %r3 1069 // Into: MTCRF mask, %r3 ;; cr7 1070 unsigned NewOpcode = 1071 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 1072 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 1073 ->getEncodingValue(MI->getOperand(0).getReg()); 1074 OutStreamer->AddComment(PPCInstPrinter:: 1075 getRegisterName(MI->getOperand(0).getReg())); 1076 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1077 .addImm(Mask) 1078 .addReg(MI->getOperand(1).getReg())); 1079 return; 1080 } 1081 break; 1082 case PPC::LD: 1083 case PPC::STD: 1084 case PPC::LWA_32: 1085 case PPC::LWA: { 1086 // Verify alignment is legal, so we don't create relocations 1087 // that can't be supported. 1088 // FIXME: This test is currently disabled for Darwin. The test 1089 // suite shows a handful of test cases that fail this check for 1090 // Darwin. Those need to be investigated before this sanity test 1091 // can be enabled for those subtargets. 1092 if (!Subtarget->isDarwin()) { 1093 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1094 const MachineOperand &MO = MI->getOperand(OpNum); 1095 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) 1096 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1097 } 1098 // Now process the instruction normally. 1099 break; 1100 } 1101 } 1102 1103 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin); 1104 EmitToStreamer(*OutStreamer, TmpInst); 1105 } 1106 1107 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) { 1108 if (!Subtarget->isPPC64()) 1109 return PPCAsmPrinter::EmitInstruction(MI); 1110 1111 switch (MI->getOpcode()) { 1112 default: 1113 return PPCAsmPrinter::EmitInstruction(MI); 1114 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: { 1115 // .begin: 1116 // b .end # lis 0, FuncId[16..32] 1117 // nop # li 0, FuncId[0..15] 1118 // std 0, -8(1) 1119 // mflr 0 1120 // bl __xray_FunctionEntry 1121 // mtlr 0 1122 // .end: 1123 // 1124 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1125 // of instructions change. 1126 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1127 MCSymbol *EndOfSled = OutContext.createTempSymbol(); 1128 OutStreamer->EmitLabel(BeginOfSled); 1129 EmitToStreamer(*OutStreamer, 1130 MCInstBuilder(PPC::B).addExpr( 1131 MCSymbolRefExpr::create(EndOfSled, OutContext))); 1132 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1133 EmitToStreamer( 1134 *OutStreamer, 1135 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1136 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1137 EmitToStreamer(*OutStreamer, 1138 MCInstBuilder(PPC::BL8_NOP) 1139 .addExpr(MCSymbolRefExpr::create( 1140 OutContext.getOrCreateSymbol("__xray_FunctionEntry"), 1141 OutContext))); 1142 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1143 OutStreamer->EmitLabel(EndOfSled); 1144 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER); 1145 break; 1146 } 1147 case TargetOpcode::PATCHABLE_RET: { 1148 unsigned RetOpcode = MI->getOperand(0).getImm(); 1149 MCInst RetInst; 1150 RetInst.setOpcode(RetOpcode); 1151 for (const auto &MO : 1152 make_range(std::next(MI->operands_begin()), MI->operands_end())) { 1153 MCOperand MCOp; 1154 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false)) 1155 RetInst.addOperand(MCOp); 1156 } 1157 1158 bool IsConditional; 1159 if (RetOpcode == PPC::BCCLR) { 1160 IsConditional = true; 1161 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 || 1162 RetOpcode == PPC::TCRETURNai8) { 1163 break; 1164 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) { 1165 IsConditional = false; 1166 } else { 1167 EmitToStreamer(*OutStreamer, RetInst); 1168 break; 1169 } 1170 1171 MCSymbol *FallthroughLabel; 1172 if (IsConditional) { 1173 // Before: 1174 // bgtlr cr0 1175 // 1176 // After: 1177 // ble cr0, .end 1178 // .p2align 3 1179 // .begin: 1180 // blr # lis 0, FuncId[16..32] 1181 // nop # li 0, FuncId[0..15] 1182 // std 0, -8(1) 1183 // mflr 0 1184 // bl __xray_FunctionExit 1185 // mtlr 0 1186 // blr 1187 // .end: 1188 // 1189 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1190 // of instructions change. 1191 FallthroughLabel = OutContext.createTempSymbol(); 1192 EmitToStreamer( 1193 *OutStreamer, 1194 MCInstBuilder(PPC::BCC) 1195 .addImm(PPC::InvertPredicate( 1196 static_cast<PPC::Predicate>(MI->getOperand(1).getImm()))) 1197 .addReg(MI->getOperand(2).getReg()) 1198 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext))); 1199 RetInst = MCInst(); 1200 RetInst.setOpcode(PPC::BLR8); 1201 } 1202 // .p2align 3 1203 // .begin: 1204 // b(lr)? # lis 0, FuncId[16..32] 1205 // nop # li 0, FuncId[0..15] 1206 // std 0, -8(1) 1207 // mflr 0 1208 // bl __xray_FunctionExit 1209 // mtlr 0 1210 // b(lr)? 1211 // 1212 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1213 // of instructions change. 1214 OutStreamer->EmitCodeAlignment(8); 1215 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1216 OutStreamer->EmitLabel(BeginOfSled); 1217 EmitToStreamer(*OutStreamer, RetInst); 1218 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1219 EmitToStreamer( 1220 *OutStreamer, 1221 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1222 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1223 EmitToStreamer(*OutStreamer, 1224 MCInstBuilder(PPC::BL8_NOP) 1225 .addExpr(MCSymbolRefExpr::create( 1226 OutContext.getOrCreateSymbol("__xray_FunctionExit"), 1227 OutContext))); 1228 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1229 EmitToStreamer(*OutStreamer, RetInst); 1230 if (IsConditional) 1231 OutStreamer->EmitLabel(FallthroughLabel); 1232 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT); 1233 break; 1234 } 1235 case TargetOpcode::PATCHABLE_FUNCTION_EXIT: 1236 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted"); 1237 case TargetOpcode::PATCHABLE_TAIL_CALL: 1238 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a 1239 // normal function exit from a tail exit. 1240 llvm_unreachable("Tail call is handled in the normal case. See comments " 1241 "around this assert."); 1242 } 1243 } 1244 1245 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { 1246 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1247 PPCTargetStreamer *TS = 1248 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1249 1250 if (TS) 1251 TS->emitAbiVersion(2); 1252 } 1253 1254 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1255 !isPositionIndependent()) 1256 return AsmPrinter::EmitStartOfAsmFile(M); 1257 1258 if (M.getPICLevel() == PICLevel::SmallPIC) 1259 return AsmPrinter::EmitStartOfAsmFile(M); 1260 1261 OutStreamer->SwitchSection(OutContext.getELFSection( 1262 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1263 1264 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1265 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1266 1267 OutStreamer->EmitLabel(CurrentPos); 1268 1269 // The GOT pointer points to the middle of the GOT, in order to reference the 1270 // entire 64kB range. 0x8000 is the midpoint. 1271 const MCExpr *tocExpr = 1272 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1273 MCConstantExpr::create(0x8000, OutContext), 1274 OutContext); 1275 1276 OutStreamer->EmitAssignment(TOCSym, tocExpr); 1277 1278 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1279 } 1280 1281 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { 1282 // linux/ppc32 - Normal entry label. 1283 if (!Subtarget->isPPC64() && 1284 (!isPositionIndependent() || 1285 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC)) 1286 return AsmPrinter::EmitFunctionEntryLabel(); 1287 1288 if (!Subtarget->isPPC64()) { 1289 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1290 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { 1291 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); 1292 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1293 OutStreamer->EmitLabel(RelocSymbol); 1294 1295 const MCExpr *OffsExpr = 1296 MCBinaryExpr::createSub( 1297 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1298 OutContext), 1299 MCSymbolRefExpr::create(PICBase, OutContext), 1300 OutContext); 1301 OutStreamer->EmitValue(OffsExpr, 4); 1302 OutStreamer->EmitLabel(CurrentFnSym); 1303 return; 1304 } else 1305 return AsmPrinter::EmitFunctionEntryLabel(); 1306 } 1307 1308 // ELFv2 ABI - Normal entry label. 1309 if (Subtarget->isELFv2ABI()) { 1310 // In the Large code model, we allow arbitrary displacements between 1311 // the text section and its associated TOC section. We place the 1312 // full 8-byte offset to the TOC in memory immediately preceding 1313 // the function global entry point. 1314 if (TM.getCodeModel() == CodeModel::Large 1315 && !MF->getRegInfo().use_empty(PPC::X2)) { 1316 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1317 1318 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1319 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); 1320 const MCExpr *TOCDeltaExpr = 1321 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1322 MCSymbolRefExpr::create(GlobalEPSymbol, 1323 OutContext), 1324 OutContext); 1325 1326 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol()); 1327 OutStreamer->EmitValue(TOCDeltaExpr, 8); 1328 } 1329 return AsmPrinter::EmitFunctionEntryLabel(); 1330 } 1331 1332 // Emit an official procedure descriptor. 1333 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1334 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1335 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1336 OutStreamer->SwitchSection(Section); 1337 OutStreamer->EmitLabel(CurrentFnSym); 1338 OutStreamer->EmitValueToAlignment(8); 1339 MCSymbol *Symbol1 = CurrentFnSymForSize; 1340 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1341 // entry point. 1342 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1343 8 /*size*/); 1344 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1345 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1346 OutStreamer->EmitValue( 1347 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1348 8/*size*/); 1349 // Emit a null environment pointer. 1350 OutStreamer->EmitIntValue(0, 8 /* size */); 1351 OutStreamer->SwitchSection(Current.first, Current.second); 1352 } 1353 1354 bool PPCLinuxAsmPrinter::doFinalization(Module &M) { 1355 const DataLayout &DL = getDataLayout(); 1356 1357 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1358 1359 PPCTargetStreamer &TS = 1360 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer()); 1361 1362 if (!TOC.empty()) { 1363 MCSectionELF *Section; 1364 1365 if (isPPC64) 1366 Section = OutStreamer->getContext().getELFSection( 1367 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1368 else 1369 Section = OutStreamer->getContext().getELFSection( 1370 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1371 OutStreamer->SwitchSection(Section); 1372 1373 for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(), 1374 E = TOC.end(); I != E; ++I) { 1375 OutStreamer->EmitLabel(I->second); 1376 MCSymbol *S = I->first; 1377 if (isPPC64) { 1378 TS.emitTCEntry(*S); 1379 } else { 1380 OutStreamer->EmitValueToAlignment(4); 1381 OutStreamer->EmitSymbolValue(S, 4); 1382 } 1383 } 1384 } 1385 1386 return AsmPrinter::doFinalization(M); 1387 } 1388 1389 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1390 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() { 1391 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1392 // provide two entry points. The ABI guarantees that when calling the 1393 // local entry point, r2 is set up by the caller to contain the TOC base 1394 // for this function, and when calling the global entry point, r12 is set 1395 // up by the caller to hold the address of the global entry point. We 1396 // thus emit a prefix sequence along the following lines: 1397 // 1398 // func: 1399 // .Lfunc_gepNN: 1400 // # global entry point 1401 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1402 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1403 // .Lfunc_lepNN: 1404 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1405 // # local entry point, followed by function body 1406 // 1407 // For the Large code model, we create 1408 // 1409 // .Lfunc_tocNN: 1410 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1411 // func: 1412 // .Lfunc_gepNN: 1413 // # global entry point 1414 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1415 // add r2,r2,r12 1416 // .Lfunc_lepNN: 1417 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1418 // # local entry point, followed by function body 1419 // 1420 // This ensures we have r2 set up correctly while executing the function 1421 // body, no matter which entry point is called. 1422 if (Subtarget->isELFv2ABI() 1423 // Only do all that if the function uses r2 in the first place. 1424 && !MF->getRegInfo().use_empty(PPC::X2)) { 1425 // Note: The logic here must be synchronized with the code in the 1426 // branch-selection pass which sets the offset of the first block in the 1427 // function. This matters because it affects the alignment. 1428 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1429 1430 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); 1431 OutStreamer->EmitLabel(GlobalEntryLabel); 1432 const MCSymbolRefExpr *GlobalEntryLabelExp = 1433 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1434 1435 if (TM.getCodeModel() != CodeModel::Large) { 1436 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1437 const MCExpr *TOCDeltaExpr = 1438 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1439 GlobalEntryLabelExp, OutContext); 1440 1441 const MCExpr *TOCDeltaHi = 1442 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext); 1443 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1444 .addReg(PPC::X2) 1445 .addReg(PPC::X12) 1446 .addExpr(TOCDeltaHi)); 1447 1448 const MCExpr *TOCDeltaLo = 1449 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext); 1450 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1451 .addReg(PPC::X2) 1452 .addReg(PPC::X2) 1453 .addExpr(TOCDeltaLo)); 1454 } else { 1455 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); 1456 const MCExpr *TOCOffsetDeltaExpr = 1457 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1458 GlobalEntryLabelExp, OutContext); 1459 1460 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1461 .addReg(PPC::X2) 1462 .addExpr(TOCOffsetDeltaExpr) 1463 .addReg(PPC::X12)); 1464 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1465 .addReg(PPC::X2) 1466 .addReg(PPC::X2) 1467 .addReg(PPC::X12)); 1468 } 1469 1470 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); 1471 OutStreamer->EmitLabel(LocalEntryLabel); 1472 const MCSymbolRefExpr *LocalEntryLabelExp = 1473 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1474 const MCExpr *LocalOffsetExp = 1475 MCBinaryExpr::createSub(LocalEntryLabelExp, 1476 GlobalEntryLabelExp, OutContext); 1477 1478 PPCTargetStreamer *TS = 1479 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1480 1481 if (TS) 1482 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1483 } 1484 } 1485 1486 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1487 /// directive. 1488 /// 1489 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() { 1490 // Only the 64-bit target requires a traceback table. For now, 1491 // we only emit the word of zeroes that GDB requires to find 1492 // the end of the function, and zeroes for the eight-byte 1493 // mandatory fields. 1494 // FIXME: We should fill in the eight-byte mandatory fields as described in 1495 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1496 // currently make use of these fields). 1497 if (Subtarget->isPPC64()) { 1498 OutStreamer->EmitIntValue(0, 4/*size*/); 1499 OutStreamer->EmitIntValue(0, 8/*size*/); 1500 } 1501 } 1502 1503 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) { 1504 static const char *const CPUDirectives[] = { 1505 "", 1506 "ppc", 1507 "ppc440", 1508 "ppc601", 1509 "ppc602", 1510 "ppc603", 1511 "ppc7400", 1512 "ppc750", 1513 "ppc970", 1514 "ppcA2", 1515 "ppce500", 1516 "ppce500mc", 1517 "ppce5500", 1518 "power3", 1519 "power4", 1520 "power5", 1521 "power5x", 1522 "power6", 1523 "power6x", 1524 "power7", 1525 // FIXME: why is power8 missing here? 1526 "ppc64", 1527 "ppc64le", 1528 "power9" 1529 }; 1530 1531 // Get the numerically largest directive. 1532 // FIXME: How should we merge darwin directives? 1533 unsigned Directive = PPC::DIR_NONE; 1534 for (const Function &F : M) { 1535 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F); 1536 unsigned FDir = STI.getDarwinDirective(); 1537 Directive = Directive > FDir ? FDir : STI.getDarwinDirective(); 1538 if (STI.hasMFOCRF() && Directive < PPC::DIR_970) 1539 Directive = PPC::DIR_970; 1540 if (STI.hasAltivec() && Directive < PPC::DIR_7400) 1541 Directive = PPC::DIR_7400; 1542 if (STI.isPPC64() && Directive < PPC::DIR_64) 1543 Directive = PPC::DIR_64; 1544 } 1545 1546 assert(Directive <= PPC::DIR_64 && "Directive out of range."); 1547 1548 assert(Directive < array_lengthof(CPUDirectives) && 1549 "CPUDirectives[] might not be up-to-date!"); 1550 PPCTargetStreamer &TStreamer = 1551 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1552 TStreamer.emitMachine(CPUDirectives[Directive]); 1553 1554 // Prime text sections so they are adjacent. This reduces the likelihood a 1555 // large data or debug section causes a branch to exceed 16M limit. 1556 const TargetLoweringObjectFileMachO &TLOFMacho = 1557 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1558 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection()); 1559 if (TM.getRelocationModel() == Reloc::PIC_) { 1560 OutStreamer->SwitchSection( 1561 OutContext.getMachOSection("__TEXT", "__picsymbolstub1", 1562 MachO::S_SYMBOL_STUBS | 1563 MachO::S_ATTR_PURE_INSTRUCTIONS, 1564 32, SectionKind::getText())); 1565 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) { 1566 OutStreamer->SwitchSection( 1567 OutContext.getMachOSection("__TEXT","__symbol_stub1", 1568 MachO::S_SYMBOL_STUBS | 1569 MachO::S_ATTR_PURE_INSTRUCTIONS, 1570 16, SectionKind::getText())); 1571 } 1572 OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); 1573 } 1574 1575 bool PPCDarwinAsmPrinter::doFinalization(Module &M) { 1576 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64; 1577 1578 // Darwin/PPC always uses mach-o. 1579 const TargetLoweringObjectFileMachO &TLOFMacho = 1580 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); 1581 if (MMI) { 1582 MachineModuleInfoMachO &MMIMacho = 1583 MMI->getObjFileInfo<MachineModuleInfoMachO>(); 1584 1585 if (MAI->doesSupportExceptionHandling()) { 1586 // Add the (possibly multiple) personalities to the set of global values. 1587 // Only referenced functions get into the Personalities list. 1588 for (const Function *Personality : MMI->getPersonalities()) { 1589 if (Personality) { 1590 MCSymbol *NLPSym = 1591 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr"); 1592 MachineModuleInfoImpl::StubValueTy &StubSym = 1593 MMIMacho.getGVStubEntry(NLPSym); 1594 StubSym = 1595 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true); 1596 } 1597 } 1598 } 1599 1600 // Output stubs for dynamically-linked functions. 1601 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList(); 1602 1603 // Output macho stubs for external and common global variables. 1604 if (!Stubs.empty()) { 1605 // Switch with ".non_lazy_symbol_pointer" directive. 1606 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection()); 1607 EmitAlignment(isPPC64 ? 3 : 2); 1608 1609 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) { 1610 // L_foo$stub: 1611 OutStreamer->EmitLabel(Stubs[i].first); 1612 // .indirect_symbol _foo 1613 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second; 1614 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(), 1615 MCSA_IndirectSymbol); 1616 1617 if (MCSym.getInt()) 1618 // External to current translation unit. 1619 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/); 1620 else 1621 // Internal to current translation unit. 1622 // 1623 // When we place the LSDA into the TEXT section, the type info 1624 // pointers 1625 // need to be indirect and pc-rel. We accomplish this by using NLPs. 1626 // However, sometimes the types are local to the file. So we need to 1627 // fill in the value for the NLP in those cases. 1628 OutStreamer->EmitValue( 1629 MCSymbolRefExpr::create(MCSym.getPointer(), OutContext), 1630 isPPC64 ? 8 : 4 /*size*/); 1631 } 1632 1633 Stubs.clear(); 1634 OutStreamer->AddBlankLine(); 1635 } 1636 } 1637 1638 // Funny Darwin hack: This flag tells the linker that no global symbols 1639 // contain code that falls through to other global symbols (e.g. the obvious 1640 // implementation of multiple entry points). If this doesn't occur, the 1641 // linker can safely perform dead code stripping. Since LLVM never generates 1642 // code that does this, it is always safe to set. 1643 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols); 1644 1645 return AsmPrinter::doFinalization(M); 1646 } 1647 1648 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code 1649 /// for a MachineFunction to the given output stream, in a format that the 1650 /// Darwin assembler can deal with. 1651 /// 1652 static AsmPrinter * 1653 createPPCAsmPrinterPass(TargetMachine &tm, 1654 std::unique_ptr<MCStreamer> &&Streamer) { 1655 if (tm.getTargetTriple().isMacOSX()) 1656 return new PPCDarwinAsmPrinter(tm, std::move(Streamer)); 1657 if (tm.getTargetTriple().isOSAIX()) 1658 return new PPCAIXAsmPrinter(tm, std::move(Streamer)); 1659 1660 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 1661 } 1662 1663 // Force static initialization. 1664 extern "C" void LLVMInitializePowerPCAsmPrinter() { 1665 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), 1666 createPPCAsmPrinterPass); 1667 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), 1668 createPPCAsmPrinterPass); 1669 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), 1670 createPPCAsmPrinterPass); 1671 } 1672