1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains a printer that converts from our internal representation 10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is 11 // the output mechanism used by `llc'. 12 // 13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/ 14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "MCTargetDesc/PPCInstPrinter.h" 19 #include "MCTargetDesc/PPCMCExpr.h" 20 #include "MCTargetDesc/PPCMCTargetDesc.h" 21 #include "MCTargetDesc/PPCPredicates.h" 22 #include "PPC.h" 23 #include "PPCInstrInfo.h" 24 #include "PPCMachineFunctionInfo.h" 25 #include "PPCSubtarget.h" 26 #include "PPCTargetMachine.h" 27 #include "PPCTargetStreamer.h" 28 #include "TargetInfo/PowerPCTargetInfo.h" 29 #include "llvm/ADT/MapVector.h" 30 #include "llvm/ADT/SmallPtrSet.h" 31 #include "llvm/ADT/Statistic.h" 32 #include "llvm/ADT/StringExtras.h" 33 #include "llvm/ADT/StringRef.h" 34 #include "llvm/ADT/Twine.h" 35 #include "llvm/BinaryFormat/ELF.h" 36 #include "llvm/CodeGen/AsmPrinter.h" 37 #include "llvm/CodeGen/MachineBasicBlock.h" 38 #include "llvm/CodeGen/MachineFrameInfo.h" 39 #include "llvm/CodeGen/MachineFunction.h" 40 #include "llvm/CodeGen/MachineInstr.h" 41 #include "llvm/CodeGen/MachineModuleInfoImpls.h" 42 #include "llvm/CodeGen/MachineOperand.h" 43 #include "llvm/CodeGen/MachineRegisterInfo.h" 44 #include "llvm/CodeGen/StackMaps.h" 45 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" 46 #include "llvm/IR/DataLayout.h" 47 #include "llvm/IR/GlobalValue.h" 48 #include "llvm/IR/GlobalVariable.h" 49 #include "llvm/IR/Module.h" 50 #include "llvm/MC/MCAsmInfo.h" 51 #include "llvm/MC/MCContext.h" 52 #include "llvm/MC/MCDirectives.h" 53 #include "llvm/MC/MCExpr.h" 54 #include "llvm/MC/MCInst.h" 55 #include "llvm/MC/MCInstBuilder.h" 56 #include "llvm/MC/MCSectionELF.h" 57 #include "llvm/MC/MCSectionXCOFF.h" 58 #include "llvm/MC/MCStreamer.h" 59 #include "llvm/MC/MCSymbol.h" 60 #include "llvm/MC/MCSymbolELF.h" 61 #include "llvm/MC/MCSymbolXCOFF.h" 62 #include "llvm/MC/SectionKind.h" 63 #include "llvm/MC/TargetRegistry.h" 64 #include "llvm/Support/Casting.h" 65 #include "llvm/Support/CodeGen.h" 66 #include "llvm/Support/Debug.h" 67 #include "llvm/Support/Error.h" 68 #include "llvm/Support/ErrorHandling.h" 69 #include "llvm/Support/Process.h" 70 #include "llvm/Support/raw_ostream.h" 71 #include "llvm/Support/Threading.h" 72 #include "llvm/Target/TargetMachine.h" 73 #include "llvm/TargetParser/Triple.h" 74 #include "llvm/Transforms/Utils/ModuleUtils.h" 75 #include <algorithm> 76 #include <cassert> 77 #include <cstdint> 78 #include <memory> 79 #include <new> 80 81 using namespace llvm; 82 using namespace llvm::XCOFF; 83 84 #define DEBUG_TYPE "asmprinter" 85 86 STATISTIC(NumTOCEntries, "Number of Total TOC Entries Emitted."); 87 STATISTIC(NumTOCConstPool, "Number of Constant Pool TOC Entries."); 88 STATISTIC(NumTOCGlobalInternal, 89 "Number of Internal Linkage Global TOC Entries."); 90 STATISTIC(NumTOCGlobalExternal, 91 "Number of External Linkage Global TOC Entries."); 92 STATISTIC(NumTOCJumpTable, "Number of Jump Table TOC Entries."); 93 STATISTIC(NumTOCThreadLocal, "Number of Thread Local TOC Entries."); 94 STATISTIC(NumTOCBlockAddress, "Number of Block Address TOC Entries."); 95 STATISTIC(NumTOCEHBlock, "Number of EH Block TOC Entries."); 96 97 static cl::opt<bool> EnableSSPCanaryBitInTB( 98 "aix-ssp-tb-bit", cl::init(false), 99 cl::desc("Enable Passing SSP Canary info in Trackback on AIX"), cl::Hidden); 100 101 // Specialize DenseMapInfo to allow 102 // std::pair<const MCSymbol *, MCSymbolRefExpr::VariantKind> in DenseMap. 103 // This specialization is needed here because that type is used as keys in the 104 // map representing TOC entries. 105 namespace llvm { 106 template <> 107 struct DenseMapInfo<std::pair<const MCSymbol *, MCSymbolRefExpr::VariantKind>> { 108 using TOCKey = std::pair<const MCSymbol *, MCSymbolRefExpr::VariantKind>; 109 110 static inline TOCKey getEmptyKey() { 111 return {nullptr, MCSymbolRefExpr::VariantKind::VK_None}; 112 } 113 static inline TOCKey getTombstoneKey() { 114 return {nullptr, MCSymbolRefExpr::VariantKind::VK_Invalid}; 115 } 116 static unsigned getHashValue(const TOCKey &PairVal) { 117 return detail::combineHashValue( 118 DenseMapInfo<const MCSymbol *>::getHashValue(PairVal.first), 119 DenseMapInfo<int>::getHashValue(PairVal.second)); 120 } 121 static bool isEqual(const TOCKey &A, const TOCKey &B) { return A == B; } 122 }; 123 } // end namespace llvm 124 125 namespace { 126 127 enum { 128 // GNU attribute tags for PowerPC ABI 129 Tag_GNU_Power_ABI_FP = 4, 130 Tag_GNU_Power_ABI_Vector = 8, 131 Tag_GNU_Power_ABI_Struct_Return = 12, 132 133 // GNU attribute values for PowerPC float ABI, as combination of two parts 134 Val_GNU_Power_ABI_NoFloat = 0b00, 135 Val_GNU_Power_ABI_HardFloat_DP = 0b01, 136 Val_GNU_Power_ABI_SoftFloat_DP = 0b10, 137 Val_GNU_Power_ABI_HardFloat_SP = 0b11, 138 139 Val_GNU_Power_ABI_LDBL_IBM128 = 0b0100, 140 Val_GNU_Power_ABI_LDBL_64 = 0b1000, 141 Val_GNU_Power_ABI_LDBL_IEEE128 = 0b1100, 142 }; 143 144 class PPCAsmPrinter : public AsmPrinter { 145 protected: 146 // For TLS on AIX, we need to be able to identify TOC entries of specific 147 // VariantKind so we can add the right relocations when we generate the 148 // entries. So each entry is represented by a pair of MCSymbol and 149 // VariantKind. For example, we need to be able to identify the following 150 // entry as a TLSGD entry so we can add the @m relocation: 151 // .tc .i[TC],i[TL]@m 152 // By default, VK_None is used for the VariantKind. 153 MapVector<std::pair<const MCSymbol *, MCSymbolRefExpr::VariantKind>, 154 MCSymbol *> 155 TOC; 156 const PPCSubtarget *Subtarget = nullptr; 157 158 public: 159 explicit PPCAsmPrinter(TargetMachine &TM, 160 std::unique_ptr<MCStreamer> Streamer) 161 : AsmPrinter(TM, std::move(Streamer)) {} 162 163 StringRef getPassName() const override { return "PowerPC Assembly Printer"; } 164 165 enum TOCEntryType { 166 TOCType_ConstantPool, 167 TOCType_GlobalExternal, 168 TOCType_GlobalInternal, 169 TOCType_JumpTable, 170 TOCType_ThreadLocal, 171 TOCType_BlockAddress, 172 TOCType_EHBlock 173 }; 174 175 MCSymbol *lookUpOrCreateTOCEntry(const MCSymbol *Sym, TOCEntryType Type, 176 MCSymbolRefExpr::VariantKind Kind = 177 MCSymbolRefExpr::VariantKind::VK_None); 178 179 bool doInitialization(Module &M) override { 180 if (!TOC.empty()) 181 TOC.clear(); 182 return AsmPrinter::doInitialization(M); 183 } 184 185 void emitInstruction(const MachineInstr *MI) override; 186 187 /// This function is for PrintAsmOperand and PrintAsmMemoryOperand, 188 /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only. 189 /// The \p MI would be INLINEASM ONLY. 190 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O); 191 192 void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) override; 193 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 194 const char *ExtraCode, raw_ostream &O) override; 195 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 196 const char *ExtraCode, raw_ostream &O) override; 197 198 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI); 199 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI); 200 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK); 201 void EmitAIXTlsCallHelper(const MachineInstr *MI); 202 bool runOnMachineFunction(MachineFunction &MF) override { 203 Subtarget = &MF.getSubtarget<PPCSubtarget>(); 204 bool Changed = AsmPrinter::runOnMachineFunction(MF); 205 emitXRayTable(); 206 return Changed; 207 } 208 }; 209 210 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux 211 class PPCLinuxAsmPrinter : public PPCAsmPrinter { 212 public: 213 explicit PPCLinuxAsmPrinter(TargetMachine &TM, 214 std::unique_ptr<MCStreamer> Streamer) 215 : PPCAsmPrinter(TM, std::move(Streamer)) {} 216 217 StringRef getPassName() const override { 218 return "Linux PPC Assembly Printer"; 219 } 220 221 void emitGNUAttributes(Module &M); 222 223 void emitStartOfAsmFile(Module &M) override; 224 void emitEndOfAsmFile(Module &) override; 225 226 void emitFunctionEntryLabel() override; 227 228 void emitFunctionBodyStart() override; 229 void emitFunctionBodyEnd() override; 230 void emitInstruction(const MachineInstr *MI) override; 231 }; 232 233 class PPCAIXAsmPrinter : public PPCAsmPrinter { 234 private: 235 /// Symbols lowered from ExternalSymbolSDNodes, we will need to emit extern 236 /// linkage for them in AIX. 237 SmallPtrSet<MCSymbol *, 8> ExtSymSDNodeSymbols; 238 239 /// A format indicator and unique trailing identifier to form part of the 240 /// sinit/sterm function names. 241 std::string FormatIndicatorAndUniqueModId; 242 243 // Record a list of GlobalAlias associated with a GlobalObject. 244 // This is used for AIX's extra-label-at-definition aliasing strategy. 245 DenseMap<const GlobalObject *, SmallVector<const GlobalAlias *, 1>> 246 GOAliasMap; 247 248 uint16_t getNumberOfVRSaved(); 249 void emitTracebackTable(); 250 251 SmallVector<const GlobalVariable *, 8> TOCDataGlobalVars; 252 253 void emitGlobalVariableHelper(const GlobalVariable *); 254 255 // Get the offset of an alias based on its AliaseeObject. 256 uint64_t getAliasOffset(const Constant *C); 257 258 public: 259 PPCAIXAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer) 260 : PPCAsmPrinter(TM, std::move(Streamer)) { 261 if (MAI->isLittleEndian()) 262 report_fatal_error( 263 "cannot create AIX PPC Assembly Printer for a little-endian target"); 264 } 265 266 StringRef getPassName() const override { return "AIX PPC Assembly Printer"; } 267 268 bool doInitialization(Module &M) override; 269 270 void emitXXStructorList(const DataLayout &DL, const Constant *List, 271 bool IsCtor) override; 272 273 void SetupMachineFunction(MachineFunction &MF) override; 274 275 void emitGlobalVariable(const GlobalVariable *GV) override; 276 277 void emitFunctionDescriptor() override; 278 279 void emitFunctionEntryLabel() override; 280 281 void emitFunctionBodyEnd() override; 282 283 void emitPGORefs(Module &M); 284 285 void emitEndOfAsmFile(Module &) override; 286 287 void emitLinkage(const GlobalValue *GV, MCSymbol *GVSym) const override; 288 289 void emitInstruction(const MachineInstr *MI) override; 290 291 bool doFinalization(Module &M) override; 292 293 void emitTTypeReference(const GlobalValue *GV, unsigned Encoding) override; 294 295 void emitModuleCommandLines(Module &M) override; 296 }; 297 298 } // end anonymous namespace 299 300 void PPCAsmPrinter::PrintSymbolOperand(const MachineOperand &MO, 301 raw_ostream &O) { 302 // Computing the address of a global symbol, not calling it. 303 const GlobalValue *GV = MO.getGlobal(); 304 getSymbol(GV)->print(O, MAI); 305 printOffset(MO.getOffset(), O); 306 } 307 308 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 309 raw_ostream &O) { 310 const DataLayout &DL = getDataLayout(); 311 const MachineOperand &MO = MI->getOperand(OpNo); 312 313 switch (MO.getType()) { 314 case MachineOperand::MO_Register: { 315 // The MI is INLINEASM ONLY and UseVSXReg is always false. 316 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); 317 318 // Linux assembler (Others?) does not take register mnemonics. 319 // FIXME - What about special registers used in mfspr/mtspr? 320 O << PPC::stripRegisterPrefix(RegName); 321 return; 322 } 323 case MachineOperand::MO_Immediate: 324 O << MO.getImm(); 325 return; 326 327 case MachineOperand::MO_MachineBasicBlock: 328 MO.getMBB()->getSymbol()->print(O, MAI); 329 return; 330 case MachineOperand::MO_ConstantPoolIndex: 331 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_' 332 << MO.getIndex(); 333 return; 334 case MachineOperand::MO_BlockAddress: 335 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI); 336 return; 337 case MachineOperand::MO_GlobalAddress: { 338 PrintSymbolOperand(MO, O); 339 return; 340 } 341 342 default: 343 O << "<unknown operand type: " << (unsigned)MO.getType() << ">"; 344 return; 345 } 346 } 347 348 /// PrintAsmOperand - Print out an operand for an inline asm expression. 349 /// 350 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, 351 const char *ExtraCode, raw_ostream &O) { 352 // Does this asm operand have a single letter operand modifier? 353 if (ExtraCode && ExtraCode[0]) { 354 if (ExtraCode[1] != 0) return true; // Unknown modifier. 355 356 switch (ExtraCode[0]) { 357 default: 358 // See if this is a generic print operand 359 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O); 360 case 'L': // Write second word of DImode reference. 361 // Verify that this operand has two consecutive registers. 362 if (!MI->getOperand(OpNo).isReg() || 363 OpNo+1 == MI->getNumOperands() || 364 !MI->getOperand(OpNo+1).isReg()) 365 return true; 366 ++OpNo; // Return the high-part. 367 break; 368 case 'I': 369 // Write 'i' if an integer constant, otherwise nothing. Used to print 370 // addi vs add, etc. 371 if (MI->getOperand(OpNo).isImm()) 372 O << "i"; 373 return false; 374 case 'x': 375 if(!MI->getOperand(OpNo).isReg()) 376 return true; 377 // This operand uses VSX numbering. 378 // If the operand is a VMX register, convert it to a VSX register. 379 Register Reg = MI->getOperand(OpNo).getReg(); 380 if (PPC::isVRRegister(Reg)) 381 Reg = PPC::VSX32 + (Reg - PPC::V0); 382 else if (PPC::isVFRegister(Reg)) 383 Reg = PPC::VSX32 + (Reg - PPC::VF0); 384 const char *RegName; 385 RegName = PPCInstPrinter::getRegisterName(Reg); 386 RegName = PPC::stripRegisterPrefix(RegName); 387 O << RegName; 388 return false; 389 } 390 } 391 392 printOperand(MI, OpNo, O); 393 return false; 394 } 395 396 // At the moment, all inline asm memory operands are a single register. 397 // In any case, the output of this routine should always be just one 398 // assembler operand. 399 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, 400 const char *ExtraCode, 401 raw_ostream &O) { 402 if (ExtraCode && ExtraCode[0]) { 403 if (ExtraCode[1] != 0) return true; // Unknown modifier. 404 405 switch (ExtraCode[0]) { 406 default: return true; // Unknown modifier. 407 case 'L': // A memory reference to the upper word of a double word op. 408 O << getDataLayout().getPointerSize() << "("; 409 printOperand(MI, OpNo, O); 410 O << ")"; 411 return false; 412 case 'y': // A memory reference for an X-form instruction 413 O << "0, "; 414 printOperand(MI, OpNo, O); 415 return false; 416 case 'I': 417 // Write 'i' if an integer constant, otherwise nothing. Used to print 418 // addi vs add, etc. 419 if (MI->getOperand(OpNo).isImm()) 420 O << "i"; 421 return false; 422 case 'U': // Print 'u' for update form. 423 case 'X': // Print 'x' for indexed form. 424 // FIXME: Currently for PowerPC memory operands are always loaded 425 // into a register, so we never get an update or indexed form. 426 // This is bad even for offset forms, since even if we know we 427 // have a value in -16(r1), we will generate a load into r<n> 428 // and then load from 0(r<n>). Until that issue is fixed, 429 // tolerate 'U' and 'X' but don't output anything. 430 assert(MI->getOperand(OpNo).isReg()); 431 return false; 432 } 433 } 434 435 assert(MI->getOperand(OpNo).isReg()); 436 O << "0("; 437 printOperand(MI, OpNo, O); 438 O << ")"; 439 return false; 440 } 441 442 static void collectTOCStats(PPCAsmPrinter::TOCEntryType Type) { 443 ++NumTOCEntries; 444 switch (Type) { 445 case PPCAsmPrinter::TOCType_ConstantPool: 446 ++NumTOCConstPool; 447 break; 448 case PPCAsmPrinter::TOCType_GlobalInternal: 449 ++NumTOCGlobalInternal; 450 break; 451 case PPCAsmPrinter::TOCType_GlobalExternal: 452 ++NumTOCGlobalExternal; 453 break; 454 case PPCAsmPrinter::TOCType_JumpTable: 455 ++NumTOCJumpTable; 456 break; 457 case PPCAsmPrinter::TOCType_ThreadLocal: 458 ++NumTOCThreadLocal; 459 break; 460 case PPCAsmPrinter::TOCType_BlockAddress: 461 ++NumTOCBlockAddress; 462 break; 463 case PPCAsmPrinter::TOCType_EHBlock: 464 ++NumTOCEHBlock; 465 break; 466 } 467 } 468 469 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry 470 /// exists for it. If not, create one. Then return a symbol that references 471 /// the TOC entry. 472 MCSymbol * 473 PPCAsmPrinter::lookUpOrCreateTOCEntry(const MCSymbol *Sym, TOCEntryType Type, 474 MCSymbolRefExpr::VariantKind Kind) { 475 // If this is a new TOC entry add statistics about it. 476 if (!TOC.contains({Sym, Kind})) 477 collectTOCStats(Type); 478 479 MCSymbol *&TOCEntry = TOC[{Sym, Kind}]; 480 if (!TOCEntry) 481 TOCEntry = createTempSymbol("C"); 482 return TOCEntry; 483 } 484 485 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) { 486 unsigned NumNOPBytes = MI.getOperand(1).getImm(); 487 488 auto &Ctx = OutStreamer->getContext(); 489 MCSymbol *MILabel = Ctx.createTempSymbol(); 490 OutStreamer->emitLabel(MILabel); 491 492 SM.recordStackMap(*MILabel, MI); 493 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!"); 494 495 // Scan ahead to trim the shadow. 496 const MachineBasicBlock &MBB = *MI.getParent(); 497 MachineBasicBlock::const_iterator MII(MI); 498 ++MII; 499 while (NumNOPBytes > 0) { 500 if (MII == MBB.end() || MII->isCall() || 501 MII->getOpcode() == PPC::DBG_VALUE || 502 MII->getOpcode() == TargetOpcode::PATCHPOINT || 503 MII->getOpcode() == TargetOpcode::STACKMAP) 504 break; 505 ++MII; 506 NumNOPBytes -= 4; 507 } 508 509 // Emit nops. 510 for (unsigned i = 0; i < NumNOPBytes; i += 4) 511 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 512 } 513 514 // Lower a patchpoint of the form: 515 // [<def>], <id>, <numBytes>, <target>, <numArgs> 516 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) { 517 auto &Ctx = OutStreamer->getContext(); 518 MCSymbol *MILabel = Ctx.createTempSymbol(); 519 OutStreamer->emitLabel(MILabel); 520 521 SM.recordPatchPoint(*MILabel, MI); 522 PatchPointOpers Opers(&MI); 523 524 unsigned EncodedBytes = 0; 525 const MachineOperand &CalleeMO = Opers.getCallTarget(); 526 527 if (CalleeMO.isImm()) { 528 int64_t CallTarget = CalleeMO.getImm(); 529 if (CallTarget) { 530 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget && 531 "High 16 bits of call target should be zero."); 532 Register ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); 533 EncodedBytes = 0; 534 // Materialize the jump address: 535 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8) 536 .addReg(ScratchReg) 537 .addImm((CallTarget >> 32) & 0xFFFF)); 538 ++EncodedBytes; 539 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC) 540 .addReg(ScratchReg) 541 .addReg(ScratchReg) 542 .addImm(32).addImm(16)); 543 ++EncodedBytes; 544 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8) 545 .addReg(ScratchReg) 546 .addReg(ScratchReg) 547 .addImm((CallTarget >> 16) & 0xFFFF)); 548 ++EncodedBytes; 549 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8) 550 .addReg(ScratchReg) 551 .addReg(ScratchReg) 552 .addImm(CallTarget & 0xFFFF)); 553 554 // Save the current TOC pointer before the remote call. 555 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset(); 556 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD) 557 .addReg(PPC::X2) 558 .addImm(TOCSaveOffset) 559 .addReg(PPC::X1)); 560 ++EncodedBytes; 561 562 // If we're on ELFv1, then we need to load the actual function pointer 563 // from the function descriptor. 564 if (!Subtarget->isELFv2ABI()) { 565 // Load the new TOC pointer and the function address, but not r11 566 // (needing this is rare, and loading it here would prevent passing it 567 // via a 'nest' parameter. 568 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 569 .addReg(PPC::X2) 570 .addImm(8) 571 .addReg(ScratchReg)); 572 ++EncodedBytes; 573 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 574 .addReg(ScratchReg) 575 .addImm(0) 576 .addReg(ScratchReg)); 577 ++EncodedBytes; 578 } 579 580 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8) 581 .addReg(ScratchReg)); 582 ++EncodedBytes; 583 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8)); 584 ++EncodedBytes; 585 586 // Restore the TOC pointer after the call. 587 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 588 .addReg(PPC::X2) 589 .addImm(TOCSaveOffset) 590 .addReg(PPC::X1)); 591 ++EncodedBytes; 592 } 593 } else if (CalleeMO.isGlobal()) { 594 const GlobalValue *GValue = CalleeMO.getGlobal(); 595 MCSymbol *MOSymbol = getSymbol(GValue); 596 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext); 597 598 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP) 599 .addExpr(SymVar)); 600 EncodedBytes += 2; 601 } 602 603 // Each instruction is 4 bytes. 604 EncodedBytes *= 4; 605 606 // Emit padding. 607 unsigned NumBytes = Opers.getNumPatchBytes(); 608 assert(NumBytes >= EncodedBytes && 609 "Patchpoint can't request size less than the length of a call."); 610 assert((NumBytes - EncodedBytes) % 4 == 0 && 611 "Invalid number of NOP bytes requested!"); 612 for (unsigned i = EncodedBytes; i < NumBytes; i += 4) 613 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 614 } 615 616 /// This helper function creates the TlsGetAddr MCSymbol for AIX. We will 617 /// create the csect and use the qual-name symbol instead of creating just the 618 /// external symbol. 619 static MCSymbol *createMCSymbolForTlsGetAddr(MCContext &Ctx, unsigned MIOpc) { 620 StringRef SymName = 621 MIOpc == PPC::GETtlsTpointer32AIX ? ".__get_tpointer" : ".__tls_get_addr"; 622 return Ctx 623 .getXCOFFSection(SymName, SectionKind::getText(), 624 XCOFF::CsectProperties(XCOFF::XMC_PR, XCOFF::XTY_ER)) 625 ->getQualNameSymbol(); 626 } 627 628 void PPCAsmPrinter::EmitAIXTlsCallHelper(const MachineInstr *MI) { 629 assert(Subtarget->isAIXABI() && 630 "Only expecting to emit calls to get the thread pointer on AIX!"); 631 632 MCSymbol *TlsCall = createMCSymbolForTlsGetAddr(OutContext, MI->getOpcode()); 633 const MCExpr *TlsRef = 634 MCSymbolRefExpr::create(TlsCall, MCSymbolRefExpr::VK_None, OutContext); 635 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BLA).addExpr(TlsRef)); 636 } 637 638 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a 639 /// call to __tls_get_addr to the current output stream. 640 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI, 641 MCSymbolRefExpr::VariantKind VK) { 642 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None; 643 unsigned Opcode = PPC::BL8_NOP_TLS; 644 645 assert(MI->getNumOperands() >= 3 && "Expecting at least 3 operands from MI"); 646 if (MI->getOperand(2).getTargetFlags() == PPCII::MO_GOT_TLSGD_PCREL_FLAG || 647 MI->getOperand(2).getTargetFlags() == PPCII::MO_GOT_TLSLD_PCREL_FLAG) { 648 Kind = MCSymbolRefExpr::VK_PPC_NOTOC; 649 Opcode = PPC::BL8_NOTOC_TLS; 650 } 651 const Module *M = MF->getFunction().getParent(); 652 653 assert(MI->getOperand(0).isReg() && 654 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || 655 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && 656 "GETtls[ld]ADDR[32] must define GPR3"); 657 assert(MI->getOperand(1).isReg() && 658 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || 659 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && 660 "GETtls[ld]ADDR[32] must read GPR3"); 661 662 if (Subtarget->isAIXABI()) { 663 // On AIX, the variable offset should already be in R4 and the region handle 664 // should already be in R3. 665 // For TLSGD, which currently is the only supported access model, we only 666 // need to generate an absolute branch to .__tls_get_addr. 667 Register VarOffsetReg = Subtarget->isPPC64() ? PPC::X4 : PPC::R4; 668 (void)VarOffsetReg; 669 assert(MI->getOperand(2).isReg() && 670 MI->getOperand(2).getReg() == VarOffsetReg && 671 "GETtls[ld]ADDR[32] must read GPR4"); 672 EmitAIXTlsCallHelper(MI); 673 return; 674 } 675 676 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol("__tls_get_addr"); 677 678 if (Subtarget->is32BitELFABI() && isPositionIndependent()) 679 Kind = MCSymbolRefExpr::VK_PLT; 680 681 const MCExpr *TlsRef = 682 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext); 683 684 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI. 685 if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt() && 686 M->getPICLevel() == PICLevel::BigPIC) 687 TlsRef = MCBinaryExpr::createAdd( 688 TlsRef, MCConstantExpr::create(32768, OutContext), OutContext); 689 const MachineOperand &MO = MI->getOperand(2); 690 const GlobalValue *GValue = MO.getGlobal(); 691 MCSymbol *MOSymbol = getSymbol(GValue); 692 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 693 EmitToStreamer(*OutStreamer, 694 MCInstBuilder(Subtarget->isPPC64() ? Opcode 695 : (unsigned)PPC::BL_TLS) 696 .addExpr(TlsRef) 697 .addExpr(SymVar)); 698 } 699 700 /// Map a machine operand for a TOC pseudo-machine instruction to its 701 /// corresponding MCSymbol. 702 static MCSymbol *getMCSymbolForTOCPseudoMO(const MachineOperand &MO, 703 AsmPrinter &AP) { 704 switch (MO.getType()) { 705 case MachineOperand::MO_GlobalAddress: 706 return AP.getSymbol(MO.getGlobal()); 707 case MachineOperand::MO_ConstantPoolIndex: 708 return AP.GetCPISymbol(MO.getIndex()); 709 case MachineOperand::MO_JumpTableIndex: 710 return AP.GetJTISymbol(MO.getIndex()); 711 case MachineOperand::MO_BlockAddress: 712 return AP.GetBlockAddressSymbol(MO.getBlockAddress()); 713 default: 714 llvm_unreachable("Unexpected operand type to get symbol."); 715 } 716 } 717 718 static PPCAsmPrinter::TOCEntryType 719 getTOCEntryTypeForMO(const MachineOperand &MO) { 720 // Use the target flags to determine if this MO is Thread Local. 721 // If we don't do this it comes out as Global. 722 if (PPCInstrInfo::hasTLSFlag(MO.getTargetFlags())) 723 return PPCAsmPrinter::TOCType_ThreadLocal; 724 725 switch (MO.getType()) { 726 case MachineOperand::MO_GlobalAddress: { 727 const GlobalValue *GlobalV = MO.getGlobal(); 728 GlobalValue::LinkageTypes Linkage = GlobalV->getLinkage(); 729 if (Linkage == GlobalValue::ExternalLinkage || 730 Linkage == GlobalValue::AvailableExternallyLinkage || 731 Linkage == GlobalValue::ExternalWeakLinkage) 732 return PPCAsmPrinter::TOCType_GlobalExternal; 733 734 return PPCAsmPrinter::TOCType_GlobalInternal; 735 } 736 case MachineOperand::MO_ConstantPoolIndex: 737 return PPCAsmPrinter::TOCType_ConstantPool; 738 case MachineOperand::MO_JumpTableIndex: 739 return PPCAsmPrinter::TOCType_JumpTable; 740 case MachineOperand::MO_BlockAddress: 741 return PPCAsmPrinter::TOCType_BlockAddress; 742 default: 743 llvm_unreachable("Unexpected operand type to get TOC type."); 744 } 745 } 746 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to 747 /// the current output stream. 748 /// 749 void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) { 750 PPC_MC::verifyInstructionPredicates(MI->getOpcode(), 751 getSubtargetInfo().getFeatureBits()); 752 753 MCInst TmpInst; 754 const bool IsPPC64 = Subtarget->isPPC64(); 755 const bool IsAIX = Subtarget->isAIXABI(); 756 const Module *M = MF->getFunction().getParent(); 757 PICLevel::Level PL = M->getPICLevel(); 758 759 #ifndef NDEBUG 760 // Validate that SPE and FPU are mutually exclusive in codegen 761 if (!MI->isInlineAsm()) { 762 for (const MachineOperand &MO: MI->operands()) { 763 if (MO.isReg()) { 764 Register Reg = MO.getReg(); 765 if (Subtarget->hasSPE()) { 766 if (PPC::F4RCRegClass.contains(Reg) || 767 PPC::F8RCRegClass.contains(Reg) || 768 PPC::VFRCRegClass.contains(Reg) || 769 PPC::VRRCRegClass.contains(Reg) || 770 PPC::VSFRCRegClass.contains(Reg) || 771 PPC::VSSRCRegClass.contains(Reg) 772 ) 773 llvm_unreachable("SPE targets cannot have FPRegs!"); 774 } else { 775 if (PPC::SPERCRegClass.contains(Reg)) 776 llvm_unreachable("SPE register found in FPU-targeted code!"); 777 } 778 } 779 } 780 } 781 #endif 782 783 auto getTOCRelocAdjustedExprForXCOFF = [this](const MCExpr *Expr, 784 ptrdiff_t OriginalOffset) { 785 // Apply an offset to the TOC-based expression such that the adjusted 786 // notional offset from the TOC base (to be encoded into the instruction's D 787 // or DS field) is the signed 16-bit truncation of the original notional 788 // offset from the TOC base. 789 // This is consistent with the treatment used both by XL C/C++ and 790 // by AIX ld -r. 791 ptrdiff_t Adjustment = 792 OriginalOffset - llvm::SignExtend32<16>(OriginalOffset); 793 return MCBinaryExpr::createAdd( 794 Expr, MCConstantExpr::create(-Adjustment, OutContext), OutContext); 795 }; 796 797 auto getTOCEntryLoadingExprForXCOFF = 798 [IsPPC64, getTOCRelocAdjustedExprForXCOFF, 799 this](const MCSymbol *MOSymbol, const MCExpr *Expr, 800 MCSymbolRefExpr::VariantKind VK = 801 MCSymbolRefExpr::VariantKind::VK_None) -> const MCExpr * { 802 const unsigned EntryByteSize = IsPPC64 ? 8 : 4; 803 const auto TOCEntryIter = TOC.find({MOSymbol, VK}); 804 assert(TOCEntryIter != TOC.end() && 805 "Could not find the TOC entry for this symbol."); 806 const ptrdiff_t EntryDistanceFromTOCBase = 807 (TOCEntryIter - TOC.begin()) * EntryByteSize; 808 constexpr int16_t PositiveTOCRange = INT16_MAX; 809 810 if (EntryDistanceFromTOCBase > PositiveTOCRange) 811 return getTOCRelocAdjustedExprForXCOFF(Expr, EntryDistanceFromTOCBase); 812 813 return Expr; 814 }; 815 auto GetVKForMO = [&](const MachineOperand &MO) { 816 // For TLS initial-exec and local-exec accesses on AIX, we have one TOC 817 // entry for the symbol (with the variable offset), which is differentiated 818 // by MO_TPREL_FLAG. 819 unsigned Flag = MO.getTargetFlags(); 820 if (Flag == PPCII::MO_TPREL_FLAG || 821 Flag == PPCII::MO_GOT_TPREL_PCREL_FLAG || 822 Flag == PPCII::MO_TPREL_PCREL_FLAG) { 823 assert(MO.isGlobal() && "Only expecting a global MachineOperand here!\n"); 824 TLSModel::Model Model = TM.getTLSModel(MO.getGlobal()); 825 if (Model == TLSModel::LocalExec) 826 return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLE; 827 if (Model == TLSModel::InitialExec) 828 return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSIE; 829 llvm_unreachable("Only expecting local-exec or initial-exec accesses!"); 830 } 831 // For GD TLS access on AIX, we have two TOC entries for the symbol (one for 832 // the variable offset and the other for the region handle). They are 833 // differentiated by MO_TLSGD_FLAG and MO_TLSGDM_FLAG. 834 if (Flag == PPCII::MO_TLSGDM_FLAG) 835 return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM; 836 if (Flag == PPCII::MO_TLSGD_FLAG || Flag == PPCII::MO_GOT_TLSGD_PCREL_FLAG) 837 return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGD; 838 return MCSymbolRefExpr::VariantKind::VK_None; 839 }; 840 841 // Lower multi-instruction pseudo operations. 842 switch (MI->getOpcode()) { 843 default: break; 844 case TargetOpcode::DBG_VALUE: 845 llvm_unreachable("Should be handled target independently"); 846 case TargetOpcode::STACKMAP: 847 return LowerSTACKMAP(SM, *MI); 848 case TargetOpcode::PATCHPOINT: 849 return LowerPATCHPOINT(SM, *MI); 850 851 case PPC::MoveGOTtoLR: { 852 // Transform %lr = MoveGOTtoLR 853 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4 854 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding 855 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction: 856 // blrl 857 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local 858 MCSymbol *GOTSymbol = 859 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 860 const MCExpr *OffsExpr = 861 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, 862 MCSymbolRefExpr::VK_PPC_LOCAL, 863 OutContext), 864 MCConstantExpr::create(4, OutContext), 865 OutContext); 866 867 // Emit the 'bl'. 868 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr)); 869 return; 870 } 871 case PPC::MovePCtoLR: 872 case PPC::MovePCtoLR8: { 873 // Transform %lr = MovePCtoLR 874 // Into this, where the label is the PIC base: 875 // bl L1$pb 876 // L1$pb: 877 MCSymbol *PICBase = MF->getPICBaseSymbol(); 878 879 // Emit the 'bl'. 880 EmitToStreamer(*OutStreamer, 881 MCInstBuilder(PPC::BL) 882 // FIXME: We would like an efficient form for this, so we 883 // don't have to do a lot of extra uniquing. 884 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext))); 885 886 // Emit the label. 887 OutStreamer->emitLabel(PICBase); 888 return; 889 } 890 case PPC::UpdateGBR: { 891 // Transform %rd = UpdateGBR(%rt, %ri) 892 // Into: lwz %rt, .L0$poff - .L0$pb(%ri) 893 // add %rd, %rt, %ri 894 // or into (if secure plt mode is on): 895 // addis r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@ha 896 // addi r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@l 897 // Get the offset from the GOT Base Register to the GOT 898 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this); 899 if (Subtarget->isSecurePlt() && isPositionIndependent() ) { 900 unsigned PICR = TmpInst.getOperand(0).getReg(); 901 MCSymbol *BaseSymbol = OutContext.getOrCreateSymbol( 902 M->getPICLevel() == PICLevel::SmallPIC ? "_GLOBAL_OFFSET_TABLE_" 903 : ".LTOC"); 904 const MCExpr *PB = 905 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), OutContext); 906 907 const MCExpr *DeltaExpr = MCBinaryExpr::createSub( 908 MCSymbolRefExpr::create(BaseSymbol, OutContext), PB, OutContext); 909 910 const MCExpr *DeltaHi = PPCMCExpr::createHa(DeltaExpr, OutContext); 911 EmitToStreamer( 912 *OutStreamer, 913 MCInstBuilder(PPC::ADDIS).addReg(PICR).addReg(PICR).addExpr(DeltaHi)); 914 915 const MCExpr *DeltaLo = PPCMCExpr::createLo(DeltaExpr, OutContext); 916 EmitToStreamer( 917 *OutStreamer, 918 MCInstBuilder(PPC::ADDI).addReg(PICR).addReg(PICR).addExpr(DeltaLo)); 919 return; 920 } else { 921 MCSymbol *PICOffset = 922 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(*MF); 923 TmpInst.setOpcode(PPC::LWZ); 924 const MCExpr *Exp = 925 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); 926 const MCExpr *PB = 927 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), 928 MCSymbolRefExpr::VK_None, 929 OutContext); 930 const MCOperand TR = TmpInst.getOperand(1); 931 const MCOperand PICR = TmpInst.getOperand(0); 932 933 // Step 1: lwz %rt, .L$poff - .L$pb(%ri) 934 TmpInst.getOperand(1) = 935 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext)); 936 TmpInst.getOperand(0) = TR; 937 TmpInst.getOperand(2) = PICR; 938 EmitToStreamer(*OutStreamer, TmpInst); 939 940 TmpInst.setOpcode(PPC::ADD4); 941 TmpInst.getOperand(0) = PICR; 942 TmpInst.getOperand(1) = TR; 943 TmpInst.getOperand(2) = PICR; 944 EmitToStreamer(*OutStreamer, TmpInst); 945 return; 946 } 947 } 948 case PPC::LWZtoc: { 949 // Transform %rN = LWZtoc @op1, %r2 950 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this); 951 952 // Change the opcode to LWZ. 953 TmpInst.setOpcode(PPC::LWZ); 954 955 const MachineOperand &MO = MI->getOperand(1); 956 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 957 "Invalid operand for LWZtoc."); 958 959 // Map the operand to its corresponding MCSymbol. 960 const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this); 961 962 // Create a reference to the GOT entry for the symbol. The GOT entry will be 963 // synthesized later. 964 if (PL == PICLevel::SmallPIC && !IsAIX) { 965 const MCExpr *Exp = 966 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT, 967 OutContext); 968 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 969 EmitToStreamer(*OutStreamer, TmpInst); 970 return; 971 } 972 973 MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO); 974 975 // Otherwise, use the TOC. 'TOCEntry' is a label used to reference the 976 // storage allocated in the TOC which contains the address of 977 // 'MOSymbol'. Said TOC entry will be synthesized later. 978 MCSymbol *TOCEntry = 979 lookUpOrCreateTOCEntry(MOSymbol, getTOCEntryTypeForMO(MO), VK); 980 const MCExpr *Exp = 981 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, OutContext); 982 983 // AIX uses the label directly as the lwz displacement operand for 984 // references into the toc section. The displacement value will be generated 985 // relative to the toc-base. 986 if (IsAIX) { 987 assert( 988 TM.getCodeModel() == CodeModel::Small && 989 "This pseudo should only be selected for 32-bit small code model."); 990 Exp = getTOCEntryLoadingExprForXCOFF(MOSymbol, Exp, VK); 991 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 992 993 // Print MO for better readability 994 if (isVerbose()) 995 OutStreamer->getCommentOS() << MO << '\n'; 996 EmitToStreamer(*OutStreamer, TmpInst); 997 return; 998 } 999 1000 // Create an explicit subtract expression between the local symbol and 1001 // '.LTOC' to manifest the toc-relative offset. 1002 const MCExpr *PB = MCSymbolRefExpr::create( 1003 OutContext.getOrCreateSymbol(Twine(".LTOC")), OutContext); 1004 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext); 1005 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 1006 EmitToStreamer(*OutStreamer, TmpInst); 1007 return; 1008 } 1009 case PPC::ADDItoc: 1010 case PPC::ADDItoc8: { 1011 assert(IsAIX && TM.getCodeModel() == CodeModel::Small && 1012 "PseudoOp only valid for small code model AIX"); 1013 1014 // Transform %rN = ADDItoc/8 @op1, %r2. 1015 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this); 1016 1017 // Change the opcode to load address. 1018 TmpInst.setOpcode((!IsPPC64) ? (PPC::LA) : (PPC::LA8)); 1019 1020 const MachineOperand &MO = MI->getOperand(1); 1021 assert(MO.isGlobal() && "Invalid operand for ADDItoc[8]."); 1022 1023 // Map the operand to its corresponding MCSymbol. 1024 const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this); 1025 1026 const MCExpr *Exp = 1027 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_None, OutContext); 1028 1029 TmpInst.getOperand(1) = TmpInst.getOperand(2); 1030 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 1031 EmitToStreamer(*OutStreamer, TmpInst); 1032 return; 1033 } 1034 case PPC::LDtocJTI: 1035 case PPC::LDtocCPT: 1036 case PPC::LDtocBA: 1037 case PPC::LDtoc: { 1038 // Transform %x3 = LDtoc @min1, %x2 1039 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this); 1040 1041 // Change the opcode to LD. 1042 TmpInst.setOpcode(PPC::LD); 1043 1044 const MachineOperand &MO = MI->getOperand(1); 1045 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 1046 "Invalid operand!"); 1047 1048 // Map the operand to its corresponding MCSymbol. 1049 const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this); 1050 1051 MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO); 1052 1053 // Map the machine operand to its corresponding MCSymbol, then map the 1054 // global address operand to be a reference to the TOC entry we will 1055 // synthesize later. 1056 MCSymbol *TOCEntry = 1057 lookUpOrCreateTOCEntry(MOSymbol, getTOCEntryTypeForMO(MO), VK); 1058 1059 MCSymbolRefExpr::VariantKind VKExpr = 1060 IsAIX ? MCSymbolRefExpr::VK_None : MCSymbolRefExpr::VK_PPC_TOC; 1061 const MCExpr *Exp = MCSymbolRefExpr::create(TOCEntry, VKExpr, OutContext); 1062 TmpInst.getOperand(1) = MCOperand::createExpr( 1063 IsAIX ? getTOCEntryLoadingExprForXCOFF(MOSymbol, Exp, VK) : Exp); 1064 1065 // Print MO for better readability 1066 if (isVerbose() && IsAIX) 1067 OutStreamer->getCommentOS() << MO << '\n'; 1068 EmitToStreamer(*OutStreamer, TmpInst); 1069 return; 1070 } 1071 case PPC::ADDIStocHA: { 1072 assert((IsAIX && !IsPPC64 && TM.getCodeModel() == CodeModel::Large) && 1073 "This pseudo should only be selected for 32-bit large code model on" 1074 " AIX."); 1075 1076 // Transform %rd = ADDIStocHA %rA, @sym(%r2) 1077 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this); 1078 1079 // Change the opcode to ADDIS. 1080 TmpInst.setOpcode(PPC::ADDIS); 1081 1082 const MachineOperand &MO = MI->getOperand(2); 1083 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 1084 "Invalid operand for ADDIStocHA."); 1085 1086 // Map the machine operand to its corresponding MCSymbol. 1087 MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this); 1088 1089 MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO); 1090 1091 // Always use TOC on AIX. Map the global address operand to be a reference 1092 // to the TOC entry we will synthesize later. 'TOCEntry' is a label used to 1093 // reference the storage allocated in the TOC which contains the address of 1094 // 'MOSymbol'. 1095 MCSymbol *TOCEntry = 1096 lookUpOrCreateTOCEntry(MOSymbol, getTOCEntryTypeForMO(MO), VK); 1097 const MCExpr *Exp = MCSymbolRefExpr::create(TOCEntry, 1098 MCSymbolRefExpr::VK_PPC_U, 1099 OutContext); 1100 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 1101 EmitToStreamer(*OutStreamer, TmpInst); 1102 return; 1103 } 1104 case PPC::LWZtocL: { 1105 assert(IsAIX && !IsPPC64 && TM.getCodeModel() == CodeModel::Large && 1106 "This pseudo should only be selected for 32-bit large code model on" 1107 " AIX."); 1108 1109 // Transform %rd = LWZtocL @sym, %rs. 1110 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this); 1111 1112 // Change the opcode to lwz. 1113 TmpInst.setOpcode(PPC::LWZ); 1114 1115 const MachineOperand &MO = MI->getOperand(1); 1116 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 1117 "Invalid operand for LWZtocL."); 1118 1119 // Map the machine operand to its corresponding MCSymbol. 1120 MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this); 1121 1122 MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO); 1123 1124 // Always use TOC on AIX. Map the global address operand to be a reference 1125 // to the TOC entry we will synthesize later. 'TOCEntry' is a label used to 1126 // reference the storage allocated in the TOC which contains the address of 1127 // 'MOSymbol'. 1128 MCSymbol *TOCEntry = 1129 lookUpOrCreateTOCEntry(MOSymbol, getTOCEntryTypeForMO(MO), VK); 1130 const MCExpr *Exp = MCSymbolRefExpr::create(TOCEntry, 1131 MCSymbolRefExpr::VK_PPC_L, 1132 OutContext); 1133 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 1134 EmitToStreamer(*OutStreamer, TmpInst); 1135 return; 1136 } 1137 case PPC::ADDIStocHA8: { 1138 // Transform %xd = ADDIStocHA8 %x2, @sym 1139 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this); 1140 1141 // Change the opcode to ADDIS8. If the global address is the address of 1142 // an external symbol, is a jump table address, is a block address, or is a 1143 // constant pool index with large code model enabled, then generate a TOC 1144 // entry and reference that. Otherwise, reference the symbol directly. 1145 TmpInst.setOpcode(PPC::ADDIS8); 1146 1147 const MachineOperand &MO = MI->getOperand(2); 1148 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) && 1149 "Invalid operand for ADDIStocHA8!"); 1150 1151 const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this); 1152 1153 MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO); 1154 1155 const bool GlobalToc = 1156 MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal()); 1157 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() || 1158 (MO.isCPI() && TM.getCodeModel() == CodeModel::Large)) 1159 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol, getTOCEntryTypeForMO(MO), VK); 1160 1161 VK = IsAIX ? MCSymbolRefExpr::VK_PPC_U : MCSymbolRefExpr::VK_PPC_TOC_HA; 1162 1163 const MCExpr *Exp = 1164 MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 1165 1166 if (!MO.isJTI() && MO.getOffset()) 1167 Exp = MCBinaryExpr::createAdd(Exp, 1168 MCConstantExpr::create(MO.getOffset(), 1169 OutContext), 1170 OutContext); 1171 1172 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 1173 EmitToStreamer(*OutStreamer, TmpInst); 1174 return; 1175 } 1176 case PPC::LDtocL: { 1177 // Transform %xd = LDtocL @sym, %xs 1178 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this); 1179 1180 // Change the opcode to LD. If the global address is the address of 1181 // an external symbol, is a jump table address, is a block address, or is 1182 // a constant pool index with large code model enabled, then generate a 1183 // TOC entry and reference that. Otherwise, reference the symbol directly. 1184 TmpInst.setOpcode(PPC::LD); 1185 1186 const MachineOperand &MO = MI->getOperand(1); 1187 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || 1188 MO.isBlockAddress()) && 1189 "Invalid operand for LDtocL!"); 1190 1191 LLVM_DEBUG(assert( 1192 (!MO.isGlobal() || Subtarget->isGVIndirectSymbol(MO.getGlobal())) && 1193 "LDtocL used on symbol that could be accessed directly is " 1194 "invalid. Must match ADDIStocHA8.")); 1195 1196 const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this); 1197 1198 MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO); 1199 1200 if (!MO.isCPI() || TM.getCodeModel() == CodeModel::Large) 1201 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol, getTOCEntryTypeForMO(MO), VK); 1202 1203 VK = IsAIX ? MCSymbolRefExpr::VK_PPC_L : MCSymbolRefExpr::VK_PPC_TOC_LO; 1204 const MCExpr *Exp = 1205 MCSymbolRefExpr::create(MOSymbol, VK, OutContext); 1206 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 1207 EmitToStreamer(*OutStreamer, TmpInst); 1208 return; 1209 } 1210 case PPC::ADDItocL: { 1211 // Transform %xd = ADDItocL %xs, @sym 1212 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this); 1213 1214 // Change the opcode to ADDI8. If the global address is external, then 1215 // generate a TOC entry and reference that. Otherwise, reference the 1216 // symbol directly. 1217 TmpInst.setOpcode(PPC::ADDI8); 1218 1219 const MachineOperand &MO = MI->getOperand(2); 1220 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL."); 1221 1222 LLVM_DEBUG(assert( 1223 !(MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal())) && 1224 "Interposable definitions must use indirect access.")); 1225 1226 const MCExpr *Exp = 1227 MCSymbolRefExpr::create(getMCSymbolForTOCPseudoMO(MO, *this), 1228 MCSymbolRefExpr::VK_PPC_TOC_LO, OutContext); 1229 TmpInst.getOperand(2) = MCOperand::createExpr(Exp); 1230 EmitToStreamer(*OutStreamer, TmpInst); 1231 return; 1232 } 1233 case PPC::ADDISgotTprelHA: { 1234 // Transform: %xd = ADDISgotTprelHA %x2, @sym 1235 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 1236 assert(IsPPC64 && "Not supported for 32-bit PowerPC"); 1237 const MachineOperand &MO = MI->getOperand(2); 1238 const GlobalValue *GValue = MO.getGlobal(); 1239 MCSymbol *MOSymbol = getSymbol(GValue); 1240 const MCExpr *SymGotTprel = 1241 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA, 1242 OutContext); 1243 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 1244 .addReg(MI->getOperand(0).getReg()) 1245 .addReg(MI->getOperand(1).getReg()) 1246 .addExpr(SymGotTprel)); 1247 return; 1248 } 1249 case PPC::LDgotTprelL: 1250 case PPC::LDgotTprelL32: { 1251 // Transform %xd = LDgotTprelL @sym, %xs 1252 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this); 1253 1254 // Change the opcode to LD. 1255 TmpInst.setOpcode(IsPPC64 ? PPC::LD : PPC::LWZ); 1256 const MachineOperand &MO = MI->getOperand(1); 1257 const GlobalValue *GValue = MO.getGlobal(); 1258 MCSymbol *MOSymbol = getSymbol(GValue); 1259 const MCExpr *Exp = MCSymbolRefExpr::create( 1260 MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO 1261 : MCSymbolRefExpr::VK_PPC_GOT_TPREL, 1262 OutContext); 1263 TmpInst.getOperand(1) = MCOperand::createExpr(Exp); 1264 EmitToStreamer(*OutStreamer, TmpInst); 1265 return; 1266 } 1267 1268 case PPC::PPC32PICGOT: { 1269 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 1270 MCSymbol *GOTRef = OutContext.createTempSymbol(); 1271 MCSymbol *NextInstr = OutContext.createTempSymbol(); 1272 1273 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL) 1274 // FIXME: We would like an efficient form for this, so we don't have to do 1275 // a lot of extra uniquing. 1276 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext))); 1277 const MCExpr *OffsExpr = 1278 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext), 1279 MCSymbolRefExpr::create(GOTRef, OutContext), 1280 OutContext); 1281 OutStreamer->emitLabel(GOTRef); 1282 OutStreamer->emitValue(OffsExpr, 4); 1283 OutStreamer->emitLabel(NextInstr); 1284 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR) 1285 .addReg(MI->getOperand(0).getReg())); 1286 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ) 1287 .addReg(MI->getOperand(1).getReg()) 1288 .addImm(0) 1289 .addReg(MI->getOperand(0).getReg())); 1290 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4) 1291 .addReg(MI->getOperand(0).getReg()) 1292 .addReg(MI->getOperand(1).getReg()) 1293 .addReg(MI->getOperand(0).getReg())); 1294 return; 1295 } 1296 case PPC::PPC32GOT: { 1297 MCSymbol *GOTSymbol = 1298 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_")); 1299 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create( 1300 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext); 1301 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create( 1302 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext); 1303 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI) 1304 .addReg(MI->getOperand(0).getReg()) 1305 .addExpr(SymGotTlsL)); 1306 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1307 .addReg(MI->getOperand(0).getReg()) 1308 .addReg(MI->getOperand(0).getReg()) 1309 .addExpr(SymGotTlsHA)); 1310 return; 1311 } 1312 case PPC::ADDIStlsgdHA: { 1313 // Transform: %xd = ADDIStlsgdHA %x2, @sym 1314 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha 1315 assert(IsPPC64 && "Not supported for 32-bit PowerPC"); 1316 const MachineOperand &MO = MI->getOperand(2); 1317 const GlobalValue *GValue = MO.getGlobal(); 1318 MCSymbol *MOSymbol = getSymbol(GValue); 1319 const MCExpr *SymGotTlsGD = 1320 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA, 1321 OutContext); 1322 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 1323 .addReg(MI->getOperand(0).getReg()) 1324 .addReg(MI->getOperand(1).getReg()) 1325 .addExpr(SymGotTlsGD)); 1326 return; 1327 } 1328 case PPC::ADDItlsgdL: 1329 // Transform: %xd = ADDItlsgdL %xs, @sym 1330 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l 1331 case PPC::ADDItlsgdL32: { 1332 // Transform: %rd = ADDItlsgdL32 %rs, @sym 1333 // Into: %rd = ADDI %rs, sym@got@tlsgd 1334 const MachineOperand &MO = MI->getOperand(2); 1335 const GlobalValue *GValue = MO.getGlobal(); 1336 MCSymbol *MOSymbol = getSymbol(GValue); 1337 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create( 1338 MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO 1339 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD, 1340 OutContext); 1341 EmitToStreamer(*OutStreamer, 1342 MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI) 1343 .addReg(MI->getOperand(0).getReg()) 1344 .addReg(MI->getOperand(1).getReg()) 1345 .addExpr(SymGotTlsGD)); 1346 return; 1347 } 1348 case PPC::GETtlsADDR: 1349 // Transform: %x3 = GETtlsADDR %x3, @sym 1350 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd) 1351 case PPC::GETtlsADDRPCREL: 1352 case PPC::GETtlsADDR32AIX: 1353 case PPC::GETtlsADDR64AIX: 1354 // Transform: %r3 = GETtlsADDRNNAIX %r3, %r4 (for NN == 32/64). 1355 // Into: BLA .__tls_get_addr() 1356 // Unlike on Linux, there is no symbol or relocation needed for this call. 1357 case PPC::GETtlsADDR32: { 1358 // Transform: %r3 = GETtlsADDR32 %r3, @sym 1359 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT 1360 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD); 1361 return; 1362 } 1363 case PPC::GETtlsTpointer32AIX: { 1364 // Transform: %r3 = GETtlsTpointer32AIX 1365 // Into: BLA .__get_tpointer() 1366 EmitAIXTlsCallHelper(MI); 1367 return; 1368 } 1369 case PPC::ADDIStlsldHA: { 1370 // Transform: %xd = ADDIStlsldHA %x2, @sym 1371 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha 1372 assert(IsPPC64 && "Not supported for 32-bit PowerPC"); 1373 const MachineOperand &MO = MI->getOperand(2); 1374 const GlobalValue *GValue = MO.getGlobal(); 1375 MCSymbol *MOSymbol = getSymbol(GValue); 1376 const MCExpr *SymGotTlsLD = 1377 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA, 1378 OutContext); 1379 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8) 1380 .addReg(MI->getOperand(0).getReg()) 1381 .addReg(MI->getOperand(1).getReg()) 1382 .addExpr(SymGotTlsLD)); 1383 return; 1384 } 1385 case PPC::ADDItlsldL: 1386 // Transform: %xd = ADDItlsldL %xs, @sym 1387 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l 1388 case PPC::ADDItlsldL32: { 1389 // Transform: %rd = ADDItlsldL32 %rs, @sym 1390 // Into: %rd = ADDI %rs, sym@got@tlsld 1391 const MachineOperand &MO = MI->getOperand(2); 1392 const GlobalValue *GValue = MO.getGlobal(); 1393 MCSymbol *MOSymbol = getSymbol(GValue); 1394 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create( 1395 MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO 1396 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD, 1397 OutContext); 1398 EmitToStreamer(*OutStreamer, 1399 MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI) 1400 .addReg(MI->getOperand(0).getReg()) 1401 .addReg(MI->getOperand(1).getReg()) 1402 .addExpr(SymGotTlsLD)); 1403 return; 1404 } 1405 case PPC::GETtlsldADDR: 1406 // Transform: %x3 = GETtlsldADDR %x3, @sym 1407 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld) 1408 case PPC::GETtlsldADDRPCREL: 1409 case PPC::GETtlsldADDR32: { 1410 // Transform: %r3 = GETtlsldADDR32 %r3, @sym 1411 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT 1412 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD); 1413 return; 1414 } 1415 case PPC::ADDISdtprelHA: 1416 // Transform: %xd = ADDISdtprelHA %xs, @sym 1417 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha 1418 case PPC::ADDISdtprelHA32: { 1419 // Transform: %rd = ADDISdtprelHA32 %rs, @sym 1420 // Into: %rd = ADDIS %rs, sym@dtprel@ha 1421 const MachineOperand &MO = MI->getOperand(2); 1422 const GlobalValue *GValue = MO.getGlobal(); 1423 MCSymbol *MOSymbol = getSymbol(GValue); 1424 const MCExpr *SymDtprel = 1425 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, 1426 OutContext); 1427 EmitToStreamer( 1428 *OutStreamer, 1429 MCInstBuilder(IsPPC64 ? PPC::ADDIS8 : PPC::ADDIS) 1430 .addReg(MI->getOperand(0).getReg()) 1431 .addReg(MI->getOperand(1).getReg()) 1432 .addExpr(SymDtprel)); 1433 return; 1434 } 1435 case PPC::PADDIdtprel: { 1436 // Transform: %rd = PADDIdtprel %rs, @sym 1437 // Into: %rd = PADDI8 %rs, sym@dtprel 1438 const MachineOperand &MO = MI->getOperand(2); 1439 const GlobalValue *GValue = MO.getGlobal(); 1440 MCSymbol *MOSymbol = getSymbol(GValue); 1441 const MCExpr *SymDtprel = MCSymbolRefExpr::create( 1442 MOSymbol, MCSymbolRefExpr::VK_DTPREL, OutContext); 1443 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::PADDI8) 1444 .addReg(MI->getOperand(0).getReg()) 1445 .addReg(MI->getOperand(1).getReg()) 1446 .addExpr(SymDtprel)); 1447 return; 1448 } 1449 1450 case PPC::ADDIdtprelL: 1451 // Transform: %xd = ADDIdtprelL %xs, @sym 1452 // Into: %xd = ADDI8 %xs, sym@dtprel@l 1453 case PPC::ADDIdtprelL32: { 1454 // Transform: %rd = ADDIdtprelL32 %rs, @sym 1455 // Into: %rd = ADDI %rs, sym@dtprel@l 1456 const MachineOperand &MO = MI->getOperand(2); 1457 const GlobalValue *GValue = MO.getGlobal(); 1458 MCSymbol *MOSymbol = getSymbol(GValue); 1459 const MCExpr *SymDtprel = 1460 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, 1461 OutContext); 1462 EmitToStreamer(*OutStreamer, 1463 MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI) 1464 .addReg(MI->getOperand(0).getReg()) 1465 .addReg(MI->getOperand(1).getReg()) 1466 .addExpr(SymDtprel)); 1467 return; 1468 } 1469 case PPC::MFOCRF: 1470 case PPC::MFOCRF8: 1471 if (!Subtarget->hasMFOCRF()) { 1472 // Transform: %r3 = MFOCRF %cr7 1473 // Into: %r3 = MFCR ;; cr7 1474 unsigned NewOpcode = 1475 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; 1476 OutStreamer->AddComment(PPCInstPrinter:: 1477 getRegisterName(MI->getOperand(1).getReg())); 1478 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1479 .addReg(MI->getOperand(0).getReg())); 1480 return; 1481 } 1482 break; 1483 case PPC::MTOCRF: 1484 case PPC::MTOCRF8: 1485 if (!Subtarget->hasMFOCRF()) { 1486 // Transform: %cr7 = MTOCRF %r3 1487 // Into: MTCRF mask, %r3 ;; cr7 1488 unsigned NewOpcode = 1489 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; 1490 unsigned Mask = 0x80 >> OutContext.getRegisterInfo() 1491 ->getEncodingValue(MI->getOperand(0).getReg()); 1492 OutStreamer->AddComment(PPCInstPrinter:: 1493 getRegisterName(MI->getOperand(0).getReg())); 1494 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode) 1495 .addImm(Mask) 1496 .addReg(MI->getOperand(1).getReg())); 1497 return; 1498 } 1499 break; 1500 case PPC::LD: 1501 case PPC::STD: 1502 case PPC::LWA_32: 1503 case PPC::LWA: { 1504 // Verify alignment is legal, so we don't create relocations 1505 // that can't be supported. 1506 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; 1507 const MachineOperand &MO = MI->getOperand(OpNum); 1508 if (MO.isGlobal()) { 1509 const DataLayout &DL = MO.getGlobal()->getParent()->getDataLayout(); 1510 if (MO.getGlobal()->getPointerAlignment(DL) < 4) 1511 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); 1512 } 1513 // Now process the instruction normally. 1514 break; 1515 } 1516 case PPC::PseudoEIEIO: { 1517 EmitToStreamer( 1518 *OutStreamer, 1519 MCInstBuilder(PPC::ORI).addReg(PPC::X2).addReg(PPC::X2).addImm(0)); 1520 EmitToStreamer( 1521 *OutStreamer, 1522 MCInstBuilder(PPC::ORI).addReg(PPC::X2).addReg(PPC::X2).addImm(0)); 1523 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::EnforceIEIO)); 1524 return; 1525 } 1526 case PPC::ADDI8: { 1527 // The faster non-TOC-based local-exec sequence is represented by `addi` 1528 // with an immediate operand having the MO_TPREL_FLAG. Such an instruction 1529 // does not otherwise arise. 1530 unsigned Flag = MI->getOperand(2).getTargetFlags(); 1531 if (Flag == PPCII::MO_TPREL_FLAG || 1532 Flag == PPCII::MO_GOT_TPREL_PCREL_FLAG || 1533 Flag == PPCII::MO_TPREL_PCREL_FLAG) { 1534 assert( 1535 Subtarget->hasAIXSmallLocalExecTLS() && 1536 "addi with thread-pointer only expected with local-exec small TLS"); 1537 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this); 1538 TmpInst.setOpcode(PPC::LA8); 1539 EmitToStreamer(*OutStreamer, TmpInst); 1540 return; 1541 } 1542 break; 1543 } 1544 } 1545 1546 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this); 1547 EmitToStreamer(*OutStreamer, TmpInst); 1548 } 1549 1550 void PPCLinuxAsmPrinter::emitGNUAttributes(Module &M) { 1551 // Emit float ABI into GNU attribute 1552 Metadata *MD = M.getModuleFlag("float-abi"); 1553 MDString *FloatABI = dyn_cast_or_null<MDString>(MD); 1554 if (!FloatABI) 1555 return; 1556 StringRef flt = FloatABI->getString(); 1557 // TODO: Support emitting soft-fp and hard double/single attributes. 1558 if (flt == "doubledouble") 1559 OutStreamer->emitGNUAttribute(Tag_GNU_Power_ABI_FP, 1560 Val_GNU_Power_ABI_HardFloat_DP | 1561 Val_GNU_Power_ABI_LDBL_IBM128); 1562 else if (flt == "ieeequad") 1563 OutStreamer->emitGNUAttribute(Tag_GNU_Power_ABI_FP, 1564 Val_GNU_Power_ABI_HardFloat_DP | 1565 Val_GNU_Power_ABI_LDBL_IEEE128); 1566 else if (flt == "ieeedouble") 1567 OutStreamer->emitGNUAttribute(Tag_GNU_Power_ABI_FP, 1568 Val_GNU_Power_ABI_HardFloat_DP | 1569 Val_GNU_Power_ABI_LDBL_64); 1570 } 1571 1572 void PPCLinuxAsmPrinter::emitInstruction(const MachineInstr *MI) { 1573 if (!Subtarget->isPPC64()) 1574 return PPCAsmPrinter::emitInstruction(MI); 1575 1576 switch (MI->getOpcode()) { 1577 default: 1578 return PPCAsmPrinter::emitInstruction(MI); 1579 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: { 1580 // .begin: 1581 // b .end # lis 0, FuncId[16..32] 1582 // nop # li 0, FuncId[0..15] 1583 // std 0, -8(1) 1584 // mflr 0 1585 // bl __xray_FunctionEntry 1586 // mtlr 0 1587 // .end: 1588 // 1589 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1590 // of instructions change. 1591 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1592 MCSymbol *EndOfSled = OutContext.createTempSymbol(); 1593 OutStreamer->emitLabel(BeginOfSled); 1594 EmitToStreamer(*OutStreamer, 1595 MCInstBuilder(PPC::B).addExpr( 1596 MCSymbolRefExpr::create(EndOfSled, OutContext))); 1597 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1598 EmitToStreamer( 1599 *OutStreamer, 1600 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1601 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1602 EmitToStreamer(*OutStreamer, 1603 MCInstBuilder(PPC::BL8_NOP) 1604 .addExpr(MCSymbolRefExpr::create( 1605 OutContext.getOrCreateSymbol("__xray_FunctionEntry"), 1606 OutContext))); 1607 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1608 OutStreamer->emitLabel(EndOfSled); 1609 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER, 2); 1610 break; 1611 } 1612 case TargetOpcode::PATCHABLE_RET: { 1613 unsigned RetOpcode = MI->getOperand(0).getImm(); 1614 MCInst RetInst; 1615 RetInst.setOpcode(RetOpcode); 1616 for (const auto &MO : llvm::drop_begin(MI->operands())) { 1617 MCOperand MCOp; 1618 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this)) 1619 RetInst.addOperand(MCOp); 1620 } 1621 1622 bool IsConditional; 1623 if (RetOpcode == PPC::BCCLR) { 1624 IsConditional = true; 1625 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 || 1626 RetOpcode == PPC::TCRETURNai8) { 1627 break; 1628 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) { 1629 IsConditional = false; 1630 } else { 1631 EmitToStreamer(*OutStreamer, RetInst); 1632 break; 1633 } 1634 1635 MCSymbol *FallthroughLabel; 1636 if (IsConditional) { 1637 // Before: 1638 // bgtlr cr0 1639 // 1640 // After: 1641 // ble cr0, .end 1642 // .p2align 3 1643 // .begin: 1644 // blr # lis 0, FuncId[16..32] 1645 // nop # li 0, FuncId[0..15] 1646 // std 0, -8(1) 1647 // mflr 0 1648 // bl __xray_FunctionExit 1649 // mtlr 0 1650 // blr 1651 // .end: 1652 // 1653 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1654 // of instructions change. 1655 FallthroughLabel = OutContext.createTempSymbol(); 1656 EmitToStreamer( 1657 *OutStreamer, 1658 MCInstBuilder(PPC::BCC) 1659 .addImm(PPC::InvertPredicate( 1660 static_cast<PPC::Predicate>(MI->getOperand(1).getImm()))) 1661 .addReg(MI->getOperand(2).getReg()) 1662 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext))); 1663 RetInst = MCInst(); 1664 RetInst.setOpcode(PPC::BLR8); 1665 } 1666 // .p2align 3 1667 // .begin: 1668 // b(lr)? # lis 0, FuncId[16..32] 1669 // nop # li 0, FuncId[0..15] 1670 // std 0, -8(1) 1671 // mflr 0 1672 // bl __xray_FunctionExit 1673 // mtlr 0 1674 // b(lr)? 1675 // 1676 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number 1677 // of instructions change. 1678 OutStreamer->emitCodeAlignment(Align(8), &getSubtargetInfo()); 1679 MCSymbol *BeginOfSled = OutContext.createTempSymbol(); 1680 OutStreamer->emitLabel(BeginOfSled); 1681 EmitToStreamer(*OutStreamer, RetInst); 1682 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP)); 1683 EmitToStreamer( 1684 *OutStreamer, 1685 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); 1686 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0)); 1687 EmitToStreamer(*OutStreamer, 1688 MCInstBuilder(PPC::BL8_NOP) 1689 .addExpr(MCSymbolRefExpr::create( 1690 OutContext.getOrCreateSymbol("__xray_FunctionExit"), 1691 OutContext))); 1692 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0)); 1693 EmitToStreamer(*OutStreamer, RetInst); 1694 if (IsConditional) 1695 OutStreamer->emitLabel(FallthroughLabel); 1696 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT, 2); 1697 break; 1698 } 1699 case TargetOpcode::PATCHABLE_FUNCTION_EXIT: 1700 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted"); 1701 case TargetOpcode::PATCHABLE_TAIL_CALL: 1702 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a 1703 // normal function exit from a tail exit. 1704 llvm_unreachable("Tail call is handled in the normal case. See comments " 1705 "around this assert."); 1706 } 1707 } 1708 1709 void PPCLinuxAsmPrinter::emitStartOfAsmFile(Module &M) { 1710 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) { 1711 PPCTargetStreamer *TS = 1712 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1713 TS->emitAbiVersion(2); 1714 } 1715 1716 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() || 1717 !isPositionIndependent()) 1718 return AsmPrinter::emitStartOfAsmFile(M); 1719 1720 if (M.getPICLevel() == PICLevel::SmallPIC) 1721 return AsmPrinter::emitStartOfAsmFile(M); 1722 1723 OutStreamer->switchSection(OutContext.getELFSection( 1724 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC)); 1725 1726 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC")); 1727 MCSymbol *CurrentPos = OutContext.createTempSymbol(); 1728 1729 OutStreamer->emitLabel(CurrentPos); 1730 1731 // The GOT pointer points to the middle of the GOT, in order to reference the 1732 // entire 64kB range. 0x8000 is the midpoint. 1733 const MCExpr *tocExpr = 1734 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext), 1735 MCConstantExpr::create(0x8000, OutContext), 1736 OutContext); 1737 1738 OutStreamer->emitAssignment(TOCSym, tocExpr); 1739 1740 OutStreamer->switchSection(getObjFileLowering().getTextSection()); 1741 } 1742 1743 void PPCLinuxAsmPrinter::emitFunctionEntryLabel() { 1744 // linux/ppc32 - Normal entry label. 1745 if (!Subtarget->isPPC64() && 1746 (!isPositionIndependent() || 1747 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC)) 1748 return AsmPrinter::emitFunctionEntryLabel(); 1749 1750 if (!Subtarget->isPPC64()) { 1751 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1752 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { 1753 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(*MF); 1754 MCSymbol *PICBase = MF->getPICBaseSymbol(); 1755 OutStreamer->emitLabel(RelocSymbol); 1756 1757 const MCExpr *OffsExpr = 1758 MCBinaryExpr::createSub( 1759 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")), 1760 OutContext), 1761 MCSymbolRefExpr::create(PICBase, OutContext), 1762 OutContext); 1763 OutStreamer->emitValue(OffsExpr, 4); 1764 OutStreamer->emitLabel(CurrentFnSym); 1765 return; 1766 } else 1767 return AsmPrinter::emitFunctionEntryLabel(); 1768 } 1769 1770 // ELFv2 ABI - Normal entry label. 1771 if (Subtarget->isELFv2ABI()) { 1772 // In the Large code model, we allow arbitrary displacements between 1773 // the text section and its associated TOC section. We place the 1774 // full 8-byte offset to the TOC in memory immediately preceding 1775 // the function global entry point. 1776 if (TM.getCodeModel() == CodeModel::Large 1777 && !MF->getRegInfo().use_empty(PPC::X2)) { 1778 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1779 1780 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1781 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(*MF); 1782 const MCExpr *TOCDeltaExpr = 1783 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1784 MCSymbolRefExpr::create(GlobalEPSymbol, 1785 OutContext), 1786 OutContext); 1787 1788 OutStreamer->emitLabel(PPCFI->getTOCOffsetSymbol(*MF)); 1789 OutStreamer->emitValue(TOCDeltaExpr, 8); 1790 } 1791 return AsmPrinter::emitFunctionEntryLabel(); 1792 } 1793 1794 // Emit an official procedure descriptor. 1795 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 1796 MCSectionELF *Section = OutStreamer->getContext().getELFSection( 1797 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1798 OutStreamer->switchSection(Section); 1799 OutStreamer->emitLabel(CurrentFnSym); 1800 OutStreamer->emitValueToAlignment(Align(8)); 1801 MCSymbol *Symbol1 = CurrentFnSymForSize; 1802 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function 1803 // entry point. 1804 OutStreamer->emitValue(MCSymbolRefExpr::create(Symbol1, OutContext), 1805 8 /*size*/); 1806 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1807 // Generates a R_PPC64_TOC relocation for TOC base insertion. 1808 OutStreamer->emitValue( 1809 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext), 1810 8/*size*/); 1811 // Emit a null environment pointer. 1812 OutStreamer->emitIntValue(0, 8 /* size */); 1813 OutStreamer->switchSection(Current.first, Current.second); 1814 } 1815 1816 void PPCLinuxAsmPrinter::emitEndOfAsmFile(Module &M) { 1817 const DataLayout &DL = getDataLayout(); 1818 1819 bool isPPC64 = DL.getPointerSizeInBits() == 64; 1820 1821 PPCTargetStreamer *TS = 1822 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1823 1824 emitGNUAttributes(M); 1825 1826 if (!TOC.empty()) { 1827 const char *Name = isPPC64 ? ".toc" : ".got2"; 1828 MCSectionELF *Section = OutContext.getELFSection( 1829 Name, ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC); 1830 OutStreamer->switchSection(Section); 1831 if (!isPPC64) 1832 OutStreamer->emitValueToAlignment(Align(4)); 1833 1834 for (const auto &TOCMapPair : TOC) { 1835 const MCSymbol *const TOCEntryTarget = TOCMapPair.first.first; 1836 MCSymbol *const TOCEntryLabel = TOCMapPair.second; 1837 1838 OutStreamer->emitLabel(TOCEntryLabel); 1839 if (isPPC64) 1840 TS->emitTCEntry(*TOCEntryTarget, TOCMapPair.first.second); 1841 else 1842 OutStreamer->emitSymbolValue(TOCEntryTarget, 4); 1843 } 1844 } 1845 1846 PPCAsmPrinter::emitEndOfAsmFile(M); 1847 } 1848 1849 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2. 1850 void PPCLinuxAsmPrinter::emitFunctionBodyStart() { 1851 // In the ELFv2 ABI, in functions that use the TOC register, we need to 1852 // provide two entry points. The ABI guarantees that when calling the 1853 // local entry point, r2 is set up by the caller to contain the TOC base 1854 // for this function, and when calling the global entry point, r12 is set 1855 // up by the caller to hold the address of the global entry point. We 1856 // thus emit a prefix sequence along the following lines: 1857 // 1858 // func: 1859 // .Lfunc_gepNN: 1860 // # global entry point 1861 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha 1862 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l 1863 // .Lfunc_lepNN: 1864 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1865 // # local entry point, followed by function body 1866 // 1867 // For the Large code model, we create 1868 // 1869 // .Lfunc_tocNN: 1870 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel 1871 // func: 1872 // .Lfunc_gepNN: 1873 // # global entry point 1874 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12) 1875 // add r2,r2,r12 1876 // .Lfunc_lepNN: 1877 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN 1878 // # local entry point, followed by function body 1879 // 1880 // This ensures we have r2 set up correctly while executing the function 1881 // body, no matter which entry point is called. 1882 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); 1883 const bool UsesX2OrR2 = !MF->getRegInfo().use_empty(PPC::X2) || 1884 !MF->getRegInfo().use_empty(PPC::R2); 1885 const bool PCrelGEPRequired = Subtarget->isUsingPCRelativeCalls() && 1886 UsesX2OrR2 && PPCFI->usesTOCBasePtr(); 1887 const bool NonPCrelGEPRequired = !Subtarget->isUsingPCRelativeCalls() && 1888 Subtarget->isELFv2ABI() && UsesX2OrR2; 1889 1890 // Only do all that if the function uses R2 as the TOC pointer 1891 // in the first place. We don't need the global entry point if the 1892 // function uses R2 as an allocatable register. 1893 if (NonPCrelGEPRequired || PCrelGEPRequired) { 1894 // Note: The logic here must be synchronized with the code in the 1895 // branch-selection pass which sets the offset of the first block in the 1896 // function. This matters because it affects the alignment. 1897 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(*MF); 1898 OutStreamer->emitLabel(GlobalEntryLabel); 1899 const MCSymbolRefExpr *GlobalEntryLabelExp = 1900 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); 1901 1902 if (TM.getCodeModel() != CodeModel::Large) { 1903 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); 1904 const MCExpr *TOCDeltaExpr = 1905 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), 1906 GlobalEntryLabelExp, OutContext); 1907 1908 const MCExpr *TOCDeltaHi = PPCMCExpr::createHa(TOCDeltaExpr, OutContext); 1909 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS) 1910 .addReg(PPC::X2) 1911 .addReg(PPC::X12) 1912 .addExpr(TOCDeltaHi)); 1913 1914 const MCExpr *TOCDeltaLo = PPCMCExpr::createLo(TOCDeltaExpr, OutContext); 1915 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI) 1916 .addReg(PPC::X2) 1917 .addReg(PPC::X2) 1918 .addExpr(TOCDeltaLo)); 1919 } else { 1920 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(*MF); 1921 const MCExpr *TOCOffsetDeltaExpr = 1922 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), 1923 GlobalEntryLabelExp, OutContext); 1924 1925 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD) 1926 .addReg(PPC::X2) 1927 .addExpr(TOCOffsetDeltaExpr) 1928 .addReg(PPC::X12)); 1929 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8) 1930 .addReg(PPC::X2) 1931 .addReg(PPC::X2) 1932 .addReg(PPC::X12)); 1933 } 1934 1935 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(*MF); 1936 OutStreamer->emitLabel(LocalEntryLabel); 1937 const MCSymbolRefExpr *LocalEntryLabelExp = 1938 MCSymbolRefExpr::create(LocalEntryLabel, OutContext); 1939 const MCExpr *LocalOffsetExp = 1940 MCBinaryExpr::createSub(LocalEntryLabelExp, 1941 GlobalEntryLabelExp, OutContext); 1942 1943 PPCTargetStreamer *TS = 1944 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1945 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp); 1946 } else if (Subtarget->isUsingPCRelativeCalls()) { 1947 // When generating the entry point for a function we have a few scenarios 1948 // based on whether or not that function uses R2 and whether or not that 1949 // function makes calls (or is a leaf function). 1950 // 1) A leaf function that does not use R2 (or treats it as callee-saved 1951 // and preserves it). In this case st_other=0 and both 1952 // the local and global entry points for the function are the same. 1953 // No special entry point code is required. 1954 // 2) A function uses the TOC pointer R2. This function may or may not have 1955 // calls. In this case st_other=[2,6] and the global and local entry 1956 // points are different. Code to correctly setup the TOC pointer in R2 1957 // is put between the global and local entry points. This case is 1958 // covered by the if statatement above. 1959 // 3) A function does not use the TOC pointer R2 but does have calls. 1960 // In this case st_other=1 since we do not know whether or not any 1961 // of the callees clobber R2. This case is dealt with in this else if 1962 // block. Tail calls are considered calls and the st_other should also 1963 // be set to 1 in that case as well. 1964 // 4) The function does not use the TOC pointer but R2 is used inside 1965 // the function. In this case st_other=1 once again. 1966 // 5) This function uses inline asm. We mark R2 as reserved if the function 1967 // has inline asm as we have to assume that it may be used. 1968 if (MF->getFrameInfo().hasCalls() || MF->getFrameInfo().hasTailCall() || 1969 MF->hasInlineAsm() || (!PPCFI->usesTOCBasePtr() && UsesX2OrR2)) { 1970 PPCTargetStreamer *TS = 1971 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 1972 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), 1973 MCConstantExpr::create(1, OutContext)); 1974 } 1975 } 1976 } 1977 1978 /// EmitFunctionBodyEnd - Print the traceback table before the .size 1979 /// directive. 1980 /// 1981 void PPCLinuxAsmPrinter::emitFunctionBodyEnd() { 1982 // Only the 64-bit target requires a traceback table. For now, 1983 // we only emit the word of zeroes that GDB requires to find 1984 // the end of the function, and zeroes for the eight-byte 1985 // mandatory fields. 1986 // FIXME: We should fill in the eight-byte mandatory fields as described in 1987 // the PPC64 ELF ABI (this is a low-priority item because GDB does not 1988 // currently make use of these fields). 1989 if (Subtarget->isPPC64()) { 1990 OutStreamer->emitIntValue(0, 4/*size*/); 1991 OutStreamer->emitIntValue(0, 8/*size*/); 1992 } 1993 } 1994 1995 void PPCAIXAsmPrinter::emitLinkage(const GlobalValue *GV, 1996 MCSymbol *GVSym) const { 1997 1998 assert(MAI->hasVisibilityOnlyWithLinkage() && 1999 "AIX's linkage directives take a visibility setting."); 2000 2001 MCSymbolAttr LinkageAttr = MCSA_Invalid; 2002 switch (GV->getLinkage()) { 2003 case GlobalValue::ExternalLinkage: 2004 LinkageAttr = GV->isDeclaration() ? MCSA_Extern : MCSA_Global; 2005 break; 2006 case GlobalValue::LinkOnceAnyLinkage: 2007 case GlobalValue::LinkOnceODRLinkage: 2008 case GlobalValue::WeakAnyLinkage: 2009 case GlobalValue::WeakODRLinkage: 2010 case GlobalValue::ExternalWeakLinkage: 2011 LinkageAttr = MCSA_Weak; 2012 break; 2013 case GlobalValue::AvailableExternallyLinkage: 2014 LinkageAttr = MCSA_Extern; 2015 break; 2016 case GlobalValue::PrivateLinkage: 2017 return; 2018 case GlobalValue::InternalLinkage: 2019 assert(GV->getVisibility() == GlobalValue::DefaultVisibility && 2020 "InternalLinkage should not have other visibility setting."); 2021 LinkageAttr = MCSA_LGlobal; 2022 break; 2023 case GlobalValue::AppendingLinkage: 2024 llvm_unreachable("Should never emit this"); 2025 case GlobalValue::CommonLinkage: 2026 llvm_unreachable("CommonLinkage of XCOFF should not come to this path"); 2027 } 2028 2029 assert(LinkageAttr != MCSA_Invalid && "LinkageAttr should not MCSA_Invalid."); 2030 2031 MCSymbolAttr VisibilityAttr = MCSA_Invalid; 2032 if (!TM.getIgnoreXCOFFVisibility()) { 2033 if (GV->hasDLLExportStorageClass() && !GV->hasDefaultVisibility()) 2034 report_fatal_error( 2035 "Cannot not be both dllexport and non-default visibility"); 2036 switch (GV->getVisibility()) { 2037 2038 // TODO: "internal" Visibility needs to go here. 2039 case GlobalValue::DefaultVisibility: 2040 if (GV->hasDLLExportStorageClass()) 2041 VisibilityAttr = MAI->getExportedVisibilityAttr(); 2042 break; 2043 case GlobalValue::HiddenVisibility: 2044 VisibilityAttr = MAI->getHiddenVisibilityAttr(); 2045 break; 2046 case GlobalValue::ProtectedVisibility: 2047 VisibilityAttr = MAI->getProtectedVisibilityAttr(); 2048 break; 2049 } 2050 } 2051 2052 OutStreamer->emitXCOFFSymbolLinkageWithVisibility(GVSym, LinkageAttr, 2053 VisibilityAttr); 2054 } 2055 2056 void PPCAIXAsmPrinter::SetupMachineFunction(MachineFunction &MF) { 2057 // Setup CurrentFnDescSym and its containing csect. 2058 MCSectionXCOFF *FnDescSec = 2059 cast<MCSectionXCOFF>(getObjFileLowering().getSectionForFunctionDescriptor( 2060 &MF.getFunction(), TM)); 2061 FnDescSec->setAlignment(Align(Subtarget->isPPC64() ? 8 : 4)); 2062 2063 CurrentFnDescSym = FnDescSec->getQualNameSymbol(); 2064 2065 return AsmPrinter::SetupMachineFunction(MF); 2066 } 2067 2068 uint16_t PPCAIXAsmPrinter::getNumberOfVRSaved() { 2069 // Calculate the number of VRs be saved. 2070 // Vector registers 20 through 31 are marked as reserved and cannot be used 2071 // in the default ABI. 2072 const PPCSubtarget &Subtarget = MF->getSubtarget<PPCSubtarget>(); 2073 if (Subtarget.isAIXABI() && Subtarget.hasAltivec() && 2074 TM.getAIXExtendedAltivecABI()) { 2075 const MachineRegisterInfo &MRI = MF->getRegInfo(); 2076 for (unsigned Reg = PPC::V20; Reg <= PPC::V31; ++Reg) 2077 if (MRI.isPhysRegModified(Reg)) 2078 // Number of VRs saved. 2079 return PPC::V31 - Reg + 1; 2080 } 2081 return 0; 2082 } 2083 2084 void PPCAIXAsmPrinter::emitFunctionBodyEnd() { 2085 2086 if (!TM.getXCOFFTracebackTable()) 2087 return; 2088 2089 emitTracebackTable(); 2090 2091 // If ShouldEmitEHBlock returns true, then the eh info table 2092 // will be emitted via `AIXException::endFunction`. Otherwise, we 2093 // need to emit a dumy eh info table when VRs are saved. We could not 2094 // consolidate these two places into one because there is no easy way 2095 // to access register information in `AIXException` class. 2096 if (!TargetLoweringObjectFileXCOFF::ShouldEmitEHBlock(MF) && 2097 (getNumberOfVRSaved() > 0)) { 2098 // Emit dummy EH Info Table. 2099 OutStreamer->switchSection(getObjFileLowering().getCompactUnwindSection()); 2100 MCSymbol *EHInfoLabel = 2101 TargetLoweringObjectFileXCOFF::getEHInfoTableSymbol(MF); 2102 OutStreamer->emitLabel(EHInfoLabel); 2103 2104 // Version number. 2105 OutStreamer->emitInt32(0); 2106 2107 const DataLayout &DL = MMI->getModule()->getDataLayout(); 2108 const unsigned PointerSize = DL.getPointerSize(); 2109 // Add necessary paddings in 64 bit mode. 2110 OutStreamer->emitValueToAlignment(Align(PointerSize)); 2111 2112 OutStreamer->emitIntValue(0, PointerSize); 2113 OutStreamer->emitIntValue(0, PointerSize); 2114 OutStreamer->switchSection(MF->getSection()); 2115 } 2116 } 2117 2118 void PPCAIXAsmPrinter::emitTracebackTable() { 2119 2120 // Create a symbol for the end of function. 2121 MCSymbol *FuncEnd = createTempSymbol(MF->getName()); 2122 OutStreamer->emitLabel(FuncEnd); 2123 2124 OutStreamer->AddComment("Traceback table begin"); 2125 // Begin with a fullword of zero. 2126 OutStreamer->emitIntValueInHexWithPadding(0, 4 /*size*/); 2127 2128 SmallString<128> CommentString; 2129 raw_svector_ostream CommentOS(CommentString); 2130 2131 auto EmitComment = [&]() { 2132 OutStreamer->AddComment(CommentOS.str()); 2133 CommentString.clear(); 2134 }; 2135 2136 auto EmitCommentAndValue = [&](uint64_t Value, int Size) { 2137 EmitComment(); 2138 OutStreamer->emitIntValueInHexWithPadding(Value, Size); 2139 }; 2140 2141 unsigned int Version = 0; 2142 CommentOS << "Version = " << Version; 2143 EmitCommentAndValue(Version, 1); 2144 2145 // There is a lack of information in the IR to assist with determining the 2146 // source language. AIX exception handling mechanism would only search for 2147 // personality routine and LSDA area when such language supports exception 2148 // handling. So to be conservatively correct and allow runtime to do its job, 2149 // we need to set it to C++ for now. 2150 TracebackTable::LanguageID LanguageIdentifier = 2151 TracebackTable::CPlusPlus; // C++ 2152 2153 CommentOS << "Language = " 2154 << getNameForTracebackTableLanguageId(LanguageIdentifier); 2155 EmitCommentAndValue(LanguageIdentifier, 1); 2156 2157 // This is only populated for the third and fourth bytes. 2158 uint32_t FirstHalfOfMandatoryField = 0; 2159 2160 // Emit the 3rd byte of the mandatory field. 2161 2162 // We always set traceback offset bit to true. 2163 FirstHalfOfMandatoryField |= TracebackTable::HasTraceBackTableOffsetMask; 2164 2165 const PPCFunctionInfo *FI = MF->getInfo<PPCFunctionInfo>(); 2166 const MachineRegisterInfo &MRI = MF->getRegInfo(); 2167 2168 // Check the function uses floating-point processor instructions or not 2169 for (unsigned Reg = PPC::F0; Reg <= PPC::F31; ++Reg) { 2170 if (MRI.isPhysRegUsed(Reg, /* SkipRegMaskTest */ true)) { 2171 FirstHalfOfMandatoryField |= TracebackTable::IsFloatingPointPresentMask; 2172 break; 2173 } 2174 } 2175 2176 #define GENBOOLCOMMENT(Prefix, V, Field) \ 2177 CommentOS << (Prefix) << ((V) & (TracebackTable::Field##Mask) ? "+" : "-") \ 2178 << #Field 2179 2180 #define GENVALUECOMMENT(PrefixAndName, V, Field) \ 2181 CommentOS << (PrefixAndName) << " = " \ 2182 << static_cast<unsigned>(((V) & (TracebackTable::Field##Mask)) >> \ 2183 (TracebackTable::Field##Shift)) 2184 2185 GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsGlobaLinkage); 2186 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsOutOfLineEpilogOrPrologue); 2187 EmitComment(); 2188 2189 GENBOOLCOMMENT("", FirstHalfOfMandatoryField, HasTraceBackTableOffset); 2190 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsInternalProcedure); 2191 EmitComment(); 2192 2193 GENBOOLCOMMENT("", FirstHalfOfMandatoryField, HasControlledStorage); 2194 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsTOCless); 2195 EmitComment(); 2196 2197 GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsFloatingPointPresent); 2198 EmitComment(); 2199 GENBOOLCOMMENT("", FirstHalfOfMandatoryField, 2200 IsFloatingPointOperationLogOrAbortEnabled); 2201 EmitComment(); 2202 2203 OutStreamer->emitIntValueInHexWithPadding( 2204 (FirstHalfOfMandatoryField & 0x0000ff00) >> 8, 1); 2205 2206 // Set the 4th byte of the mandatory field. 2207 FirstHalfOfMandatoryField |= TracebackTable::IsFunctionNamePresentMask; 2208 2209 const PPCRegisterInfo *RegInfo = 2210 static_cast<const PPCRegisterInfo *>(Subtarget->getRegisterInfo()); 2211 Register FrameReg = RegInfo->getFrameRegister(*MF); 2212 if (FrameReg == (Subtarget->isPPC64() ? PPC::X31 : PPC::R31)) 2213 FirstHalfOfMandatoryField |= TracebackTable::IsAllocaUsedMask; 2214 2215 const SmallVectorImpl<Register> &MustSaveCRs = FI->getMustSaveCRs(); 2216 if (!MustSaveCRs.empty()) 2217 FirstHalfOfMandatoryField |= TracebackTable::IsCRSavedMask; 2218 2219 if (FI->mustSaveLR()) 2220 FirstHalfOfMandatoryField |= TracebackTable::IsLRSavedMask; 2221 2222 GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsInterruptHandler); 2223 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsFunctionNamePresent); 2224 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsAllocaUsed); 2225 EmitComment(); 2226 GENVALUECOMMENT("OnConditionDirective", FirstHalfOfMandatoryField, 2227 OnConditionDirective); 2228 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsCRSaved); 2229 GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsLRSaved); 2230 EmitComment(); 2231 OutStreamer->emitIntValueInHexWithPadding((FirstHalfOfMandatoryField & 0xff), 2232 1); 2233 2234 // Set the 5th byte of mandatory field. 2235 uint32_t SecondHalfOfMandatoryField = 0; 2236 2237 SecondHalfOfMandatoryField |= MF->getFrameInfo().getStackSize() 2238 ? TracebackTable::IsBackChainStoredMask 2239 : 0; 2240 2241 uint32_t FPRSaved = 0; 2242 for (unsigned Reg = PPC::F14; Reg <= PPC::F31; ++Reg) { 2243 if (MRI.isPhysRegModified(Reg)) { 2244 FPRSaved = PPC::F31 - Reg + 1; 2245 break; 2246 } 2247 } 2248 SecondHalfOfMandatoryField |= (FPRSaved << TracebackTable::FPRSavedShift) & 2249 TracebackTable::FPRSavedMask; 2250 GENBOOLCOMMENT("", SecondHalfOfMandatoryField, IsBackChainStored); 2251 GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, IsFixup); 2252 GENVALUECOMMENT(", NumOfFPRsSaved", SecondHalfOfMandatoryField, FPRSaved); 2253 EmitComment(); 2254 OutStreamer->emitIntValueInHexWithPadding( 2255 (SecondHalfOfMandatoryField & 0xff000000) >> 24, 1); 2256 2257 // Set the 6th byte of mandatory field. 2258 2259 // Check whether has Vector Instruction,We only treat instructions uses vector 2260 // register as vector instructions. 2261 bool HasVectorInst = false; 2262 for (unsigned Reg = PPC::V0; Reg <= PPC::V31; ++Reg) 2263 if (MRI.isPhysRegUsed(Reg, /* SkipRegMaskTest */ true)) { 2264 // Has VMX instruction. 2265 HasVectorInst = true; 2266 break; 2267 } 2268 2269 if (FI->hasVectorParms() || HasVectorInst) 2270 SecondHalfOfMandatoryField |= TracebackTable::HasVectorInfoMask; 2271 2272 uint16_t NumOfVRSaved = getNumberOfVRSaved(); 2273 bool ShouldEmitEHBlock = 2274 TargetLoweringObjectFileXCOFF::ShouldEmitEHBlock(MF) || NumOfVRSaved > 0; 2275 2276 if (ShouldEmitEHBlock) 2277 SecondHalfOfMandatoryField |= TracebackTable::HasExtensionTableMask; 2278 2279 uint32_t GPRSaved = 0; 2280 2281 // X13 is reserved under 64-bit environment. 2282 unsigned GPRBegin = Subtarget->isPPC64() ? PPC::X14 : PPC::R13; 2283 unsigned GPREnd = Subtarget->isPPC64() ? PPC::X31 : PPC::R31; 2284 2285 for (unsigned Reg = GPRBegin; Reg <= GPREnd; ++Reg) { 2286 if (MRI.isPhysRegModified(Reg)) { 2287 GPRSaved = GPREnd - Reg + 1; 2288 break; 2289 } 2290 } 2291 2292 SecondHalfOfMandatoryField |= (GPRSaved << TracebackTable::GPRSavedShift) & 2293 TracebackTable::GPRSavedMask; 2294 2295 GENBOOLCOMMENT("", SecondHalfOfMandatoryField, HasExtensionTable); 2296 GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, HasVectorInfo); 2297 GENVALUECOMMENT(", NumOfGPRsSaved", SecondHalfOfMandatoryField, GPRSaved); 2298 EmitComment(); 2299 OutStreamer->emitIntValueInHexWithPadding( 2300 (SecondHalfOfMandatoryField & 0x00ff0000) >> 16, 1); 2301 2302 // Set the 7th byte of mandatory field. 2303 uint32_t NumberOfFixedParms = FI->getFixedParmsNum(); 2304 SecondHalfOfMandatoryField |= 2305 (NumberOfFixedParms << TracebackTable::NumberOfFixedParmsShift) & 2306 TracebackTable::NumberOfFixedParmsMask; 2307 GENVALUECOMMENT("NumberOfFixedParms", SecondHalfOfMandatoryField, 2308 NumberOfFixedParms); 2309 EmitComment(); 2310 OutStreamer->emitIntValueInHexWithPadding( 2311 (SecondHalfOfMandatoryField & 0x0000ff00) >> 8, 1); 2312 2313 // Set the 8th byte of mandatory field. 2314 2315 // Always set parameter on stack. 2316 SecondHalfOfMandatoryField |= TracebackTable::HasParmsOnStackMask; 2317 2318 uint32_t NumberOfFPParms = FI->getFloatingPointParmsNum(); 2319 SecondHalfOfMandatoryField |= 2320 (NumberOfFPParms << TracebackTable::NumberOfFloatingPointParmsShift) & 2321 TracebackTable::NumberOfFloatingPointParmsMask; 2322 2323 GENVALUECOMMENT("NumberOfFPParms", SecondHalfOfMandatoryField, 2324 NumberOfFloatingPointParms); 2325 GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, HasParmsOnStack); 2326 EmitComment(); 2327 OutStreamer->emitIntValueInHexWithPadding(SecondHalfOfMandatoryField & 0xff, 2328 1); 2329 2330 // Generate the optional fields of traceback table. 2331 2332 // Parameter type. 2333 if (NumberOfFixedParms || NumberOfFPParms) { 2334 uint32_t ParmsTypeValue = FI->getParmsType(); 2335 2336 Expected<SmallString<32>> ParmsType = 2337 FI->hasVectorParms() 2338 ? XCOFF::parseParmsTypeWithVecInfo( 2339 ParmsTypeValue, NumberOfFixedParms, NumberOfFPParms, 2340 FI->getVectorParmsNum()) 2341 : XCOFF::parseParmsType(ParmsTypeValue, NumberOfFixedParms, 2342 NumberOfFPParms); 2343 2344 assert(ParmsType && toString(ParmsType.takeError()).c_str()); 2345 if (ParmsType) { 2346 CommentOS << "Parameter type = " << ParmsType.get(); 2347 EmitComment(); 2348 } 2349 OutStreamer->emitIntValueInHexWithPadding(ParmsTypeValue, 2350 sizeof(ParmsTypeValue)); 2351 } 2352 // Traceback table offset. 2353 OutStreamer->AddComment("Function size"); 2354 if (FirstHalfOfMandatoryField & TracebackTable::HasTraceBackTableOffsetMask) { 2355 MCSymbol *FuncSectSym = getObjFileLowering().getFunctionEntryPointSymbol( 2356 &(MF->getFunction()), TM); 2357 OutStreamer->emitAbsoluteSymbolDiff(FuncEnd, FuncSectSym, 4); 2358 } 2359 2360 // Since we unset the Int_Handler. 2361 if (FirstHalfOfMandatoryField & TracebackTable::IsInterruptHandlerMask) 2362 report_fatal_error("Hand_Mask not implement yet"); 2363 2364 if (FirstHalfOfMandatoryField & TracebackTable::HasControlledStorageMask) 2365 report_fatal_error("Ctl_Info not implement yet"); 2366 2367 if (FirstHalfOfMandatoryField & TracebackTable::IsFunctionNamePresentMask) { 2368 StringRef Name = MF->getName().substr(0, INT16_MAX); 2369 int16_t NameLength = Name.size(); 2370 CommentOS << "Function name len = " 2371 << static_cast<unsigned int>(NameLength); 2372 EmitCommentAndValue(NameLength, 2); 2373 OutStreamer->AddComment("Function Name"); 2374 OutStreamer->emitBytes(Name); 2375 } 2376 2377 if (FirstHalfOfMandatoryField & TracebackTable::IsAllocaUsedMask) { 2378 uint8_t AllocReg = XCOFF::AllocRegNo; 2379 OutStreamer->AddComment("AllocaUsed"); 2380 OutStreamer->emitIntValueInHex(AllocReg, sizeof(AllocReg)); 2381 } 2382 2383 if (SecondHalfOfMandatoryField & TracebackTable::HasVectorInfoMask) { 2384 uint16_t VRData = 0; 2385 if (NumOfVRSaved) { 2386 // Number of VRs saved. 2387 VRData |= (NumOfVRSaved << TracebackTable::NumberOfVRSavedShift) & 2388 TracebackTable::NumberOfVRSavedMask; 2389 // This bit is supposed to set only when the special register 2390 // VRSAVE is saved on stack. 2391 // However, IBM XL compiler sets the bit when any vector registers 2392 // are saved on the stack. We will follow XL's behavior on AIX 2393 // so that we don't get surprise behavior change for C code. 2394 VRData |= TracebackTable::IsVRSavedOnStackMask; 2395 } 2396 2397 // Set has_varargs. 2398 if (FI->getVarArgsFrameIndex()) 2399 VRData |= TracebackTable::HasVarArgsMask; 2400 2401 // Vector parameters number. 2402 unsigned VectorParmsNum = FI->getVectorParmsNum(); 2403 VRData |= (VectorParmsNum << TracebackTable::NumberOfVectorParmsShift) & 2404 TracebackTable::NumberOfVectorParmsMask; 2405 2406 if (HasVectorInst) 2407 VRData |= TracebackTable::HasVMXInstructionMask; 2408 2409 GENVALUECOMMENT("NumOfVRsSaved", VRData, NumberOfVRSaved); 2410 GENBOOLCOMMENT(", ", VRData, IsVRSavedOnStack); 2411 GENBOOLCOMMENT(", ", VRData, HasVarArgs); 2412 EmitComment(); 2413 OutStreamer->emitIntValueInHexWithPadding((VRData & 0xff00) >> 8, 1); 2414 2415 GENVALUECOMMENT("NumOfVectorParams", VRData, NumberOfVectorParms); 2416 GENBOOLCOMMENT(", ", VRData, HasVMXInstruction); 2417 EmitComment(); 2418 OutStreamer->emitIntValueInHexWithPadding(VRData & 0x00ff, 1); 2419 2420 uint32_t VecParmTypeValue = FI->getVecExtParmsType(); 2421 2422 Expected<SmallString<32>> VecParmsType = 2423 XCOFF::parseVectorParmsType(VecParmTypeValue, VectorParmsNum); 2424 assert(VecParmsType && toString(VecParmsType.takeError()).c_str()); 2425 if (VecParmsType) { 2426 CommentOS << "Vector Parameter type = " << VecParmsType.get(); 2427 EmitComment(); 2428 } 2429 OutStreamer->emitIntValueInHexWithPadding(VecParmTypeValue, 2430 sizeof(VecParmTypeValue)); 2431 // Padding 2 bytes. 2432 CommentOS << "Padding"; 2433 EmitCommentAndValue(0, 2); 2434 } 2435 2436 uint8_t ExtensionTableFlag = 0; 2437 if (SecondHalfOfMandatoryField & TracebackTable::HasExtensionTableMask) { 2438 if (ShouldEmitEHBlock) 2439 ExtensionTableFlag |= ExtendedTBTableFlag::TB_EH_INFO; 2440 if (EnableSSPCanaryBitInTB && 2441 TargetLoweringObjectFileXCOFF::ShouldSetSSPCanaryBitInTB(MF)) 2442 ExtensionTableFlag |= ExtendedTBTableFlag::TB_SSP_CANARY; 2443 2444 CommentOS << "ExtensionTableFlag = " 2445 << getExtendedTBTableFlagString(ExtensionTableFlag); 2446 EmitCommentAndValue(ExtensionTableFlag, sizeof(ExtensionTableFlag)); 2447 } 2448 2449 if (ExtensionTableFlag & ExtendedTBTableFlag::TB_EH_INFO) { 2450 auto &Ctx = OutStreamer->getContext(); 2451 MCSymbol *EHInfoSym = 2452 TargetLoweringObjectFileXCOFF::getEHInfoTableSymbol(MF); 2453 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(EHInfoSym, TOCType_EHBlock); 2454 const MCSymbol *TOCBaseSym = 2455 cast<MCSectionXCOFF>(getObjFileLowering().getTOCBaseSection()) 2456 ->getQualNameSymbol(); 2457 const MCExpr *Exp = 2458 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCEntry, Ctx), 2459 MCSymbolRefExpr::create(TOCBaseSym, Ctx), Ctx); 2460 2461 const DataLayout &DL = getDataLayout(); 2462 OutStreamer->emitValueToAlignment(Align(4)); 2463 OutStreamer->AddComment("EHInfo Table"); 2464 OutStreamer->emitValue(Exp, DL.getPointerSize()); 2465 } 2466 #undef GENBOOLCOMMENT 2467 #undef GENVALUECOMMENT 2468 } 2469 2470 static bool isSpecialLLVMGlobalArrayToSkip(const GlobalVariable *GV) { 2471 return GV->hasAppendingLinkage() && 2472 StringSwitch<bool>(GV->getName()) 2473 // TODO: Linker could still eliminate the GV if we just skip 2474 // handling llvm.used array. Skipping them for now until we or the 2475 // AIX OS team come up with a good solution. 2476 .Case("llvm.used", true) 2477 // It's correct to just skip llvm.compiler.used array here. 2478 .Case("llvm.compiler.used", true) 2479 .Default(false); 2480 } 2481 2482 static bool isSpecialLLVMGlobalArrayForStaticInit(const GlobalVariable *GV) { 2483 return StringSwitch<bool>(GV->getName()) 2484 .Cases("llvm.global_ctors", "llvm.global_dtors", true) 2485 .Default(false); 2486 } 2487 2488 uint64_t PPCAIXAsmPrinter::getAliasOffset(const Constant *C) { 2489 if (auto *GA = dyn_cast<GlobalAlias>(C)) 2490 return getAliasOffset(GA->getAliasee()); 2491 if (auto *CE = dyn_cast<ConstantExpr>(C)) { 2492 const MCExpr *LowC = lowerConstant(CE); 2493 const MCBinaryExpr *CBE = dyn_cast<MCBinaryExpr>(LowC); 2494 if (!CBE) 2495 return 0; 2496 if (CBE->getOpcode() != MCBinaryExpr::Add) 2497 report_fatal_error("Only adding an offset is supported now."); 2498 auto *RHS = dyn_cast<MCConstantExpr>(CBE->getRHS()); 2499 if (!RHS) 2500 report_fatal_error("Unable to get the offset of alias."); 2501 return RHS->getValue(); 2502 } 2503 return 0; 2504 } 2505 2506 void PPCAIXAsmPrinter::emitGlobalVariable(const GlobalVariable *GV) { 2507 // Special LLVM global arrays have been handled at the initialization. 2508 if (isSpecialLLVMGlobalArrayToSkip(GV) || isSpecialLLVMGlobalArrayForStaticInit(GV)) 2509 return; 2510 2511 // If the Global Variable has the toc-data attribute, it needs to be emitted 2512 // when we emit the .toc section. 2513 if (GV->hasAttribute("toc-data")) { 2514 TOCDataGlobalVars.push_back(GV); 2515 return; 2516 } 2517 2518 emitGlobalVariableHelper(GV); 2519 } 2520 2521 void PPCAIXAsmPrinter::emitGlobalVariableHelper(const GlobalVariable *GV) { 2522 assert(!GV->getName().starts_with("llvm.") && 2523 "Unhandled intrinsic global variable."); 2524 2525 if (GV->hasComdat()) 2526 report_fatal_error("COMDAT not yet supported by AIX."); 2527 2528 MCSymbolXCOFF *GVSym = cast<MCSymbolXCOFF>(getSymbol(GV)); 2529 2530 if (GV->isDeclarationForLinker()) { 2531 emitLinkage(GV, GVSym); 2532 return; 2533 } 2534 2535 SectionKind GVKind = getObjFileLowering().getKindForGlobal(GV, TM); 2536 if (!GVKind.isGlobalWriteableData() && !GVKind.isReadOnly() && 2537 !GVKind.isThreadLocal()) // Checks for both ThreadData and ThreadBSS. 2538 report_fatal_error("Encountered a global variable kind that is " 2539 "not supported yet."); 2540 2541 // Print GV in verbose mode 2542 if (isVerbose()) { 2543 if (GV->hasInitializer()) { 2544 GV->printAsOperand(OutStreamer->getCommentOS(), 2545 /*PrintType=*/false, GV->getParent()); 2546 OutStreamer->getCommentOS() << '\n'; 2547 } 2548 } 2549 2550 MCSectionXCOFF *Csect = cast<MCSectionXCOFF>( 2551 getObjFileLowering().SectionForGlobal(GV, GVKind, TM)); 2552 2553 // Switch to the containing csect. 2554 OutStreamer->switchSection(Csect); 2555 2556 const DataLayout &DL = GV->getParent()->getDataLayout(); 2557 2558 // Handle common and zero-initialized local symbols. 2559 if (GV->hasCommonLinkage() || GVKind.isBSSLocal() || 2560 GVKind.isThreadBSSLocal()) { 2561 Align Alignment = GV->getAlign().value_or(DL.getPreferredAlign(GV)); 2562 uint64_t Size = DL.getTypeAllocSize(GV->getValueType()); 2563 GVSym->setStorageClass( 2564 TargetLoweringObjectFileXCOFF::getStorageClassForGlobal(GV)); 2565 2566 if (GVKind.isBSSLocal() || GVKind.isThreadBSSLocal()) 2567 OutStreamer->emitXCOFFLocalCommonSymbol( 2568 OutContext.getOrCreateSymbol(GVSym->getSymbolTableName()), Size, 2569 GVSym, Alignment); 2570 else 2571 OutStreamer->emitCommonSymbol(GVSym, Size, Alignment); 2572 return; 2573 } 2574 2575 MCSymbol *EmittedInitSym = GVSym; 2576 2577 // Emit linkage for the global variable and its aliases. 2578 emitLinkage(GV, EmittedInitSym); 2579 for (const GlobalAlias *GA : GOAliasMap[GV]) 2580 emitLinkage(GA, getSymbol(GA)); 2581 2582 emitAlignment(getGVAlignment(GV, DL), GV); 2583 2584 // When -fdata-sections is enabled, every GlobalVariable will 2585 // be put into its own csect; therefore, label is not necessary here. 2586 if (!TM.getDataSections() || GV->hasSection()) 2587 OutStreamer->emitLabel(EmittedInitSym); 2588 2589 // No alias to emit. 2590 if (!GOAliasMap[GV].size()) { 2591 emitGlobalConstant(GV->getParent()->getDataLayout(), GV->getInitializer()); 2592 return; 2593 } 2594 2595 // Aliases with the same offset should be aligned. Record the list of aliases 2596 // associated with the offset. 2597 AliasMapTy AliasList; 2598 for (const GlobalAlias *GA : GOAliasMap[GV]) 2599 AliasList[getAliasOffset(GA->getAliasee())].push_back(GA); 2600 2601 // Emit alias label and element value for global variable. 2602 emitGlobalConstant(GV->getParent()->getDataLayout(), GV->getInitializer(), 2603 &AliasList); 2604 } 2605 2606 void PPCAIXAsmPrinter::emitFunctionDescriptor() { 2607 const DataLayout &DL = getDataLayout(); 2608 const unsigned PointerSize = DL.getPointerSizeInBits() == 64 ? 8 : 4; 2609 2610 MCSectionSubPair Current = OutStreamer->getCurrentSection(); 2611 // Emit function descriptor. 2612 OutStreamer->switchSection( 2613 cast<MCSymbolXCOFF>(CurrentFnDescSym)->getRepresentedCsect()); 2614 2615 // Emit aliasing label for function descriptor csect. 2616 for (const GlobalAlias *Alias : GOAliasMap[&MF->getFunction()]) 2617 OutStreamer->emitLabel(getSymbol(Alias)); 2618 2619 // Emit function entry point address. 2620 OutStreamer->emitValue(MCSymbolRefExpr::create(CurrentFnSym, OutContext), 2621 PointerSize); 2622 // Emit TOC base address. 2623 const MCSymbol *TOCBaseSym = 2624 cast<MCSectionXCOFF>(getObjFileLowering().getTOCBaseSection()) 2625 ->getQualNameSymbol(); 2626 OutStreamer->emitValue(MCSymbolRefExpr::create(TOCBaseSym, OutContext), 2627 PointerSize); 2628 // Emit a null environment pointer. 2629 OutStreamer->emitIntValue(0, PointerSize); 2630 2631 OutStreamer->switchSection(Current.first, Current.second); 2632 } 2633 2634 void PPCAIXAsmPrinter::emitFunctionEntryLabel() { 2635 // It's not necessary to emit the label when we have individual 2636 // function in its own csect. 2637 if (!TM.getFunctionSections()) 2638 PPCAsmPrinter::emitFunctionEntryLabel(); 2639 2640 // Emit aliasing label for function entry point label. 2641 for (const GlobalAlias *Alias : GOAliasMap[&MF->getFunction()]) 2642 OutStreamer->emitLabel( 2643 getObjFileLowering().getFunctionEntryPointSymbol(Alias, TM)); 2644 } 2645 2646 void PPCAIXAsmPrinter::emitPGORefs(Module &M) { 2647 if (!OutContext.hasXCOFFSection( 2648 "__llvm_prf_cnts", 2649 XCOFF::CsectProperties(XCOFF::XMC_RW, XCOFF::XTY_SD))) 2650 return; 2651 2652 // When inside a csect `foo`, a .ref directive referring to a csect `bar` 2653 // translates into a relocation entry from `foo` to` bar`. The referring 2654 // csect, `foo`, is identified by its address. If multiple csects have the 2655 // same address (because one or more of them are zero-length), the referring 2656 // csect cannot be determined. Hence, we don't generate the .ref directives 2657 // if `__llvm_prf_cnts` is an empty section. 2658 bool HasNonZeroLengthPrfCntsSection = false; 2659 const DataLayout &DL = M.getDataLayout(); 2660 for (GlobalVariable &GV : M.globals()) 2661 if (GV.hasSection() && GV.getSection().equals("__llvm_prf_cnts") && 2662 DL.getTypeAllocSize(GV.getValueType()) > 0) { 2663 HasNonZeroLengthPrfCntsSection = true; 2664 break; 2665 } 2666 2667 if (HasNonZeroLengthPrfCntsSection) { 2668 MCSection *CntsSection = OutContext.getXCOFFSection( 2669 "__llvm_prf_cnts", SectionKind::getData(), 2670 XCOFF::CsectProperties(XCOFF::XMC_RW, XCOFF::XTY_SD), 2671 /*MultiSymbolsAllowed*/ true); 2672 2673 OutStreamer->switchSection(CntsSection); 2674 if (OutContext.hasXCOFFSection( 2675 "__llvm_prf_data", 2676 XCOFF::CsectProperties(XCOFF::XMC_RW, XCOFF::XTY_SD))) { 2677 MCSymbol *S = OutContext.getOrCreateSymbol("__llvm_prf_data[RW]"); 2678 OutStreamer->emitXCOFFRefDirective(S); 2679 } 2680 if (OutContext.hasXCOFFSection( 2681 "__llvm_prf_names", 2682 XCOFF::CsectProperties(XCOFF::XMC_RO, XCOFF::XTY_SD))) { 2683 MCSymbol *S = OutContext.getOrCreateSymbol("__llvm_prf_names[RO]"); 2684 OutStreamer->emitXCOFFRefDirective(S); 2685 } 2686 if (OutContext.hasXCOFFSection( 2687 "__llvm_prf_vnds", 2688 XCOFF::CsectProperties(XCOFF::XMC_RW, XCOFF::XTY_SD))) { 2689 MCSymbol *S = OutContext.getOrCreateSymbol("__llvm_prf_vnds[RW]"); 2690 OutStreamer->emitXCOFFRefDirective(S); 2691 } 2692 } 2693 } 2694 2695 void PPCAIXAsmPrinter::emitEndOfAsmFile(Module &M) { 2696 // If there are no functions and there are no toc-data definitions in this 2697 // module, we will never need to reference the TOC base. 2698 if (M.empty() && TOCDataGlobalVars.empty()) 2699 return; 2700 2701 emitPGORefs(M); 2702 2703 // Switch to section to emit TOC base. 2704 OutStreamer->switchSection(getObjFileLowering().getTOCBaseSection()); 2705 2706 PPCTargetStreamer *TS = 2707 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer()); 2708 2709 for (auto &I : TOC) { 2710 MCSectionXCOFF *TCEntry; 2711 // Setup the csect for the current TC entry. If the variant kind is 2712 // VK_PPC_AIX_TLSGDM the entry represents the region handle, we create a 2713 // new symbol to prefix the name with a dot. 2714 if (I.first.second == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM) { 2715 SmallString<128> Name; 2716 StringRef Prefix = "."; 2717 Name += Prefix; 2718 Name += cast<MCSymbolXCOFF>(I.first.first)->getSymbolTableName(); 2719 MCSymbol *S = OutContext.getOrCreateSymbol(Name); 2720 TCEntry = cast<MCSectionXCOFF>( 2721 getObjFileLowering().getSectionForTOCEntry(S, TM)); 2722 } else { 2723 TCEntry = cast<MCSectionXCOFF>( 2724 getObjFileLowering().getSectionForTOCEntry(I.first.first, TM)); 2725 } 2726 OutStreamer->switchSection(TCEntry); 2727 2728 OutStreamer->emitLabel(I.second); 2729 TS->emitTCEntry(*I.first.first, I.first.second); 2730 } 2731 2732 for (const auto *GV : TOCDataGlobalVars) 2733 emitGlobalVariableHelper(GV); 2734 } 2735 2736 bool PPCAIXAsmPrinter::doInitialization(Module &M) { 2737 const bool Result = PPCAsmPrinter::doInitialization(M); 2738 2739 auto setCsectAlignment = [this](const GlobalObject *GO) { 2740 // Declarations have 0 alignment which is set by default. 2741 if (GO->isDeclarationForLinker()) 2742 return; 2743 2744 SectionKind GOKind = getObjFileLowering().getKindForGlobal(GO, TM); 2745 MCSectionXCOFF *Csect = cast<MCSectionXCOFF>( 2746 getObjFileLowering().SectionForGlobal(GO, GOKind, TM)); 2747 2748 Align GOAlign = getGVAlignment(GO, GO->getParent()->getDataLayout()); 2749 Csect->ensureMinAlignment(GOAlign); 2750 }; 2751 2752 // We need to know, up front, the alignment of csects for the assembly path, 2753 // because once a .csect directive gets emitted, we could not change the 2754 // alignment value on it. 2755 for (const auto &G : M.globals()) { 2756 if (isSpecialLLVMGlobalArrayToSkip(&G)) 2757 continue; 2758 2759 if (isSpecialLLVMGlobalArrayForStaticInit(&G)) { 2760 // Generate a format indicator and a unique module id to be a part of 2761 // the sinit and sterm function names. 2762 if (FormatIndicatorAndUniqueModId.empty()) { 2763 std::string UniqueModuleId = getUniqueModuleId(&M); 2764 if (UniqueModuleId != "") 2765 // TODO: Use source file full path to generate the unique module id 2766 // and add a format indicator as a part of function name in case we 2767 // will support more than one format. 2768 FormatIndicatorAndUniqueModId = "clang_" + UniqueModuleId.substr(1); 2769 else { 2770 // Use threadId, Pid, and current time as the unique module id when we 2771 // cannot generate one based on a module's strong external symbols. 2772 auto CurTime = 2773 std::chrono::duration_cast<std::chrono::nanoseconds>( 2774 std::chrono::steady_clock::now().time_since_epoch()) 2775 .count(); 2776 FormatIndicatorAndUniqueModId = 2777 "clangPidTidTime_" + llvm::itostr(sys::Process::getProcessId()) + 2778 "_" + llvm::itostr(llvm::get_threadid()) + "_" + 2779 llvm::itostr(CurTime); 2780 } 2781 } 2782 2783 emitSpecialLLVMGlobal(&G); 2784 continue; 2785 } 2786 2787 setCsectAlignment(&G); 2788 } 2789 2790 for (const auto &F : M) 2791 setCsectAlignment(&F); 2792 2793 // Construct an aliasing list for each GlobalObject. 2794 for (const auto &Alias : M.aliases()) { 2795 const GlobalObject *Aliasee = Alias.getAliaseeObject(); 2796 if (!Aliasee) 2797 report_fatal_error( 2798 "alias without a base object is not yet supported on AIX"); 2799 2800 if (Aliasee->hasCommonLinkage()) { 2801 report_fatal_error("Aliases to common variables are not allowed on AIX:" 2802 "\n\tAlias attribute for " + 2803 Alias.getGlobalIdentifier() + 2804 " is invalid because " + Aliasee->getName() + 2805 " is common.", 2806 false); 2807 } 2808 2809 GOAliasMap[Aliasee].push_back(&Alias); 2810 } 2811 2812 return Result; 2813 } 2814 2815 void PPCAIXAsmPrinter::emitInstruction(const MachineInstr *MI) { 2816 switch (MI->getOpcode()) { 2817 default: 2818 break; 2819 case PPC::TW: 2820 case PPC::TWI: 2821 case PPC::TD: 2822 case PPC::TDI: { 2823 if (MI->getNumOperands() < 5) 2824 break; 2825 const MachineOperand &LangMO = MI->getOperand(3); 2826 const MachineOperand &ReasonMO = MI->getOperand(4); 2827 if (!LangMO.isImm() || !ReasonMO.isImm()) 2828 break; 2829 MCSymbol *TempSym = OutContext.createNamedTempSymbol(); 2830 OutStreamer->emitLabel(TempSym); 2831 OutStreamer->emitXCOFFExceptDirective(CurrentFnSym, TempSym, 2832 LangMO.getImm(), ReasonMO.getImm(), 2833 Subtarget->isPPC64() ? MI->getMF()->getInstructionCount() * 8 : 2834 MI->getMF()->getInstructionCount() * 4, 2835 MMI->hasDebugInfo()); 2836 break; 2837 } 2838 case PPC::GETtlsTpointer32AIX: 2839 case PPC::GETtlsADDR64AIX: 2840 case PPC::GETtlsADDR32AIX: { 2841 // A reference to .__tls_get_addr/.__get_tpointer is unknown to the 2842 // assembler so we need to emit an external symbol reference. 2843 MCSymbol *TlsGetAddr = 2844 createMCSymbolForTlsGetAddr(OutContext, MI->getOpcode()); 2845 ExtSymSDNodeSymbols.insert(TlsGetAddr); 2846 break; 2847 } 2848 case PPC::BL8: 2849 case PPC::BL: 2850 case PPC::BL8_NOP: 2851 case PPC::BL_NOP: { 2852 const MachineOperand &MO = MI->getOperand(0); 2853 if (MO.isSymbol()) { 2854 MCSymbolXCOFF *S = 2855 cast<MCSymbolXCOFF>(OutContext.getOrCreateSymbol(MO.getSymbolName())); 2856 ExtSymSDNodeSymbols.insert(S); 2857 } 2858 } break; 2859 case PPC::BL_TLS: 2860 case PPC::BL8_TLS: 2861 case PPC::BL8_TLS_: 2862 case PPC::BL8_NOP_TLS: 2863 report_fatal_error("TLS call not yet implemented"); 2864 case PPC::TAILB: 2865 case PPC::TAILB8: 2866 case PPC::TAILBA: 2867 case PPC::TAILBA8: 2868 case PPC::TAILBCTR: 2869 case PPC::TAILBCTR8: 2870 if (MI->getOperand(0).isSymbol()) 2871 report_fatal_error("Tail call for extern symbol not yet supported."); 2872 break; 2873 case PPC::DST: 2874 case PPC::DST64: 2875 case PPC::DSTT: 2876 case PPC::DSTT64: 2877 case PPC::DSTST: 2878 case PPC::DSTST64: 2879 case PPC::DSTSTT: 2880 case PPC::DSTSTT64: 2881 EmitToStreamer( 2882 *OutStreamer, 2883 MCInstBuilder(PPC::ORI).addReg(PPC::R0).addReg(PPC::R0).addImm(0)); 2884 return; 2885 } 2886 return PPCAsmPrinter::emitInstruction(MI); 2887 } 2888 2889 bool PPCAIXAsmPrinter::doFinalization(Module &M) { 2890 // Do streamer related finalization for DWARF. 2891 if (!MAI->usesDwarfFileAndLocDirectives() && MMI->hasDebugInfo()) 2892 OutStreamer->doFinalizationAtSectionEnd( 2893 OutStreamer->getContext().getObjectFileInfo()->getTextSection()); 2894 2895 for (MCSymbol *Sym : ExtSymSDNodeSymbols) 2896 OutStreamer->emitSymbolAttribute(Sym, MCSA_Extern); 2897 return PPCAsmPrinter::doFinalization(M); 2898 } 2899 2900 static unsigned mapToSinitPriority(int P) { 2901 if (P < 0 || P > 65535) 2902 report_fatal_error("invalid init priority"); 2903 2904 if (P <= 20) 2905 return P; 2906 2907 if (P < 81) 2908 return 20 + (P - 20) * 16; 2909 2910 if (P <= 1124) 2911 return 1004 + (P - 81); 2912 2913 if (P < 64512) 2914 return 2047 + (P - 1124) * 33878; 2915 2916 return 2147482625u + (P - 64512); 2917 } 2918 2919 static std::string convertToSinitPriority(int Priority) { 2920 // This helper function converts clang init priority to values used in sinit 2921 // and sterm functions. 2922 // 2923 // The conversion strategies are: 2924 // We map the reserved clang/gnu priority range [0, 100] into the sinit/sterm 2925 // reserved priority range [0, 1023] by 2926 // - directly mapping the first 21 and the last 20 elements of the ranges 2927 // - linear interpolating the intermediate values with a step size of 16. 2928 // 2929 // We map the non reserved clang/gnu priority range of [101, 65535] into the 2930 // sinit/sterm priority range [1024, 2147483648] by: 2931 // - directly mapping the first and the last 1024 elements of the ranges 2932 // - linear interpolating the intermediate values with a step size of 33878. 2933 unsigned int P = mapToSinitPriority(Priority); 2934 2935 std::string PrioritySuffix; 2936 llvm::raw_string_ostream os(PrioritySuffix); 2937 os << llvm::format_hex_no_prefix(P, 8); 2938 os.flush(); 2939 return PrioritySuffix; 2940 } 2941 2942 void PPCAIXAsmPrinter::emitXXStructorList(const DataLayout &DL, 2943 const Constant *List, bool IsCtor) { 2944 SmallVector<Structor, 8> Structors; 2945 preprocessXXStructorList(DL, List, Structors); 2946 if (Structors.empty()) 2947 return; 2948 2949 unsigned Index = 0; 2950 for (Structor &S : Structors) { 2951 if (const ConstantExpr *CE = dyn_cast<ConstantExpr>(S.Func)) 2952 S.Func = CE->getOperand(0); 2953 2954 llvm::GlobalAlias::create( 2955 GlobalValue::ExternalLinkage, 2956 (IsCtor ? llvm::Twine("__sinit") : llvm::Twine("__sterm")) + 2957 llvm::Twine(convertToSinitPriority(S.Priority)) + 2958 llvm::Twine("_", FormatIndicatorAndUniqueModId) + 2959 llvm::Twine("_", llvm::utostr(Index++)), 2960 cast<Function>(S.Func)); 2961 } 2962 } 2963 2964 void PPCAIXAsmPrinter::emitTTypeReference(const GlobalValue *GV, 2965 unsigned Encoding) { 2966 if (GV) { 2967 TOCEntryType GlobalType = TOCType_GlobalInternal; 2968 GlobalValue::LinkageTypes Linkage = GV->getLinkage(); 2969 if (Linkage == GlobalValue::ExternalLinkage || 2970 Linkage == GlobalValue::AvailableExternallyLinkage || 2971 Linkage == GlobalValue::ExternalWeakLinkage) 2972 GlobalType = TOCType_GlobalExternal; 2973 MCSymbol *TypeInfoSym = TM.getSymbol(GV); 2974 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(TypeInfoSym, GlobalType); 2975 const MCSymbol *TOCBaseSym = 2976 cast<MCSectionXCOFF>(getObjFileLowering().getTOCBaseSection()) 2977 ->getQualNameSymbol(); 2978 auto &Ctx = OutStreamer->getContext(); 2979 const MCExpr *Exp = 2980 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCEntry, Ctx), 2981 MCSymbolRefExpr::create(TOCBaseSym, Ctx), Ctx); 2982 OutStreamer->emitValue(Exp, GetSizeOfEncodedValue(Encoding)); 2983 } else 2984 OutStreamer->emitIntValue(0, GetSizeOfEncodedValue(Encoding)); 2985 } 2986 2987 // Return a pass that prints the PPC assembly code for a MachineFunction to the 2988 // given output stream. 2989 static AsmPrinter * 2990 createPPCAsmPrinterPass(TargetMachine &tm, 2991 std::unique_ptr<MCStreamer> &&Streamer) { 2992 if (tm.getTargetTriple().isOSAIX()) 2993 return new PPCAIXAsmPrinter(tm, std::move(Streamer)); 2994 2995 return new PPCLinuxAsmPrinter(tm, std::move(Streamer)); 2996 } 2997 2998 void PPCAIXAsmPrinter::emitModuleCommandLines(Module &M) { 2999 const NamedMDNode *NMD = M.getNamedMetadata("llvm.commandline"); 3000 if (!NMD || !NMD->getNumOperands()) 3001 return; 3002 3003 std::string S; 3004 raw_string_ostream RSOS(S); 3005 for (unsigned i = 0, e = NMD->getNumOperands(); i != e; ++i) { 3006 const MDNode *N = NMD->getOperand(i); 3007 assert(N->getNumOperands() == 1 && 3008 "llvm.commandline metadata entry can have only one operand"); 3009 const MDString *MDS = cast<MDString>(N->getOperand(0)); 3010 // Add "@(#)" to support retrieving the command line information with the 3011 // AIX "what" command 3012 RSOS << "@(#)opt " << MDS->getString() << "\n"; 3013 RSOS.write('\0'); 3014 } 3015 OutStreamer->emitXCOFFCInfoSym(".GCC.command.line", RSOS.str()); 3016 } 3017 3018 // Force static initialization. 3019 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCAsmPrinter() { 3020 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), 3021 createPPCAsmPrinterPass); 3022 TargetRegistry::RegisterAsmPrinter(getThePPC32LETarget(), 3023 createPPCAsmPrinterPass); 3024 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), 3025 createPPCAsmPrinterPass); 3026 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), 3027 createPPCAsmPrinterPass); 3028 } 3029