xref: /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp (revision 37f253ed0ff80cd6a0937859a4c3c80c256f6d61)
1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "MCTargetDesc/PPCFixupKinds.h"
10 #include "MCTargetDesc/PPCMCTargetDesc.h"
11 #include "llvm/BinaryFormat/ELF.h"
12 #include "llvm/BinaryFormat/MachO.h"
13 #include "llvm/MC/MCAsmBackend.h"
14 #include "llvm/MC/MCAssembler.h"
15 #include "llvm/MC/MCELFObjectWriter.h"
16 #include "llvm/MC/MCFixupKindInfo.h"
17 #include "llvm/MC/MCMachObjectWriter.h"
18 #include "llvm/MC/MCObjectWriter.h"
19 #include "llvm/MC/MCSectionMachO.h"
20 #include "llvm/MC/MCSubtargetInfo.h"
21 #include "llvm/MC/MCSymbolELF.h"
22 #include "llvm/MC/MCValue.h"
23 #include "llvm/Support/ErrorHandling.h"
24 #include "llvm/Support/TargetRegistry.h"
25 using namespace llvm;
26 
27 static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) {
28   switch (Kind) {
29   default:
30     llvm_unreachable("Unknown fixup kind!");
31   case FK_Data_1:
32   case FK_Data_2:
33   case FK_Data_4:
34   case FK_Data_8:
35   case PPC::fixup_ppc_nofixup:
36     return Value;
37   case PPC::fixup_ppc_brcond14:
38   case PPC::fixup_ppc_brcond14abs:
39     return Value & 0xfffc;
40   case PPC::fixup_ppc_br24:
41   case PPC::fixup_ppc_br24abs:
42   case PPC::fixup_ppc_br24_notoc:
43     return Value & 0x3fffffc;
44   case PPC::fixup_ppc_half16:
45     return Value & 0xffff;
46   case PPC::fixup_ppc_half16ds:
47     return Value & 0xfffc;
48   case PPC::fixup_ppc_pcrel34:
49     return Value & 0x3ffffffff;
50   }
51 }
52 
53 static unsigned getFixupKindNumBytes(unsigned Kind) {
54   switch (Kind) {
55   default:
56     llvm_unreachable("Unknown fixup kind!");
57   case FK_Data_1:
58     return 1;
59   case FK_Data_2:
60   case PPC::fixup_ppc_half16:
61   case PPC::fixup_ppc_half16ds:
62     return 2;
63   case FK_Data_4:
64   case PPC::fixup_ppc_brcond14:
65   case PPC::fixup_ppc_brcond14abs:
66   case PPC::fixup_ppc_br24:
67   case PPC::fixup_ppc_br24abs:
68   case PPC::fixup_ppc_br24_notoc:
69     return 4;
70   case PPC::fixup_ppc_pcrel34:
71   case FK_Data_8:
72     return 8;
73   case PPC::fixup_ppc_nofixup:
74     return 0;
75   }
76 }
77 
78 namespace {
79 
80 class PPCAsmBackend : public MCAsmBackend {
81 protected:
82   Triple TT;
83 public:
84   PPCAsmBackend(const Target &T, const Triple &TT)
85       : MCAsmBackend(TT.isLittleEndian() ? support::little : support::big),
86         TT(TT) {}
87 
88   unsigned getNumFixupKinds() const override {
89     return PPC::NumTargetFixupKinds;
90   }
91 
92   const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
93     const static MCFixupKindInfo InfosBE[PPC::NumTargetFixupKinds] = {
94       // name                    offset  bits  flags
95       { "fixup_ppc_br24",        6,      24,   MCFixupKindInfo::FKF_IsPCRel },
96       { "fixup_ppc_br24_notoc",  6,      24,   MCFixupKindInfo::FKF_IsPCRel },
97       { "fixup_ppc_brcond14",    16,     14,   MCFixupKindInfo::FKF_IsPCRel },
98       { "fixup_ppc_br24abs",     6,      24,   0 },
99       { "fixup_ppc_brcond14abs", 16,     14,   0 },
100       { "fixup_ppc_half16",       0,     16,   0 },
101       { "fixup_ppc_half16ds",     0,     14,   0 },
102       { "fixup_ppc_pcrel34",     0,      34,   MCFixupKindInfo::FKF_IsPCRel },
103       { "fixup_ppc_nofixup",      0,      0,   0 }
104     };
105     const static MCFixupKindInfo InfosLE[PPC::NumTargetFixupKinds] = {
106       // name                    offset  bits  flags
107       { "fixup_ppc_br24",        2,      24,   MCFixupKindInfo::FKF_IsPCRel },
108       { "fixup_ppc_br24_notoc",  2,      24,   MCFixupKindInfo::FKF_IsPCRel },
109       { "fixup_ppc_brcond14",    2,      14,   MCFixupKindInfo::FKF_IsPCRel },
110       { "fixup_ppc_br24abs",     2,      24,   0 },
111       { "fixup_ppc_brcond14abs", 2,      14,   0 },
112       { "fixup_ppc_half16",      0,      16,   0 },
113       { "fixup_ppc_half16ds",    2,      14,   0 },
114       { "fixup_ppc_pcrel34",     0,      34,   MCFixupKindInfo::FKF_IsPCRel },
115       { "fixup_ppc_nofixup",     0,       0,   0 }
116     };
117 
118     // Fixup kinds from .reloc directive are like R_PPC_NONE/R_PPC64_NONE. They
119     // do not require any extra processing.
120     if (Kind >= FirstLiteralRelocationKind)
121       return MCAsmBackend::getFixupKindInfo(FK_NONE);
122 
123     if (Kind < FirstTargetFixupKind)
124       return MCAsmBackend::getFixupKindInfo(Kind);
125 
126     assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
127            "Invalid kind!");
128     return (Endian == support::little
129                 ? InfosLE
130                 : InfosBE)[Kind - FirstTargetFixupKind];
131   }
132 
133   void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
134                   const MCValue &Target, MutableArrayRef<char> Data,
135                   uint64_t Value, bool IsResolved,
136                   const MCSubtargetInfo *STI) const override {
137     MCFixupKind Kind = Fixup.getKind();
138     if (Kind >= FirstLiteralRelocationKind)
139       return;
140     Value = adjustFixupValue(Kind, Value);
141     if (!Value) return;           // Doesn't change encoding.
142 
143     unsigned Offset = Fixup.getOffset();
144     unsigned NumBytes = getFixupKindNumBytes(Kind);
145 
146     // For each byte of the fragment that the fixup touches, mask in the bits
147     // from the fixup value. The Value has been "split up" into the appropriate
148     // bitfields above.
149     for (unsigned i = 0; i != NumBytes; ++i) {
150       unsigned Idx = Endian == support::little ? i : (NumBytes - 1 - i);
151       Data[Offset + i] |= uint8_t((Value >> (Idx * 8)) & 0xff);
152     }
153   }
154 
155   bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
156                              const MCValue &Target) override {
157     MCFixupKind Kind = Fixup.getKind();
158     switch ((unsigned)Kind) {
159     default:
160       return Kind >= FirstLiteralRelocationKind;
161     case PPC::fixup_ppc_br24:
162     case PPC::fixup_ppc_br24abs:
163     case PPC::fixup_ppc_br24_notoc:
164       // If the target symbol has a local entry point we must not attempt
165       // to resolve the fixup directly.  Emit a relocation and leave
166       // resolution of the final target address to the linker.
167       if (const MCSymbolRefExpr *A = Target.getSymA()) {
168         if (const auto *S = dyn_cast<MCSymbolELF>(&A->getSymbol())) {
169           // The "other" values are stored in the last 6 bits of the second
170           // byte. The traditional defines for STO values assume the full byte
171           // and thus the shift to pack it.
172           unsigned Other = S->getOther() << 2;
173           if ((Other & ELF::STO_PPC64_LOCAL_MASK) != 0)
174             return true;
175         }
176       }
177       return false;
178     }
179   }
180 
181   bool mayNeedRelaxation(const MCInst &Inst,
182                          const MCSubtargetInfo &STI) const override {
183     // FIXME.
184     return false;
185   }
186 
187   bool fixupNeedsRelaxation(const MCFixup &Fixup,
188                             uint64_t Value,
189                             const MCRelaxableFragment *DF,
190                             const MCAsmLayout &Layout) const override {
191     // FIXME.
192     llvm_unreachable("relaxInstruction() unimplemented");
193   }
194 
195   void relaxInstruction(MCInst &Inst,
196                         const MCSubtargetInfo &STI) const override {
197     // FIXME.
198     llvm_unreachable("relaxInstruction() unimplemented");
199   }
200 
201   bool writeNopData(raw_ostream &OS, uint64_t Count) const override {
202     uint64_t NumNops = Count / 4;
203     for (uint64_t i = 0; i != NumNops; ++i)
204       support::endian::write<uint32_t>(OS, 0x60000000, Endian);
205 
206     OS.write_zeros(Count % 4);
207 
208     return true;
209   }
210 };
211 } // end anonymous namespace
212 
213 
214 // FIXME: This should be in a separate file.
215 namespace {
216 
217 class ELFPPCAsmBackend : public PPCAsmBackend {
218 public:
219   ELFPPCAsmBackend(const Target &T, const Triple &TT) : PPCAsmBackend(T, TT) {}
220 
221   std::unique_ptr<MCObjectTargetWriter>
222   createObjectTargetWriter() const override {
223     uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
224     bool Is64 = TT.isPPC64();
225     return createPPCELFObjectWriter(Is64, OSABI);
226   }
227 
228   Optional<MCFixupKind> getFixupKind(StringRef Name) const override;
229 };
230 
231 class XCOFFPPCAsmBackend : public PPCAsmBackend {
232 public:
233   XCOFFPPCAsmBackend(const Target &T, const Triple &TT)
234       : PPCAsmBackend(T, TT) {}
235 
236   std::unique_ptr<MCObjectTargetWriter>
237   createObjectTargetWriter() const override {
238     return createPPCXCOFFObjectWriter(TT.isArch64Bit());
239   }
240 };
241 
242 } // end anonymous namespace
243 
244 Optional<MCFixupKind> ELFPPCAsmBackend::getFixupKind(StringRef Name) const {
245   if (TT.isOSBinFormatELF()) {
246     unsigned Type;
247     if (TT.isPPC64()) {
248       Type = llvm::StringSwitch<unsigned>(Name)
249 #define ELF_RELOC(X, Y) .Case(#X, Y)
250 #include "llvm/BinaryFormat/ELFRelocs/PowerPC64.def"
251 #undef ELF_RELOC
252                  .Default(-1u);
253     } else {
254       Type = llvm::StringSwitch<unsigned>(Name)
255 #define ELF_RELOC(X, Y) .Case(#X, Y)
256 #include "llvm/BinaryFormat/ELFRelocs/PowerPC.def"
257 #undef ELF_RELOC
258                  .Default(-1u);
259     }
260     if (Type != -1u)
261       return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);
262   }
263   return None;
264 }
265 
266 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T,
267                                         const MCSubtargetInfo &STI,
268                                         const MCRegisterInfo &MRI,
269                                         const MCTargetOptions &Options) {
270   const Triple &TT = STI.getTargetTriple();
271   if (TT.isOSBinFormatXCOFF())
272     return new XCOFFPPCAsmBackend(T, TT);
273 
274   return new ELFPPCAsmBackend(T, TT);
275 }
276