1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "MCTargetDesc/PPCFixupKinds.h" 10 #include "MCTargetDesc/PPCMCTargetDesc.h" 11 #include "llvm/BinaryFormat/ELF.h" 12 #include "llvm/BinaryFormat/MachO.h" 13 #include "llvm/MC/MCAsmBackend.h" 14 #include "llvm/MC/MCAssembler.h" 15 #include "llvm/MC/MCELFObjectWriter.h" 16 #include "llvm/MC/MCFixupKindInfo.h" 17 #include "llvm/MC/MCMachObjectWriter.h" 18 #include "llvm/MC/MCObjectWriter.h" 19 #include "llvm/MC/MCSectionMachO.h" 20 #include "llvm/MC/MCSubtargetInfo.h" 21 #include "llvm/MC/MCSymbolELF.h" 22 #include "llvm/MC/MCValue.h" 23 #include "llvm/Support/ErrorHandling.h" 24 #include "llvm/Support/TargetRegistry.h" 25 using namespace llvm; 26 27 static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) { 28 switch (Kind) { 29 default: 30 llvm_unreachable("Unknown fixup kind!"); 31 case FK_NONE: 32 case FK_Data_1: 33 case FK_Data_2: 34 case FK_Data_4: 35 case FK_Data_8: 36 case PPC::fixup_ppc_nofixup: 37 return Value; 38 case PPC::fixup_ppc_brcond14: 39 case PPC::fixup_ppc_brcond14abs: 40 return Value & 0xfffc; 41 case PPC::fixup_ppc_br24: 42 case PPC::fixup_ppc_br24abs: 43 return Value & 0x3fffffc; 44 case PPC::fixup_ppc_half16: 45 return Value & 0xffff; 46 case PPC::fixup_ppc_half16ds: 47 return Value & 0xfffc; 48 } 49 } 50 51 static unsigned getFixupKindNumBytes(unsigned Kind) { 52 switch (Kind) { 53 default: 54 llvm_unreachable("Unknown fixup kind!"); 55 case FK_NONE: 56 return 0; 57 case FK_Data_1: 58 return 1; 59 case FK_Data_2: 60 case PPC::fixup_ppc_half16: 61 case PPC::fixup_ppc_half16ds: 62 return 2; 63 case FK_Data_4: 64 case PPC::fixup_ppc_brcond14: 65 case PPC::fixup_ppc_brcond14abs: 66 case PPC::fixup_ppc_br24: 67 case PPC::fixup_ppc_br24abs: 68 return 4; 69 case FK_Data_8: 70 return 8; 71 case PPC::fixup_ppc_nofixup: 72 return 0; 73 } 74 } 75 76 namespace { 77 78 class PPCAsmBackend : public MCAsmBackend { 79 protected: 80 Triple TT; 81 public: 82 PPCAsmBackend(const Target &T, const Triple &TT) 83 : MCAsmBackend(TT.isLittleEndian() ? support::little : support::big), 84 TT(TT) {} 85 86 unsigned getNumFixupKinds() const override { 87 return PPC::NumTargetFixupKinds; 88 } 89 90 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override { 91 const static MCFixupKindInfo InfosBE[PPC::NumTargetFixupKinds] = { 92 // name offset bits flags 93 { "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel }, 94 { "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel }, 95 { "fixup_ppc_br24abs", 6, 24, 0 }, 96 { "fixup_ppc_brcond14abs", 16, 14, 0 }, 97 { "fixup_ppc_half16", 0, 16, 0 }, 98 { "fixup_ppc_half16ds", 0, 14, 0 }, 99 { "fixup_ppc_nofixup", 0, 0, 0 } 100 }; 101 const static MCFixupKindInfo InfosLE[PPC::NumTargetFixupKinds] = { 102 // name offset bits flags 103 { "fixup_ppc_br24", 2, 24, MCFixupKindInfo::FKF_IsPCRel }, 104 { "fixup_ppc_brcond14", 2, 14, MCFixupKindInfo::FKF_IsPCRel }, 105 { "fixup_ppc_br24abs", 2, 24, 0 }, 106 { "fixup_ppc_brcond14abs", 2, 14, 0 }, 107 { "fixup_ppc_half16", 0, 16, 0 }, 108 { "fixup_ppc_half16ds", 2, 14, 0 }, 109 { "fixup_ppc_nofixup", 0, 0, 0 } 110 }; 111 112 if (Kind < FirstTargetFixupKind) 113 return MCAsmBackend::getFixupKindInfo(Kind); 114 115 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() && 116 "Invalid kind!"); 117 return (Endian == support::little 118 ? InfosLE 119 : InfosBE)[Kind - FirstTargetFixupKind]; 120 } 121 122 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, 123 const MCValue &Target, MutableArrayRef<char> Data, 124 uint64_t Value, bool IsResolved, 125 const MCSubtargetInfo *STI) const override { 126 Value = adjustFixupValue(Fixup.getKind(), Value); 127 if (!Value) return; // Doesn't change encoding. 128 129 unsigned Offset = Fixup.getOffset(); 130 unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind()); 131 132 // For each byte of the fragment that the fixup touches, mask in the bits 133 // from the fixup value. The Value has been "split up" into the appropriate 134 // bitfields above. 135 for (unsigned i = 0; i != NumBytes; ++i) { 136 unsigned Idx = Endian == support::little ? i : (NumBytes - 1 - i); 137 Data[Offset + i] |= uint8_t((Value >> (Idx * 8)) & 0xff); 138 } 139 } 140 141 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, 142 const MCValue &Target) override { 143 switch ((unsigned)Fixup.getKind()) { 144 default: 145 return false; 146 case FK_NONE: 147 return true; 148 case PPC::fixup_ppc_br24: 149 case PPC::fixup_ppc_br24abs: 150 // If the target symbol has a local entry point we must not attempt 151 // to resolve the fixup directly. Emit a relocation and leave 152 // resolution of the final target address to the linker. 153 if (const MCSymbolRefExpr *A = Target.getSymA()) { 154 if (const auto *S = dyn_cast<MCSymbolELF>(&A->getSymbol())) { 155 // The "other" values are stored in the last 6 bits of the second 156 // byte. The traditional defines for STO values assume the full byte 157 // and thus the shift to pack it. 158 unsigned Other = S->getOther() << 2; 159 if ((Other & ELF::STO_PPC64_LOCAL_MASK) != 0) 160 return true; 161 } 162 } 163 return false; 164 } 165 } 166 167 bool mayNeedRelaxation(const MCInst &Inst, 168 const MCSubtargetInfo &STI) const override { 169 // FIXME. 170 return false; 171 } 172 173 bool fixupNeedsRelaxation(const MCFixup &Fixup, 174 uint64_t Value, 175 const MCRelaxableFragment *DF, 176 const MCAsmLayout &Layout) const override { 177 // FIXME. 178 llvm_unreachable("relaxInstruction() unimplemented"); 179 } 180 181 void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI, 182 MCInst &Res) const override { 183 // FIXME. 184 llvm_unreachable("relaxInstruction() unimplemented"); 185 } 186 187 bool writeNopData(raw_ostream &OS, uint64_t Count) const override { 188 uint64_t NumNops = Count / 4; 189 for (uint64_t i = 0; i != NumNops; ++i) 190 support::endian::write<uint32_t>(OS, 0x60000000, Endian); 191 192 OS.write_zeros(Count % 4); 193 194 return true; 195 } 196 }; 197 } // end anonymous namespace 198 199 200 // FIXME: This should be in a separate file. 201 namespace { 202 203 class DarwinPPCAsmBackend : public PPCAsmBackend { 204 public: 205 DarwinPPCAsmBackend(const Target &T, const Triple &TT) 206 : PPCAsmBackend(T, TT) {} 207 208 std::unique_ptr<MCObjectTargetWriter> 209 createObjectTargetWriter() const override { 210 bool Is64 = TT.isPPC64(); 211 return createPPCMachObjectWriter( 212 /*Is64Bit=*/Is64, 213 (Is64 ? MachO::CPU_TYPE_POWERPC64 : MachO::CPU_TYPE_POWERPC), 214 MachO::CPU_SUBTYPE_POWERPC_ALL); 215 } 216 }; 217 218 class ELFPPCAsmBackend : public PPCAsmBackend { 219 public: 220 ELFPPCAsmBackend(const Target &T, const Triple &TT) : PPCAsmBackend(T, TT) {} 221 222 std::unique_ptr<MCObjectTargetWriter> 223 createObjectTargetWriter() const override { 224 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS()); 225 bool Is64 = TT.isPPC64(); 226 return createPPCELFObjectWriter(Is64, OSABI); 227 } 228 229 Optional<MCFixupKind> getFixupKind(StringRef Name) const override; 230 }; 231 232 class XCOFFPPCAsmBackend : public PPCAsmBackend { 233 public: 234 XCOFFPPCAsmBackend(const Target &T, const Triple &TT) 235 : PPCAsmBackend(T, TT) {} 236 237 std::unique_ptr<MCObjectTargetWriter> 238 createObjectTargetWriter() const override { 239 return createPPCXCOFFObjectWriter(TT.isArch64Bit()); 240 } 241 }; 242 243 } // end anonymous namespace 244 245 Optional<MCFixupKind> ELFPPCAsmBackend::getFixupKind(StringRef Name) const { 246 if (TT.isPPC64()) { 247 if (Name == "R_PPC64_NONE") 248 return FK_NONE; 249 } else { 250 if (Name == "R_PPC_NONE") 251 return FK_NONE; 252 } 253 return MCAsmBackend::getFixupKind(Name); 254 } 255 256 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, 257 const MCSubtargetInfo &STI, 258 const MCRegisterInfo &MRI, 259 const MCTargetOptions &Options) { 260 const Triple &TT = STI.getTargetTriple(); 261 if (TT.isOSDarwin()) 262 return new DarwinPPCAsmBackend(T, TT); 263 264 if (TT.isOSBinFormatXCOFF()) 265 return new XCOFFPPCAsmBackend(T, TT); 266 267 return new ELFPPCAsmBackend(T, TT); 268 } 269