1 //===- PPCLegalizerInfo.h ----------------------------------------*- C++ -*-==// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 /// \file 9 /// This file implements the targeting of the Machinelegalizer class for PowerPC 10 //===----------------------------------------------------------------------===// 11 12 #include "PPCLegalizerInfo.h" 13 #include "llvm/CodeGen/GlobalISel/LegalizerHelper.h" 14 #include "llvm/Support/Debug.h" 15 16 #define DEBUG_TYPE "ppc-legalinfo" 17 18 using namespace llvm; 19 using namespace LegalizeActions; 20 using namespace LegalizeMutations; 21 using namespace LegalityPredicates; 22 23 static LegalityPredicate isRegisterType(unsigned TypeIdx) { 24 return [=](const LegalityQuery &Query) { 25 const LLT QueryTy = Query.Types[TypeIdx]; 26 unsigned TypeSize = QueryTy.getSizeInBits(); 27 28 if (TypeSize % 32 == 1 || TypeSize > 128) 29 return false; 30 31 // Check if this is a legal PowerPC vector type. 32 if (QueryTy.isVector()) { 33 const int EltSize = QueryTy.getElementType().getSizeInBits(); 34 return (EltSize == 8 || EltSize == 16 || EltSize == 32 || EltSize == 64); 35 } 36 37 return true; 38 }; 39 } 40 41 PPCLegalizerInfo::PPCLegalizerInfo(const PPCSubtarget &ST) { 42 using namespace TargetOpcode; 43 const LLT P0 = LLT::pointer(0, 64); 44 const LLT S1 = LLT::scalar(1); 45 const LLT S8 = LLT::scalar(8); 46 const LLT S16 = LLT::scalar(16); 47 const LLT S32 = LLT::scalar(32); 48 const LLT S64 = LLT::scalar(64); 49 const LLT V16S8 = LLT::fixed_vector(16, 8); 50 const LLT V8S16 = LLT::fixed_vector(8, 16); 51 const LLT V4S32 = LLT::fixed_vector(4, 32); 52 const LLT V2S64 = LLT::fixed_vector(2, 64); 53 getActionDefinitionsBuilder(G_IMPLICIT_DEF).legalFor({S64}); 54 getActionDefinitionsBuilder(G_CONSTANT) 55 .legalFor({S32, S64}) 56 .clampScalar(0, S64, S64); 57 getActionDefinitionsBuilder({G_ZEXT, G_SEXT, G_ANYEXT}) 58 .legalForCartesianProduct({S64}, {S1, S8, S16, S32}) 59 .clampScalar(0, S64, S64); 60 getActionDefinitionsBuilder({G_AND, G_OR, G_XOR}) 61 .legalFor({S64, V4S32}) 62 .clampScalar(0, S64, S64) 63 .bitcastIf(typeIsNot(0, V4S32), changeTo(0, V4S32)); 64 getActionDefinitionsBuilder({G_ADD, G_SUB}) 65 .legalFor({S64, V16S8, V8S16, V4S32, V2S64}) 66 .clampScalar(0, S64, S64); 67 getActionDefinitionsBuilder(G_BITCAST) 68 .legalIf(all(isRegisterType(0), isRegisterType(1))) 69 .lower(); 70 71 getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV}) 72 .legalFor({S32, S64, V4S32, V2S64}); 73 74 getActionDefinitionsBuilder(G_FCMP).legalForCartesianProduct({S1}, 75 {S32, S64}); 76 77 getActionDefinitionsBuilder({G_FPTOSI, G_FPTOUI}) 78 .legalForCartesianProduct({S64}, {S32, S64}); 79 80 getActionDefinitionsBuilder({G_SITOFP, G_UITOFP}) 81 .legalForCartesianProduct({S32, S64}, {S64}); 82 83 getActionDefinitionsBuilder({G_LOAD, G_STORE}) 84 .legalForTypesWithMemDesc({{S64, P0, S64, 8}, {S32, P0, S32, 4}}); 85 86 getActionDefinitionsBuilder(G_FCONSTANT).lowerFor({S32, S64}); 87 getActionDefinitionsBuilder(G_CONSTANT_POOL).legalFor({P0}); 88 89 getLegacyLegalizerInfo().computeTables(); 90 } 91