1 //===-- NVPTXISelDAGToDAG.h - A dag to dag inst selector for NVPTX --------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file defines an instruction selector for the NVPTX target. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_NVPTX_NVPTXISELDAGTODAG_H 14 #define LLVM_LIB_TARGET_NVPTX_NVPTXISELDAGTODAG_H 15 16 #include "NVPTX.h" 17 #include "NVPTXISelLowering.h" 18 #include "NVPTXRegisterInfo.h" 19 #include "NVPTXTargetMachine.h" 20 #include "MCTargetDesc/NVPTXBaseInfo.h" 21 #include "llvm/CodeGen/SelectionDAGISel.h" 22 #include "llvm/IR/Intrinsics.h" 23 #include "llvm/Support/Compiler.h" 24 25 namespace llvm { 26 27 class LLVM_LIBRARY_VISIBILITY NVPTXDAGToDAGISel : public SelectionDAGISel { 28 const NVPTXTargetMachine &TM; 29 30 // If true, generate mul.wide from sext and mul 31 bool doMulWide; 32 33 int getDivF32Level() const; 34 bool usePrecSqrtF32() const; 35 bool useF32FTZ() const; 36 bool allowFMA() const; 37 bool allowUnsafeFPMath() const; 38 bool useShortPointers() const; 39 40 public: 41 static char ID; 42 43 NVPTXDAGToDAGISel() = delete; 44 45 explicit NVPTXDAGToDAGISel(NVPTXTargetMachine &tm, 46 CodeGenOpt::Level OptLevel); 47 48 bool runOnMachineFunction(MachineFunction &MF) override; 49 const NVPTXSubtarget *Subtarget = nullptr; 50 51 bool SelectInlineAsmMemoryOperand(const SDValue &Op, 52 unsigned ConstraintID, 53 std::vector<SDValue> &OutOps) override; 54 private: 55 // Include the pieces autogenerated from the target description. 56 #include "NVPTXGenDAGISel.inc" 57 58 void Select(SDNode *N) override; 59 bool tryIntrinsicNoChain(SDNode *N); 60 bool tryIntrinsicChain(SDNode *N); 61 void SelectTexSurfHandle(SDNode *N); 62 bool tryLoad(SDNode *N); 63 bool tryLoadVector(SDNode *N); 64 bool tryLDGLDU(SDNode *N); 65 bool tryStore(SDNode *N); 66 bool tryStoreVector(SDNode *N); 67 bool tryLoadParam(SDNode *N); 68 bool tryStoreRetval(SDNode *N); 69 bool tryStoreParam(SDNode *N); 70 void SelectAddrSpaceCast(SDNode *N); 71 bool tryTextureIntrinsic(SDNode *N); 72 bool trySurfaceIntrinsic(SDNode *N); 73 bool tryBFE(SDNode *N); 74 bool tryConstantFP16(SDNode *N); 75 bool SelectSETP_F16X2(SDNode *N); 76 bool tryEXTRACT_VECTOR_ELEMENT(SDNode *N); 77 78 inline SDValue getI32Imm(unsigned Imm, const SDLoc &DL) { 79 return CurDAG->getTargetConstant(Imm, DL, MVT::i32); 80 } 81 82 // Match direct address complex pattern. 83 bool SelectDirectAddr(SDValue N, SDValue &Address); 84 85 bool SelectADDRri_imp(SDNode *OpNode, SDValue Addr, SDValue &Base, 86 SDValue &Offset, MVT mvt); 87 bool SelectADDRri(SDNode *OpNode, SDValue Addr, SDValue &Base, 88 SDValue &Offset); 89 bool SelectADDRri64(SDNode *OpNode, SDValue Addr, SDValue &Base, 90 SDValue &Offset); 91 bool SelectADDRsi_imp(SDNode *OpNode, SDValue Addr, SDValue &Base, 92 SDValue &Offset, MVT mvt); 93 bool SelectADDRsi(SDNode *OpNode, SDValue Addr, SDValue &Base, 94 SDValue &Offset); 95 bool SelectADDRsi64(SDNode *OpNode, SDValue Addr, SDValue &Base, 96 SDValue &Offset); 97 98 bool ChkMemSDNodeAddressSpace(SDNode *N, unsigned int spN) const; 99 100 static unsigned GetConvertOpcode(MVT DestTy, MVT SrcTy, bool IsSigned); 101 }; 102 } // end namespace llvm 103 104 #endif 105