xref: /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/NVPTX.h (revision 5def4c47d4bd90b209b9b4a4ba9faec15846d8fd)
1 //===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the entry points for global functions defined in
10 // the LLVM NVPTX back-end.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_NVPTX_NVPTX_H
15 #define LLVM_LIB_TARGET_NVPTX_NVPTX_H
16 
17 #include "llvm/IR/PassManager.h"
18 #include "llvm/Pass.h"
19 #include "llvm/Support/CodeGen.h"
20 
21 namespace llvm {
22 class NVPTXTargetMachine;
23 class FunctionPass;
24 class MachineFunctionPass;
25 
26 namespace NVPTXCC {
27 enum CondCodes {
28   EQ,
29   NE,
30   LT,
31   LE,
32   GT,
33   GE
34 };
35 }
36 
37 FunctionPass *createNVPTXISelDag(NVPTXTargetMachine &TM,
38                                  llvm::CodeGenOpt::Level OptLevel);
39 ModulePass *createNVPTXAssignValidGlobalNamesPass();
40 ModulePass *createGenericToNVVMPass();
41 FunctionPass *createNVVMIntrRangePass(unsigned int SmVersion);
42 FunctionPass *createNVVMReflectPass(unsigned int SmVersion);
43 MachineFunctionPass *createNVPTXPrologEpilogPass();
44 MachineFunctionPass *createNVPTXReplaceImageHandlesPass();
45 FunctionPass *createNVPTXImageOptimizerPass();
46 FunctionPass *createNVPTXLowerArgsPass(const NVPTXTargetMachine *TM);
47 FunctionPass *createNVPTXLowerAllocaPass();
48 MachineFunctionPass *createNVPTXPeephole();
49 MachineFunctionPass *createNVPTXProxyRegErasurePass();
50 
51 struct NVVMIntrRangePass : PassInfoMixin<NVVMIntrRangePass> {
52   NVVMIntrRangePass();
53   NVVMIntrRangePass(unsigned SmVersion) : SmVersion(SmVersion) {}
54   PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
55 
56 private:
57   unsigned SmVersion;
58 };
59 
60 struct NVVMReflectPass : PassInfoMixin<NVVMReflectPass> {
61   NVVMReflectPass();
62   NVVMReflectPass(unsigned SmVersion) : SmVersion(SmVersion) {}
63   PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
64 
65 private:
66   unsigned SmVersion;
67 };
68 
69 namespace NVPTX {
70 enum DrvInterface {
71   NVCL,
72   CUDA
73 };
74 
75 // A field inside TSFlags needs a shift and a mask. The usage is
76 // always as follows :
77 // ((TSFlags & fieldMask) >> fieldShift)
78 // The enum keeps the mask, the shift, and all valid values of the
79 // field in one place.
80 enum VecInstType {
81   VecInstTypeShift = 0,
82   VecInstTypeMask = 0xF,
83 
84   VecNOP = 0,
85   VecLoad = 1,
86   VecStore = 2,
87   VecBuild = 3,
88   VecShuffle = 4,
89   VecExtract = 5,
90   VecInsert = 6,
91   VecDest = 7,
92   VecOther = 15
93 };
94 
95 enum SimpleMove {
96   SimpleMoveMask = 0x10,
97   SimpleMoveShift = 4
98 };
99 enum LoadStore {
100   isLoadMask = 0x20,
101   isLoadShift = 5,
102   isStoreMask = 0x40,
103   isStoreShift = 6
104 };
105 
106 namespace PTXLdStInstCode {
107 enum AddressSpace {
108   GENERIC = 0,
109   GLOBAL = 1,
110   CONSTANT = 2,
111   SHARED = 3,
112   PARAM = 4,
113   LOCAL = 5
114 };
115 enum FromType {
116   Unsigned = 0,
117   Signed,
118   Float,
119   Untyped
120 };
121 enum VecType {
122   Scalar = 1,
123   V2 = 2,
124   V4 = 4
125 };
126 }
127 
128 /// PTXCvtMode - Conversion code enumeration
129 namespace PTXCvtMode {
130 enum CvtMode {
131   NONE = 0,
132   RNI,
133   RZI,
134   RMI,
135   RPI,
136   RN,
137   RZ,
138   RM,
139   RP,
140 
141   BASE_MASK = 0x0F,
142   FTZ_FLAG = 0x10,
143   SAT_FLAG = 0x20
144 };
145 }
146 
147 /// PTXCmpMode - Comparison mode enumeration
148 namespace PTXCmpMode {
149 enum CmpMode {
150   EQ = 0,
151   NE,
152   LT,
153   LE,
154   GT,
155   GE,
156   LO,
157   LS,
158   HI,
159   HS,
160   EQU,
161   NEU,
162   LTU,
163   LEU,
164   GTU,
165   GEU,
166   NUM,
167   // NAN is a MACRO
168   NotANumber,
169 
170   BASE_MASK = 0xFF,
171   FTZ_FLAG = 0x100
172 };
173 }
174 }
175 } // end namespace llvm;
176 
177 // Defines symbolic names for NVPTX registers.  This defines a mapping from
178 // register name to register number.
179 #define GET_REGINFO_ENUM
180 #include "NVPTXGenRegisterInfo.inc"
181 
182 // Defines symbolic names for the NVPTX instructions.
183 #define GET_INSTRINFO_ENUM
184 #include "NVPTXGenInstrInfo.inc"
185 
186 #endif
187