xref: /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MipsTargetMachine.h (revision 0fca6ea1d4eea4c934cfff25ac9ee8ad6fe95583)
1 //===- MipsTargetMachine.h - Define TargetMachine for Mips ------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares the Mips specific subclass of TargetMachine.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
14 #define LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
15 
16 #include "MCTargetDesc/MipsABIInfo.h"
17 #include "MipsSubtarget.h"
18 #include "llvm/ADT/StringMap.h"
19 #include "llvm/ADT/StringRef.h"
20 #include "llvm/Support/CodeGen.h"
21 #include "llvm/Target/TargetMachine.h"
22 #include <memory>
23 #include <optional>
24 
25 namespace llvm {
26 
27 class MipsTargetMachine : public LLVMTargetMachine {
28   bool isLittle;
29   std::unique_ptr<TargetLoweringObjectFile> TLOF;
30   // Selected ABI
31   MipsABIInfo ABI;
32   const MipsSubtarget *Subtarget;
33   MipsSubtarget DefaultSubtarget;
34   MipsSubtarget NoMips16Subtarget;
35   MipsSubtarget Mips16Subtarget;
36 
37   mutable StringMap<std::unique_ptr<MipsSubtarget>> SubtargetMap;
38 
39 public:
40   MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
41                     StringRef FS, const TargetOptions &Options,
42                     std::optional<Reloc::Model> RM,
43                     std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
44                     bool JIT, bool isLittle);
45   ~MipsTargetMachine() override;
46 
47   TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
48 
49   const MipsSubtarget *getSubtargetImpl() const {
50     if (Subtarget)
51       return Subtarget;
52     return &DefaultSubtarget;
53   }
54 
55   const MipsSubtarget *getSubtargetImpl(const Function &F) const override;
56 
57   /// Reset the subtarget for the Mips target.
58   void resetSubtarget(MachineFunction *MF);
59 
60   // Pass Pipeline Configuration
61   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
62 
63   TargetLoweringObjectFile *getObjFileLowering() const override {
64     return TLOF.get();
65   }
66 
67   MachineFunctionInfo *
68   createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F,
69                             const TargetSubtargetInfo *STI) const override;
70 
71   /// Returns true if a cast between SrcAS and DestAS is a noop.
72   bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override {
73     // Mips doesn't have any special address spaces so we just reserve
74     // the first 256 for software use (e.g. OpenCL) and treat casts
75     // between them as noops.
76     return SrcAS < 256 && DestAS < 256;
77   }
78 
79   bool isLittleEndian() const { return isLittle; }
80   const MipsABIInfo &getABI() const { return ABI; }
81 };
82 
83 /// Mips32/64 big endian target machine.
84 ///
85 class MipsebTargetMachine : public MipsTargetMachine {
86   virtual void anchor();
87 
88 public:
89   MipsebTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
90                       StringRef FS, const TargetOptions &Options,
91                       std::optional<Reloc::Model> RM,
92                       std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
93                       bool JIT);
94 };
95 
96 /// Mips32/64 little endian target machine.
97 ///
98 class MipselTargetMachine : public MipsTargetMachine {
99   virtual void anchor();
100 
101 public:
102   MipselTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
103                       StringRef FS, const TargetOptions &Options,
104                       std::optional<Reloc::Model> RM,
105                       std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
106                       bool JIT);
107 };
108 
109 } // end namespace llvm
110 
111 #endif // LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
112