1 //===-- MipsSEISelDAGToDAG.h - A Dag to Dag Inst Selector for MipsSE -----===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // Subclass of MipsDAGToDAGISel specialized for mips32/64. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H 14 #define LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H 15 16 #include "MipsISelDAGToDAG.h" 17 18 namespace llvm { 19 20 class MipsSEDAGToDAGISel : public MipsDAGToDAGISel { 21 22 public: 23 explicit MipsSEDAGToDAGISel(MipsTargetMachine &TM, CodeGenOptLevel OL) 24 : MipsDAGToDAGISel(TM, OL) {} 25 26 private: 27 28 bool runOnMachineFunction(MachineFunction &MF) override; 29 30 void addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI, 31 MachineFunction &MF); 32 33 unsigned getMSACtrlReg(const SDValue RegIdx) const; 34 35 bool replaceUsesWithZeroReg(MachineRegisterInfo *MRI, const MachineInstr&); 36 37 std::pair<SDNode *, SDNode *> selectMULT(SDNode *N, unsigned Opc, 38 const SDLoc &dl, EVT Ty, bool HasLo, 39 bool HasHi); 40 41 void selectAddE(SDNode *Node, const SDLoc &DL) const; 42 43 bool selectAddrFrameIndex(SDValue Addr, SDValue &Base, SDValue &Offset) const; 44 bool selectAddrFrameIndexOffset(SDValue Addr, SDValue &Base, SDValue &Offset, 45 unsigned OffsetBits, 46 unsigned ShiftAmount) const; 47 48 bool selectAddrRegImm(SDValue Addr, SDValue &Base, 49 SDValue &Offset) const override; 50 51 bool selectAddrDefault(SDValue Addr, SDValue &Base, 52 SDValue &Offset) const override; 53 54 bool selectIntAddr(SDValue Addr, SDValue &Base, 55 SDValue &Offset) const override; 56 57 bool selectAddrRegImm9(SDValue Addr, SDValue &Base, 58 SDValue &Offset) const; 59 60 bool selectAddrRegImm11(SDValue Addr, SDValue &Base, 61 SDValue &Offset) const; 62 63 bool selectAddrRegImm12(SDValue Addr, SDValue &Base, 64 SDValue &Offset) const; 65 66 bool selectAddrRegImm16(SDValue Addr, SDValue &Base, 67 SDValue &Offset) const; 68 69 bool selectIntAddr11MM(SDValue Addr, SDValue &Base, 70 SDValue &Offset) const override; 71 72 bool selectIntAddr12MM(SDValue Addr, SDValue &Base, 73 SDValue &Offset) const override; 74 75 bool selectIntAddr16MM(SDValue Addr, SDValue &Base, 76 SDValue &Offset) const override; 77 78 bool selectIntAddrLSL2MM(SDValue Addr, SDValue &Base, 79 SDValue &Offset) const override; 80 81 bool selectIntAddrSImm10(SDValue Addr, SDValue &Base, 82 SDValue &Offset) const override; 83 84 bool selectIntAddrSImm10Lsl1(SDValue Addr, SDValue &Base, 85 SDValue &Offset) const override; 86 87 bool selectIntAddrSImm10Lsl2(SDValue Addr, SDValue &Base, 88 SDValue &Offset) const override; 89 90 bool selectIntAddrSImm10Lsl3(SDValue Addr, SDValue &Base, 91 SDValue &Offset) const override; 92 93 /// Select constant vector splats. 94 bool selectVSplat(SDNode *N, APInt &Imm, 95 unsigned MinSizeInBits) const override; 96 /// Select constant vector splats whose value fits in a given integer. 97 bool selectVSplatCommon(SDValue N, SDValue &Imm, bool Signed, 98 unsigned ImmBitSize) const; 99 /// Select constant vector splats whose value fits in a uimm1. 100 bool selectVSplatUimm1(SDValue N, SDValue &Imm) const override; 101 /// Select constant vector splats whose value fits in a uimm2. 102 bool selectVSplatUimm2(SDValue N, SDValue &Imm) const override; 103 /// Select constant vector splats whose value fits in a uimm3. 104 bool selectVSplatUimm3(SDValue N, SDValue &Imm) const override; 105 /// Select constant vector splats whose value fits in a uimm4. 106 bool selectVSplatUimm4(SDValue N, SDValue &Imm) const override; 107 /// Select constant vector splats whose value fits in a uimm5. 108 bool selectVSplatUimm5(SDValue N, SDValue &Imm) const override; 109 /// Select constant vector splats whose value fits in a uimm6. 110 bool selectVSplatUimm6(SDValue N, SDValue &Imm) const override; 111 /// Select constant vector splats whose value fits in a uimm8. 112 bool selectVSplatUimm8(SDValue N, SDValue &Imm) const override; 113 /// Select constant vector splats whose value fits in a simm5. 114 bool selectVSplatSimm5(SDValue N, SDValue &Imm) const override; 115 /// Select constant vector splats whose value is a power of 2. 116 bool selectVSplatUimmPow2(SDValue N, SDValue &Imm) const override; 117 /// Select constant vector splats whose value is the inverse of a 118 /// power of 2. 119 bool selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const override; 120 /// Select constant vector splats whose value is a run of set bits 121 /// ending at the most significant bit. 122 bool selectVSplatMaskL(SDValue N, SDValue &Imm) const override; 123 /// Select constant vector splats whose value is a run of set bits 124 /// starting at bit zero. 125 bool selectVSplatMaskR(SDValue N, SDValue &Imm) const override; 126 127 bool trySelect(SDNode *Node) override; 128 129 // Emits proper ABI for _mcount profiling calls. 130 void emitMCountABI(MachineInstr &MI, MachineBasicBlock &MBB, 131 MachineFunction &MF); 132 133 void processFunctionAfterISel(MachineFunction &MF) override; 134 135 bool SelectInlineAsmMemoryOperand(const SDValue &Op, 136 InlineAsm::ConstraintCode ConstraintID, 137 std::vector<SDValue> &OutOps) override; 138 }; 139 140 class MipsSEDAGToDAGISelLegacy : public MipsDAGToDAGISelLegacy { 141 public: 142 explicit MipsSEDAGToDAGISelLegacy(MipsTargetMachine &TM, CodeGenOptLevel OL); 143 void getAnalysisUsage(AnalysisUsage &AU) const override; 144 }; 145 146 FunctionPass *createMipsSEISelDag(MipsTargetMachine &TM, 147 CodeGenOptLevel OptLevel); 148 } 149 150 #endif 151