1 //===- MipsOptimizePICCall.cpp - Optimize PIC Calls -----------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This pass eliminates unnecessary instructions that set up $gp and replace 10 // instructions that load target function addresses with copy instructions. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "MCTargetDesc/MipsBaseInfo.h" 15 #include "Mips.h" 16 #include "MipsRegisterInfo.h" 17 #include "MipsSubtarget.h" 18 #include "llvm/ADT/PointerUnion.h" 19 #include "llvm/ADT/ScopedHashTable.h" 20 #include "llvm/ADT/SmallVector.h" 21 #include "llvm/CodeGen/MachineBasicBlock.h" 22 #include "llvm/CodeGen/MachineDominators.h" 23 #include "llvm/CodeGen/MachineFunction.h" 24 #include "llvm/CodeGen/MachineFunctionPass.h" 25 #include "llvm/CodeGen/MachineInstr.h" 26 #include "llvm/CodeGen/MachineInstrBuilder.h" 27 #include "llvm/CodeGen/MachineOperand.h" 28 #include "llvm/CodeGen/MachineRegisterInfo.h" 29 #include "llvm/CodeGen/MachineValueType.h" 30 #include "llvm/CodeGen/TargetInstrInfo.h" 31 #include "llvm/CodeGen/TargetOpcodes.h" 32 #include "llvm/CodeGen/TargetRegisterInfo.h" 33 #include "llvm/CodeGen/TargetSubtargetInfo.h" 34 #include "llvm/Support/Allocator.h" 35 #include "llvm/Support/CommandLine.h" 36 #include "llvm/Support/ErrorHandling.h" 37 #include "llvm/Support/RecyclingAllocator.h" 38 #include <cassert> 39 #include <utility> 40 #include <vector> 41 42 using namespace llvm; 43 44 #define DEBUG_TYPE "optimize-mips-pic-call" 45 46 static cl::opt<bool> LoadTargetFromGOT("mips-load-target-from-got", 47 cl::init(true), 48 cl::desc("Load target address from GOT"), 49 cl::Hidden); 50 51 static cl::opt<bool> EraseGPOpnd("mips-erase-gp-opnd", 52 cl::init(true), cl::desc("Erase GP Operand"), 53 cl::Hidden); 54 55 namespace { 56 57 using ValueType = PointerUnion<const Value *, const PseudoSourceValue *>; 58 using CntRegP = std::pair<unsigned, unsigned>; 59 using AllocatorTy = RecyclingAllocator<BumpPtrAllocator, 60 ScopedHashTableVal<ValueType, CntRegP>>; 61 using ScopedHTType = ScopedHashTable<ValueType, CntRegP, 62 DenseMapInfo<ValueType>, AllocatorTy>; 63 64 class MBBInfo { 65 public: 66 MBBInfo(MachineDomTreeNode *N); 67 68 const MachineDomTreeNode *getNode() const; 69 bool isVisited() const; 70 void preVisit(ScopedHTType &ScopedHT); 71 void postVisit(); 72 73 private: 74 MachineDomTreeNode *Node; 75 ScopedHTType::ScopeTy *HTScope; 76 }; 77 78 class OptimizePICCall : public MachineFunctionPass { 79 public: 80 OptimizePICCall() : MachineFunctionPass(ID) {} 81 82 StringRef getPassName() const override { return "Mips OptimizePICCall"; } 83 84 bool runOnMachineFunction(MachineFunction &F) override; 85 86 void getAnalysisUsage(AnalysisUsage &AU) const override { 87 AU.addRequired<MachineDominatorTree>(); 88 MachineFunctionPass::getAnalysisUsage(AU); 89 } 90 91 private: 92 /// Visit MBB. 93 bool visitNode(MBBInfo &MBBI); 94 95 /// Test if MI jumps to a function via a register. 96 /// 97 /// Also, return the virtual register containing the target function's address 98 /// and the underlying object in Reg and Val respectively, if the function's 99 /// address can be resolved lazily. 100 bool isCallViaRegister(MachineInstr &MI, unsigned &Reg, 101 ValueType &Val) const; 102 103 /// Return the number of instructions that dominate the current 104 /// instruction and load the function address from object Entry. 105 unsigned getCount(ValueType Entry); 106 107 /// Return the destination virtual register of the last instruction 108 /// that loads from object Entry. 109 unsigned getReg(ValueType Entry); 110 111 /// Update ScopedHT. 112 void incCntAndSetReg(ValueType Entry, unsigned Reg); 113 114 ScopedHTType ScopedHT; 115 116 static char ID; 117 }; 118 119 } // end of anonymous namespace 120 121 char OptimizePICCall::ID = 0; 122 123 /// Return the first MachineOperand of MI if it is a used virtual register. 124 static MachineOperand *getCallTargetRegOpnd(MachineInstr &MI) { 125 if (MI.getNumOperands() == 0) 126 return nullptr; 127 128 MachineOperand &MO = MI.getOperand(0); 129 130 if (!MO.isReg() || !MO.isUse() || !MO.getReg().isVirtual()) 131 return nullptr; 132 133 return &MO; 134 } 135 136 /// Return type of register Reg. 137 static MVT::SimpleValueType getRegTy(unsigned Reg, MachineFunction &MF) { 138 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); 139 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(Reg); 140 assert(TRI.legalclasstypes_end(*RC) - TRI.legalclasstypes_begin(*RC) == 1); 141 return *TRI.legalclasstypes_begin(*RC); 142 } 143 144 /// Do the following transformation: 145 /// 146 /// jalr $vreg 147 /// => 148 /// copy $t9, $vreg 149 /// jalr $t9 150 static void setCallTargetReg(MachineBasicBlock *MBB, 151 MachineBasicBlock::iterator I) { 152 MachineFunction &MF = *MBB->getParent(); 153 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo(); 154 Register SrcReg = I->getOperand(0).getReg(); 155 unsigned DstReg = getRegTy(SrcReg, MF) == MVT::i32 ? Mips::T9 : Mips::T9_64; 156 BuildMI(*MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), DstReg) 157 .addReg(SrcReg); 158 I->getOperand(0).setReg(DstReg); 159 } 160 161 /// Search MI's operands for register GP and erase it. 162 static void eraseGPOpnd(MachineInstr &MI) { 163 if (!EraseGPOpnd) 164 return; 165 166 MachineFunction &MF = *MI.getParent()->getParent(); 167 MVT::SimpleValueType Ty = getRegTy(MI.getOperand(0).getReg(), MF); 168 unsigned Reg = Ty == MVT::i32 ? Mips::GP : Mips::GP_64; 169 170 for (unsigned I = 0; I < MI.getNumOperands(); ++I) { 171 MachineOperand &MO = MI.getOperand(I); 172 if (MO.isReg() && MO.getReg() == Reg) { 173 MI.removeOperand(I); 174 return; 175 } 176 } 177 178 llvm_unreachable(nullptr); 179 } 180 181 MBBInfo::MBBInfo(MachineDomTreeNode *N) : Node(N), HTScope(nullptr) {} 182 183 const MachineDomTreeNode *MBBInfo::getNode() const { return Node; } 184 185 bool MBBInfo::isVisited() const { return HTScope; } 186 187 void MBBInfo::preVisit(ScopedHTType &ScopedHT) { 188 HTScope = new ScopedHTType::ScopeTy(ScopedHT); 189 } 190 191 void MBBInfo::postVisit() { 192 delete HTScope; 193 } 194 195 // OptimizePICCall methods. 196 bool OptimizePICCall::runOnMachineFunction(MachineFunction &F) { 197 if (F.getSubtarget<MipsSubtarget>().inMips16Mode()) 198 return false; 199 200 // Do a pre-order traversal of the dominator tree. 201 MachineDominatorTree *MDT = &getAnalysis<MachineDominatorTree>(); 202 bool Changed = false; 203 204 SmallVector<MBBInfo, 8> WorkList(1, MBBInfo(MDT->getRootNode())); 205 206 while (!WorkList.empty()) { 207 MBBInfo &MBBI = WorkList.back(); 208 209 // If this MBB has already been visited, destroy the scope for the MBB and 210 // pop it from the work list. 211 if (MBBI.isVisited()) { 212 MBBI.postVisit(); 213 WorkList.pop_back(); 214 continue; 215 } 216 217 // Visit the MBB and add its children to the work list. 218 MBBI.preVisit(ScopedHT); 219 Changed |= visitNode(MBBI); 220 const MachineDomTreeNode *Node = MBBI.getNode(); 221 WorkList.append(Node->begin(), Node->end()); 222 } 223 224 return Changed; 225 } 226 227 bool OptimizePICCall::visitNode(MBBInfo &MBBI) { 228 bool Changed = false; 229 MachineBasicBlock *MBB = MBBI.getNode()->getBlock(); 230 231 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); I != E; 232 ++I) { 233 unsigned Reg; 234 ValueType Entry; 235 236 // Skip instructions that are not call instructions via registers. 237 if (!isCallViaRegister(*I, Reg, Entry)) 238 continue; 239 240 Changed = true; 241 unsigned N = getCount(Entry); 242 243 if (N != 0) { 244 // If a function has been called more than twice, we do not have to emit a 245 // load instruction to get the function address from the GOT, but can 246 // instead reuse the address that has been loaded before. 247 if (N >= 2 && !LoadTargetFromGOT) 248 getCallTargetRegOpnd(*I)->setReg(getReg(Entry)); 249 250 // Erase the $gp operand if this isn't the first time a function has 251 // been called. $gp needs to be set up only if the function call can go 252 // through a lazy binding stub. 253 eraseGPOpnd(*I); 254 } 255 256 if (Entry) 257 incCntAndSetReg(Entry, Reg); 258 259 setCallTargetReg(MBB, I); 260 } 261 262 return Changed; 263 } 264 265 bool OptimizePICCall::isCallViaRegister(MachineInstr &MI, unsigned &Reg, 266 ValueType &Val) const { 267 if (!MI.isCall()) 268 return false; 269 270 MachineOperand *MO = getCallTargetRegOpnd(MI); 271 272 // Return if MI is not a function call via a register. 273 if (!MO) 274 return false; 275 276 // Get the instruction that loads the function address from the GOT. 277 Reg = MO->getReg(); 278 Val = nullptr; 279 MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo(); 280 MachineInstr *DefMI = MRI.getVRegDef(Reg); 281 282 assert(DefMI); 283 284 // See if DefMI is an instruction that loads from a GOT entry that holds the 285 // address of a lazy binding stub. 286 if (!DefMI->mayLoad() || DefMI->getNumOperands() < 3) 287 return true; 288 289 unsigned Flags = DefMI->getOperand(2).getTargetFlags(); 290 291 if (Flags != MipsII::MO_GOT_CALL && Flags != MipsII::MO_CALL_LO16) 292 return true; 293 294 // Return the underlying object for the GOT entry in Val. 295 assert(DefMI->hasOneMemOperand()); 296 Val = (*DefMI->memoperands_begin())->getValue(); 297 if (!Val) 298 Val = (*DefMI->memoperands_begin())->getPseudoValue(); 299 return true; 300 } 301 302 unsigned OptimizePICCall::getCount(ValueType Entry) { 303 return ScopedHT.lookup(Entry).first; 304 } 305 306 unsigned OptimizePICCall::getReg(ValueType Entry) { 307 unsigned Reg = ScopedHT.lookup(Entry).second; 308 assert(Reg); 309 return Reg; 310 } 311 312 void OptimizePICCall::incCntAndSetReg(ValueType Entry, unsigned Reg) { 313 CntRegP P = ScopedHT.lookup(Entry); 314 ScopedHT.insert(Entry, std::make_pair(P.first + 1, Reg)); 315 } 316 317 /// Return an OptimizeCall object. 318 FunctionPass *llvm::createMipsOptimizePICCallPass() { 319 return new OptimizePICCall(); 320 } 321