1 //===---- MipsISelDAGToDAG.h - A Dag to Dag Inst Selector for Mips --------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file defines an instruction selector for the MIPS target. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_MIPS_MIPSISELDAGTODAG_H 14 #define LLVM_LIB_TARGET_MIPS_MIPSISELDAGTODAG_H 15 16 #include "Mips.h" 17 #include "MipsSubtarget.h" 18 #include "MipsTargetMachine.h" 19 #include "llvm/CodeGen/SelectionDAGISel.h" 20 21 //===----------------------------------------------------------------------===// 22 // Instruction Selector Implementation 23 //===----------------------------------------------------------------------===// 24 25 //===----------------------------------------------------------------------===// 26 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine 27 // instructions for SelectionDAG operations. 28 //===----------------------------------------------------------------------===// 29 namespace llvm { 30 31 class MipsDAGToDAGISel : public SelectionDAGISel { 32 public: 33 MipsDAGToDAGISel() = delete; 34 35 explicit MipsDAGToDAGISel(MipsTargetMachine &TM, CodeGenOptLevel OL) 36 : SelectionDAGISel(TM, OL), Subtarget(nullptr) {} 37 38 bool runOnMachineFunction(MachineFunction &MF) override; 39 40 protected: 41 SDNode *getGlobalBaseReg(); 42 43 /// Keep a pointer to the MipsSubtarget around so that we can make the right 44 /// decision when generating code for different targets. 45 const MipsSubtarget *Subtarget; 46 47 private: 48 // Include the pieces autogenerated from the target description. 49 #include "MipsGenDAGISel.inc" 50 51 // Complex Pattern. 52 /// (reg + imm). 53 virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base, 54 SDValue &Offset) const; 55 56 /// Fall back on this function if all else fails. 57 virtual bool selectAddrDefault(SDValue Addr, SDValue &Base, 58 SDValue &Offset) const; 59 60 /// Match integer address pattern. 61 virtual bool selectIntAddr(SDValue Addr, SDValue &Base, 62 SDValue &Offset) const; 63 64 virtual bool selectIntAddr11MM(SDValue Addr, SDValue &Base, 65 SDValue &Offset) const; 66 67 virtual bool selectIntAddr12MM(SDValue Addr, SDValue &Base, 68 SDValue &Offset) const; 69 70 virtual bool selectIntAddr16MM(SDValue Addr, SDValue &Base, 71 SDValue &Offset) const; 72 73 virtual bool selectIntAddrLSL2MM(SDValue Addr, SDValue &Base, 74 SDValue &Offset) const; 75 76 /// Match addr+simm10 and addr 77 virtual bool selectIntAddrSImm10(SDValue Addr, SDValue &Base, 78 SDValue &Offset) const; 79 80 virtual bool selectIntAddrSImm10Lsl1(SDValue Addr, SDValue &Base, 81 SDValue &Offset) const; 82 83 virtual bool selectIntAddrSImm10Lsl2(SDValue Addr, SDValue &Base, 84 SDValue &Offset) const; 85 86 virtual bool selectIntAddrSImm10Lsl3(SDValue Addr, SDValue &Base, 87 SDValue &Offset) const; 88 89 virtual bool selectAddr16(SDValue Addr, SDValue &Base, SDValue &Offset); 90 virtual bool selectAddr16SP(SDValue Addr, SDValue &Base, SDValue &Offset); 91 92 /// Select constant vector splats. 93 virtual bool selectVSplat(SDNode *N, APInt &Imm, 94 unsigned MinSizeInBits) const; 95 /// Select constant vector splats whose value fits in a uimm1. 96 virtual bool selectVSplatUimm1(SDValue N, SDValue &Imm) const; 97 /// Select constant vector splats whose value fits in a uimm2. 98 virtual bool selectVSplatUimm2(SDValue N, SDValue &Imm) const; 99 /// Select constant vector splats whose value fits in a uimm3. 100 virtual bool selectVSplatUimm3(SDValue N, SDValue &Imm) const; 101 /// Select constant vector splats whose value fits in a uimm4. 102 virtual bool selectVSplatUimm4(SDValue N, SDValue &Imm) const; 103 /// Select constant vector splats whose value fits in a uimm5. 104 virtual bool selectVSplatUimm5(SDValue N, SDValue &Imm) const; 105 /// Select constant vector splats whose value fits in a uimm6. 106 virtual bool selectVSplatUimm6(SDValue N, SDValue &Imm) const; 107 /// Select constant vector splats whose value fits in a uimm8. 108 virtual bool selectVSplatUimm8(SDValue N, SDValue &Imm) const; 109 /// Select constant vector splats whose value fits in a simm5. 110 virtual bool selectVSplatSimm5(SDValue N, SDValue &Imm) const; 111 /// Select constant vector splats whose value is a power of 2. 112 virtual bool selectVSplatUimmPow2(SDValue N, SDValue &Imm) const; 113 /// Select constant vector splats whose value is the inverse of a 114 /// power of 2. 115 virtual bool selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const; 116 /// Select constant vector splats whose value is a run of set bits 117 /// ending at the most significant bit 118 virtual bool selectVSplatMaskL(SDValue N, SDValue &Imm) const; 119 /// Select constant vector splats whose value is a run of set bits 120 /// starting at bit zero. 121 virtual bool selectVSplatMaskR(SDValue N, SDValue &Imm) const; 122 123 /// Convert vector addition with vector subtraction if that allows to encode 124 /// constant as an immediate and thus avoid extra 'ldi' instruction. 125 /// add X, <-1, -1...> --> sub X, <1, 1...> 126 bool selectVecAddAsVecSubIfProfitable(SDNode *Node); 127 128 void Select(SDNode *N) override; 129 130 virtual bool trySelect(SDNode *Node) = 0; 131 132 // getImm - Return a target constant with the specified value. 133 inline SDValue getImm(const SDNode *Node, uint64_t Imm) { 134 return CurDAG->getTargetConstant(Imm, SDLoc(Node), Node->getValueType(0)); 135 } 136 137 virtual void processFunctionAfterISel(MachineFunction &MF) = 0; 138 139 bool SelectInlineAsmMemoryOperand(const SDValue &Op, 140 InlineAsm::ConstraintCode ConstraintID, 141 std::vector<SDValue> &OutOps) override; 142 bool isUnneededShiftMask(SDNode *N, unsigned ShAmtBits) const; 143 }; 144 145 class MipsDAGToDAGISelLegacy : public SelectionDAGISelLegacy { 146 public: 147 static char ID; 148 MipsDAGToDAGISelLegacy(std::unique_ptr<SelectionDAGISel> S); 149 void getAnalysisUsage(AnalysisUsage &AU) const override; 150 }; 151 } 152 153 #endif 154