1//===- MipsEVAInstrFormats.td - Mips Instruction Formats ---*- tablegen -*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file describes Mips32r6 instruction formats. 10// 11//===----------------------------------------------------------------------===// 12 13class MipsEVAInst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther>, 14 StdArch { 15 let DecoderNamespace = "Mips"; 16 let EncodingPredicates = [HasStdEnc]; 17} 18 19//===----------------------------------------------------------------------===// 20// 21// Field Values 22// 23//===----------------------------------------------------------------------===// 24 25// Memory Load/Store EVA 26def OPCODE6_LBE : OPCODE6<0b101100>; 27def OPCODE6_LBuE : OPCODE6<0b101000>; 28def OPCODE6_LHE : OPCODE6<0b101101>; 29def OPCODE6_LHuE : OPCODE6<0b101001>; 30def OPCODE6_LWE : OPCODE6<0b101111>; 31 32def OPCODE6_SBE : OPCODE6<0b011100>; 33def OPCODE6_SHE : OPCODE6<0b011101>; 34def OPCODE6_SWE : OPCODE6<0b011111>; 35 36// load/store left/right EVA 37def OPCODE6_LWLE : OPCODE6<0b011001>; 38def OPCODE6_LWRE : OPCODE6<0b011010>; 39def OPCODE6_SWLE : OPCODE6<0b100001>; 40def OPCODE6_SWRE : OPCODE6<0b100010>; 41 42// Load-linked EVA, Store-conditional EVA 43def OPCODE6_LLE : OPCODE6<0b101110>; 44def OPCODE6_SCE : OPCODE6<0b011110>; 45 46def OPCODE6_TLBINV : OPCODE6<0b000011>; 47def OPCODE6_TLBINVF : OPCODE6<0b000100>; 48 49def OPCODE6_CACHEE : OPCODE6<0b011011>; 50def OPCODE6_PREFE : OPCODE6<0b100011>; 51 52def OPGROUP_COP0_TLB : OPGROUP<0b010000>; 53 54//===----------------------------------------------------------------------===// 55// 56// Encoding Formats 57// 58//===----------------------------------------------------------------------===// 59 60class SPECIAL3_EVA_LOAD_STORE_FM<OPCODE6 Operation> : MipsEVAInst { 61 bits<21> addr; 62 bits<5> rt; 63 bits<5> base = addr{20-16}; 64 bits<9> offset = addr{8-0}; 65 66 bits<32> Inst; 67 68 let Inst{31-26} = OPGROUP_SPECIAL3.Value; 69 let Inst{25-21} = base; 70 let Inst{20-16} = rt; 71 let Inst{15-7} = offset; 72 let Inst{6} = 0; 73 let Inst{5-0} = Operation.Value; 74} 75 76class TLB_FM<OPCODE6 Operation> : MipsEVAInst { 77 bits<32> Inst; 78 79 let Inst{31-26} = OPGROUP_COP0_TLB.Value; 80 let Inst{25} = 1; // CO 81 let Inst{24-6} = 0; 82 let Inst{5-0} = Operation.Value; 83} 84