1 //===- MipsCallLowering.h ---------------------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 /// \file 10 /// This file describes how to lower LLVM calls to machine code calls. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H 15 #define LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H 16 17 #include "llvm/CodeGen/GlobalISel/CallLowering.h" 18 19 namespace llvm { 20 21 class MachineMemOperand; 22 class MipsTargetLowering; 23 24 class MipsCallLowering : public CallLowering { 25 26 public: 27 class MipsHandler { 28 public: 29 MipsHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) 30 : MIRBuilder(MIRBuilder), MRI(MRI) {} 31 32 virtual ~MipsHandler() = default; 33 34 bool handle(ArrayRef<CCValAssign> ArgLocs, 35 ArrayRef<CallLowering::ArgInfo> Args); 36 37 protected: 38 bool assignVRegs(ArrayRef<Register> VRegs, ArrayRef<CCValAssign> ArgLocs, 39 unsigned ArgLocsStartIndex, const EVT &VT); 40 41 void setLeastSignificantFirst(SmallVectorImpl<Register> &VRegs); 42 43 MachineIRBuilder &MIRBuilder; 44 MachineRegisterInfo &MRI; 45 46 private: 47 bool assign(Register VReg, const CCValAssign &VA, const EVT &VT); 48 49 virtual Register getStackAddress(const CCValAssign &VA, 50 MachineMemOperand *&MMO) = 0; 51 52 virtual void assignValueToReg(Register ValVReg, const CCValAssign &VA, 53 const EVT &VT) = 0; 54 55 virtual void assignValueToAddress(Register ValVReg, 56 const CCValAssign &VA) = 0; 57 58 virtual bool handleSplit(SmallVectorImpl<Register> &VRegs, 59 ArrayRef<CCValAssign> ArgLocs, 60 unsigned ArgLocsStartIndex, Register ArgsReg, 61 const EVT &VT) = 0; 62 }; 63 64 MipsCallLowering(const MipsTargetLowering &TLI); 65 66 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, 67 ArrayRef<Register> VRegs, 68 FunctionLoweringInfo &FLI) const override; 69 70 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, 71 ArrayRef<ArrayRef<Register>> VRegs, 72 FunctionLoweringInfo &FLI) const override; 73 74 bool lowerCall(MachineIRBuilder &MIRBuilder, 75 CallLoweringInfo &Info) const override; 76 77 private: 78 /// Based on registers available on target machine split or extend 79 /// type if needed, also change pointer type to appropriate integer 80 /// type. 81 template <typename T> 82 void subTargetRegTypeForCallingConv(const Function &F, ArrayRef<ArgInfo> Args, 83 ArrayRef<unsigned> OrigArgIndices, 84 SmallVectorImpl<T> &ISDArgs) const; 85 86 /// Split structures and arrays, save original argument indices since 87 /// Mips calling convention needs info about original argument type. 88 void splitToValueTypes(const DataLayout &DL, const ArgInfo &OrigArg, 89 unsigned OriginalIndex, 90 SmallVectorImpl<ArgInfo> &SplitArgs, 91 SmallVectorImpl<unsigned> &SplitArgsOrigIndices) const; 92 }; 93 94 } // end namespace llvm 95 96 #endif // LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H 97